[PATCH] ipw2100: Fix a gcc compile warning
[linux-2.6/verdex.git] / drivers / char / hw_random.c
blobb3bc2e37e6160957786d7ecd69cf9d6c92bed250
1 /*
2 Added support for the AMD Geode LX RNG
3 (c) Copyright 2004-2005 Advanced Micro Devices, Inc.
5 derived from
7 Hardware driver for the Intel/AMD/VIA Random Number Generators (RNG)
8 (c) Copyright 2003 Red Hat Inc <jgarzik@redhat.com>
10 derived from
12 Hardware driver for the AMD 768 Random Number Generator (RNG)
13 (c) Copyright 2001 Red Hat Inc <alan@redhat.com>
15 derived from
17 Hardware driver for Intel i810 Random Number Generator (RNG)
18 Copyright 2000,2001 Jeff Garzik <jgarzik@pobox.com>
19 Copyright 2000,2001 Philipp Rumpf <prumpf@mandrakesoft.com>
21 Please read Documentation/hw_random.txt for details on use.
23 ----------------------------------------------------------
24 This software may be used and distributed according to the terms
25 of the GNU General Public License, incorporated herein by reference.
30 #include <linux/module.h>
31 #include <linux/kernel.h>
32 #include <linux/fs.h>
33 #include <linux/init.h>
34 #include <linux/pci.h>
35 #include <linux/interrupt.h>
36 #include <linux/spinlock.h>
37 #include <linux/random.h>
38 #include <linux/miscdevice.h>
39 #include <linux/smp_lock.h>
40 #include <linux/mm.h>
41 #include <linux/delay.h>
43 #ifdef __i386__
44 #include <asm/msr.h>
45 #include <asm/cpufeature.h>
46 #endif
48 #include <asm/io.h>
49 #include <asm/uaccess.h>
53 * core module and version information
55 #define RNG_VERSION "1.0.0"
56 #define RNG_MODULE_NAME "hw_random"
57 #define RNG_DRIVER_NAME RNG_MODULE_NAME " hardware driver " RNG_VERSION
58 #define PFX RNG_MODULE_NAME ": "
62 * debugging macros
65 /* pr_debug() collapses to a no-op if DEBUG is not defined */
66 #define DPRINTK(fmt, args...) pr_debug(PFX "%s: " fmt, __FUNCTION__ , ## args)
69 #undef RNG_NDEBUG /* define to enable lightweight runtime checks */
70 #ifdef RNG_NDEBUG
71 #define assert(expr) \
72 if(!(expr)) { \
73 printk(KERN_DEBUG PFX "Assertion failed! %s,%s,%s," \
74 "line=%d\n", #expr, __FILE__, __FUNCTION__, __LINE__); \
76 #else
77 #define assert(expr)
78 #endif
80 #define RNG_MISCDEV_MINOR 183 /* official */
82 static int rng_dev_open (struct inode *inode, struct file *filp);
83 static ssize_t rng_dev_read (struct file *filp, char __user *buf, size_t size,
84 loff_t * offp);
86 static int __init intel_init (struct pci_dev *dev);
87 static void intel_cleanup(void);
88 static unsigned int intel_data_present (void);
89 static u32 intel_data_read (void);
91 static int __init amd_init (struct pci_dev *dev);
92 static void amd_cleanup(void);
93 static unsigned int amd_data_present (void);
94 static u32 amd_data_read (void);
96 #ifdef __i386__
97 static int __init via_init(struct pci_dev *dev);
98 static void via_cleanup(void);
99 static unsigned int via_data_present (void);
100 static u32 via_data_read (void);
101 #endif
103 static int __init geode_init(struct pci_dev *dev);
104 static void geode_cleanup(void);
105 static unsigned int geode_data_present (void);
106 static u32 geode_data_read (void);
108 struct rng_operations {
109 int (*init) (struct pci_dev *dev);
110 void (*cleanup) (void);
111 unsigned int (*data_present) (void);
112 u32 (*data_read) (void);
113 unsigned int n_bytes; /* number of bytes per ->data_read */
115 static struct rng_operations *rng_ops;
117 static struct file_operations rng_chrdev_ops = {
118 .owner = THIS_MODULE,
119 .open = rng_dev_open,
120 .read = rng_dev_read,
124 static struct miscdevice rng_miscdev = {
125 RNG_MISCDEV_MINOR,
126 RNG_MODULE_NAME,
127 &rng_chrdev_ops,
130 enum {
131 rng_hw_none,
132 rng_hw_intel,
133 rng_hw_amd,
134 rng_hw_via,
135 rng_hw_geode,
138 static struct rng_operations rng_vendor_ops[] = {
139 /* rng_hw_none */
140 { },
142 /* rng_hw_intel */
143 { intel_init, intel_cleanup, intel_data_present,
144 intel_data_read, 1 },
146 /* rng_hw_amd */
147 { amd_init, amd_cleanup, amd_data_present, amd_data_read, 4 },
149 #ifdef __i386__
150 /* rng_hw_via */
151 { via_init, via_cleanup, via_data_present, via_data_read, 1 },
152 #endif
154 /* rng_hw_geode */
155 { geode_init, geode_cleanup, geode_data_present, geode_data_read, 4 }
159 * Data for PCI driver interface
161 * This data only exists for exporting the supported
162 * PCI ids via MODULE_DEVICE_TABLE. We do not actually
163 * register a pci_driver, because someone else might one day
164 * want to register another driver on the same PCI id.
166 static struct pci_device_id rng_pci_tbl[] = {
167 { 0x1022, 0x7443, PCI_ANY_ID, PCI_ANY_ID, 0, 0, rng_hw_amd },
168 { 0x1022, 0x746b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, rng_hw_amd },
170 { 0x8086, 0x2418, PCI_ANY_ID, PCI_ANY_ID, 0, 0, rng_hw_intel },
171 { 0x8086, 0x2428, PCI_ANY_ID, PCI_ANY_ID, 0, 0, rng_hw_intel },
172 { 0x8086, 0x2430, PCI_ANY_ID, PCI_ANY_ID, 0, 0, rng_hw_intel },
173 { 0x8086, 0x2448, PCI_ANY_ID, PCI_ANY_ID, 0, 0, rng_hw_intel },
174 { 0x8086, 0x244e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, rng_hw_intel },
175 { 0x8086, 0x245e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, rng_hw_intel },
177 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LX_AES,
178 PCI_ANY_ID, PCI_ANY_ID, 0, 0, rng_hw_geode },
180 { 0, }, /* terminate list */
182 MODULE_DEVICE_TABLE (pci, rng_pci_tbl);
185 /***********************************************************************
187 * Intel RNG operations
192 * RNG registers (offsets from rng_mem)
194 #define INTEL_RNG_HW_STATUS 0
195 #define INTEL_RNG_PRESENT 0x40
196 #define INTEL_RNG_ENABLED 0x01
197 #define INTEL_RNG_STATUS 1
198 #define INTEL_RNG_DATA_PRESENT 0x01
199 #define INTEL_RNG_DATA 2
202 * Magic address at which Intel PCI bridges locate the RNG
204 #define INTEL_RNG_ADDR 0xFFBC015F
205 #define INTEL_RNG_ADDR_LEN 3
207 /* token to our ioremap'd RNG register area */
208 static void __iomem *rng_mem;
210 static inline u8 intel_hwstatus (void)
212 assert (rng_mem != NULL);
213 return readb (rng_mem + INTEL_RNG_HW_STATUS);
216 static inline u8 intel_hwstatus_set (u8 hw_status)
218 assert (rng_mem != NULL);
219 writeb (hw_status, rng_mem + INTEL_RNG_HW_STATUS);
220 return intel_hwstatus ();
223 static unsigned int intel_data_present(void)
225 assert (rng_mem != NULL);
227 return (readb (rng_mem + INTEL_RNG_STATUS) & INTEL_RNG_DATA_PRESENT) ?
228 1 : 0;
231 static u32 intel_data_read(void)
233 assert (rng_mem != NULL);
235 return readb (rng_mem + INTEL_RNG_DATA);
238 static int __init intel_init (struct pci_dev *dev)
240 int rc;
241 u8 hw_status;
243 DPRINTK ("ENTER\n");
245 rng_mem = ioremap (INTEL_RNG_ADDR, INTEL_RNG_ADDR_LEN);
246 if (rng_mem == NULL) {
247 printk (KERN_ERR PFX "cannot ioremap RNG Memory\n");
248 rc = -EBUSY;
249 goto err_out;
252 /* Check for Intel 82802 */
253 hw_status = intel_hwstatus ();
254 if ((hw_status & INTEL_RNG_PRESENT) == 0) {
255 printk (KERN_ERR PFX "RNG not detected\n");
256 rc = -ENODEV;
257 goto err_out_free_map;
260 /* turn RNG h/w on, if it's off */
261 if ((hw_status & INTEL_RNG_ENABLED) == 0)
262 hw_status = intel_hwstatus_set (hw_status | INTEL_RNG_ENABLED);
263 if ((hw_status & INTEL_RNG_ENABLED) == 0) {
264 printk (KERN_ERR PFX "cannot enable RNG, aborting\n");
265 rc = -EIO;
266 goto err_out_free_map;
269 DPRINTK ("EXIT, returning 0\n");
270 return 0;
272 err_out_free_map:
273 iounmap (rng_mem);
274 rng_mem = NULL;
275 err_out:
276 DPRINTK ("EXIT, returning %d\n", rc);
277 return rc;
280 static void intel_cleanup(void)
282 u8 hw_status;
284 hw_status = intel_hwstatus ();
285 if (hw_status & INTEL_RNG_ENABLED)
286 intel_hwstatus_set (hw_status & ~INTEL_RNG_ENABLED);
287 else
288 printk(KERN_WARNING PFX "unusual: RNG already disabled\n");
289 iounmap(rng_mem);
290 rng_mem = NULL;
293 /***********************************************************************
295 * AMD RNG operations
299 static u32 pmbase; /* PMxx I/O base */
300 static struct pci_dev *amd_dev;
302 static unsigned int amd_data_present (void)
304 return inl(pmbase + 0xF4) & 1;
308 static u32 amd_data_read (void)
310 return inl(pmbase + 0xF0);
313 static int __init amd_init (struct pci_dev *dev)
315 int rc;
316 u8 rnen;
318 DPRINTK ("ENTER\n");
320 pci_read_config_dword(dev, 0x58, &pmbase);
322 pmbase &= 0x0000FF00;
324 if (pmbase == 0)
326 printk (KERN_ERR PFX "power management base not set\n");
327 rc = -EIO;
328 goto err_out;
331 pci_read_config_byte(dev, 0x40, &rnen);
332 rnen |= (1 << 7); /* RNG on */
333 pci_write_config_byte(dev, 0x40, rnen);
335 pci_read_config_byte(dev, 0x41, &rnen);
336 rnen |= (1 << 7); /* PMIO enable */
337 pci_write_config_byte(dev, 0x41, rnen);
339 pr_info( PFX "AMD768 system management I/O registers at 0x%X.\n",
340 pmbase);
342 amd_dev = dev;
344 DPRINTK ("EXIT, returning 0\n");
345 return 0;
347 err_out:
348 DPRINTK ("EXIT, returning %d\n", rc);
349 return rc;
352 static void amd_cleanup(void)
354 u8 rnen;
356 pci_read_config_byte(amd_dev, 0x40, &rnen);
357 rnen &= ~(1 << 7); /* RNG off */
358 pci_write_config_byte(amd_dev, 0x40, rnen);
360 /* FIXME: twiddle pmio, also? */
363 #ifdef __i386__
364 /***********************************************************************
366 * VIA RNG operations
370 enum {
371 VIA_STRFILT_CNT_SHIFT = 16,
372 VIA_STRFILT_FAIL = (1 << 15),
373 VIA_STRFILT_ENABLE = (1 << 14),
374 VIA_RAWBITS_ENABLE = (1 << 13),
375 VIA_RNG_ENABLE = (1 << 6),
376 VIA_XSTORE_CNT_MASK = 0x0F,
378 VIA_RNG_CHUNK_8 = 0x00, /* 64 rand bits, 64 stored bits */
379 VIA_RNG_CHUNK_4 = 0x01, /* 32 rand bits, 32 stored bits */
380 VIA_RNG_CHUNK_4_MASK = 0xFFFFFFFF,
381 VIA_RNG_CHUNK_2 = 0x02, /* 16 rand bits, 32 stored bits */
382 VIA_RNG_CHUNK_2_MASK = 0xFFFF,
383 VIA_RNG_CHUNK_1 = 0x03, /* 8 rand bits, 32 stored bits */
384 VIA_RNG_CHUNK_1_MASK = 0xFF,
387 static u32 via_rng_datum;
390 * Investigate using the 'rep' prefix to obtain 32 bits of random data
391 * in one insn. The upside is potentially better performance. The
392 * downside is that the instruction becomes no longer atomic. Due to
393 * this, just like familiar issues with /dev/random itself, the worst
394 * case of a 'rep xstore' could potentially pause a cpu for an
395 * unreasonably long time. In practice, this condition would likely
396 * only occur when the hardware is failing. (or so we hope :))
398 * Another possible performance boost may come from simply buffering
399 * until we have 4 bytes, thus returning a u32 at a time,
400 * instead of the current u8-at-a-time.
403 static inline u32 xstore(u32 *addr, u32 edx_in)
405 u32 eax_out;
407 asm(".byte 0x0F,0xA7,0xC0 /* xstore %%edi (addr=%0) */"
408 :"=m"(*addr), "=a"(eax_out)
409 :"D"(addr), "d"(edx_in));
411 return eax_out;
414 static unsigned int via_data_present(void)
416 u32 bytes_out;
418 /* We choose the recommended 1-byte-per-instruction RNG rate,
419 * for greater randomness at the expense of speed. Larger
420 * values 2, 4, or 8 bytes-per-instruction yield greater
421 * speed at lesser randomness.
423 * If you change this to another VIA_CHUNK_n, you must also
424 * change the ->n_bytes values in rng_vendor_ops[] tables.
425 * VIA_CHUNK_8 requires further code changes.
427 * A copy of MSR_VIA_RNG is placed in eax_out when xstore
428 * completes.
430 via_rng_datum = 0; /* paranoia, not really necessary */
431 bytes_out = xstore(&via_rng_datum, VIA_RNG_CHUNK_1) & VIA_XSTORE_CNT_MASK;
432 if (bytes_out == 0)
433 return 0;
435 return 1;
438 static u32 via_data_read(void)
440 return via_rng_datum;
443 static int __init via_init(struct pci_dev *dev)
445 u32 lo, hi, old_lo;
447 /* Control the RNG via MSR. Tread lightly and pay very close
448 * close attention to values written, as the reserved fields
449 * are documented to be "undefined and unpredictable"; but it
450 * does not say to write them as zero, so I make a guess that
451 * we restore the values we find in the register.
453 rdmsr(MSR_VIA_RNG, lo, hi);
455 old_lo = lo;
456 lo &= ~(0x7f << VIA_STRFILT_CNT_SHIFT);
457 lo &= ~VIA_XSTORE_CNT_MASK;
458 lo &= ~(VIA_STRFILT_ENABLE | VIA_STRFILT_FAIL | VIA_RAWBITS_ENABLE);
459 lo |= VIA_RNG_ENABLE;
461 if (lo != old_lo)
462 wrmsr(MSR_VIA_RNG, lo, hi);
464 /* perhaps-unnecessary sanity check; remove after testing if
465 unneeded */
466 rdmsr(MSR_VIA_RNG, lo, hi);
467 if ((lo & VIA_RNG_ENABLE) == 0) {
468 printk(KERN_ERR PFX "cannot enable VIA C3 RNG, aborting\n");
469 return -ENODEV;
472 return 0;
475 static void via_cleanup(void)
477 /* do nothing */
479 #endif
481 /***********************************************************************
483 * AMD Geode RNG operations
487 static void __iomem *geode_rng_base = NULL;
489 #define GEODE_RNG_DATA_REG 0x50
490 #define GEODE_RNG_STATUS_REG 0x54
492 static u32 geode_data_read(void)
494 u32 val;
496 assert(geode_rng_base != NULL);
497 val = readl(geode_rng_base + GEODE_RNG_DATA_REG);
498 return val;
501 static unsigned int geode_data_present(void)
503 u32 val;
505 assert(geode_rng_base != NULL);
506 val = readl(geode_rng_base + GEODE_RNG_STATUS_REG);
507 return val;
510 static void geode_cleanup(void)
512 iounmap(geode_rng_base);
513 geode_rng_base = NULL;
516 static int geode_init(struct pci_dev *dev)
518 unsigned long rng_base = pci_resource_start(dev, 0);
520 if (rng_base == 0)
521 return 1;
523 geode_rng_base = ioremap(rng_base, 0x58);
525 if (geode_rng_base == NULL) {
526 printk(KERN_ERR PFX "Cannot ioremap RNG memory\n");
527 return -EBUSY;
530 return 0;
533 /***********************************************************************
535 * /dev/hwrandom character device handling (major 10, minor 183)
539 static int rng_dev_open (struct inode *inode, struct file *filp)
541 /* enforce read-only access to this chrdev */
542 if ((filp->f_mode & FMODE_READ) == 0)
543 return -EINVAL;
544 if (filp->f_mode & FMODE_WRITE)
545 return -EINVAL;
547 return 0;
551 static ssize_t rng_dev_read (struct file *filp, char __user *buf, size_t size,
552 loff_t * offp)
554 static DEFINE_SPINLOCK(rng_lock);
555 unsigned int have_data;
556 u32 data = 0;
557 ssize_t ret = 0;
559 while (size) {
560 spin_lock(&rng_lock);
562 have_data = 0;
563 if (rng_ops->data_present()) {
564 data = rng_ops->data_read();
565 have_data = rng_ops->n_bytes;
568 spin_unlock (&rng_lock);
570 while (have_data && size) {
571 if (put_user((u8)data, buf++)) {
572 ret = ret ? : -EFAULT;
573 break;
575 size--;
576 ret++;
577 have_data--;
578 data>>=8;
581 if (filp->f_flags & O_NONBLOCK)
582 return ret ? : -EAGAIN;
584 if(need_resched())
585 schedule_timeout_interruptible(1);
586 else
587 udelay(200); /* FIXME: We could poll for 250uS ?? */
589 if (signal_pending (current))
590 return ret ? : -ERESTARTSYS;
592 return ret;
598 * rng_init_one - look for and attempt to init a single RNG
600 static int __init rng_init_one (struct pci_dev *dev)
602 int rc;
604 DPRINTK ("ENTER\n");
606 assert(rng_ops != NULL);
608 rc = rng_ops->init(dev);
609 if (rc)
610 goto err_out;
612 rc = misc_register (&rng_miscdev);
613 if (rc) {
614 printk (KERN_ERR PFX "misc device register failed\n");
615 goto err_out_cleanup_hw;
618 DPRINTK ("EXIT, returning 0\n");
619 return 0;
621 err_out_cleanup_hw:
622 rng_ops->cleanup();
623 err_out:
624 DPRINTK ("EXIT, returning %d\n", rc);
625 return rc;
630 MODULE_AUTHOR("The Linux Kernel team");
631 MODULE_DESCRIPTION("H/W Random Number Generator (RNG) driver");
632 MODULE_LICENSE("GPL");
636 * rng_init - initialize RNG module
638 static int __init rng_init (void)
640 int rc;
641 struct pci_dev *pdev = NULL;
642 const struct pci_device_id *ent;
644 DPRINTK ("ENTER\n");
646 /* Probe for Intel, AMD, Geode RNGs */
647 for_each_pci_dev(pdev) {
648 ent = pci_match_id(rng_pci_tbl, pdev);
649 if (ent) {
650 rng_ops = &rng_vendor_ops[ent->driver_data];
651 goto match;
655 #ifdef __i386__
656 /* Probe for VIA RNG */
657 if (cpu_has_xstore) {
658 rng_ops = &rng_vendor_ops[rng_hw_via];
659 pdev = NULL;
660 goto match;
662 #endif
664 DPRINTK ("EXIT, returning -ENODEV\n");
665 return -ENODEV;
667 match:
668 rc = rng_init_one (pdev);
669 if (rc)
670 return rc;
672 pr_info( RNG_DRIVER_NAME " loaded\n");
674 DPRINTK ("EXIT, returning 0\n");
675 return 0;
680 * rng_init - shutdown RNG module
682 static void __exit rng_cleanup (void)
684 DPRINTK ("ENTER\n");
686 misc_deregister (&rng_miscdev);
688 if (rng_ops->cleanup)
689 rng_ops->cleanup();
691 DPRINTK ("EXIT\n");
695 module_init (rng_init);
696 module_exit (rng_cleanup);