[PATCH] ipw2100: Fix a gcc compile warning
[linux-2.6/verdex.git] / include / asm-mips / interrupt.h
blobabdf54ee64cf306d35b0dd32702c5fed061d4f58
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
6 * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003 by Ralf Baechle
7 * Copyright (C) 1996 by Paul M. Antoine
8 * Copyright (C) 1999 Silicon Graphics
9 * Copyright (C) 2000 MIPS Technologies, Inc.
11 #ifndef _ASM_INTERRUPT_H
12 #define _ASM_INTERRUPT_H
14 #include <linux/config.h>
15 #include <asm/hazards.h>
17 __asm__ (
18 " .macro local_irq_enable \n"
19 " .set push \n"
20 " .set reorder \n"
21 " .set noat \n"
22 #ifdef CONFIG_CPU_MIPSR2
23 " ei \n"
24 #else
25 " mfc0 $1,$12 \n"
26 " ori $1,0x1f \n"
27 " xori $1,0x1e \n"
28 " mtc0 $1,$12 \n"
29 #endif
30 " irq_enable_hazard \n"
31 " .set pop \n"
32 " .endm");
34 static inline void local_irq_enable(void)
36 __asm__ __volatile__(
37 "local_irq_enable"
38 : /* no outputs */
39 : /* no inputs */
40 : "memory");
44 * For cli() we have to insert nops to make sure that the new value
45 * has actually arrived in the status register before the end of this
46 * macro.
47 * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
48 * no nops at all.
50 __asm__ (
51 " .macro local_irq_disable\n"
52 " .set push \n"
53 " .set noat \n"
54 #ifdef CONFIG_CPU_MIPSR2
55 " di \n"
56 #else
57 " mfc0 $1,$12 \n"
58 " ori $1,1 \n"
59 " xori $1,1 \n"
60 " .set noreorder \n"
61 " mtc0 $1,$12 \n"
62 #endif
63 " irq_disable_hazard \n"
64 " .set pop \n"
65 " .endm \n");
67 static inline void local_irq_disable(void)
69 __asm__ __volatile__(
70 "local_irq_disable"
71 : /* no outputs */
72 : /* no inputs */
73 : "memory");
76 __asm__ (
77 " .macro local_save_flags flags \n"
78 " .set push \n"
79 " .set reorder \n"
80 " mfc0 \\flags, $12 \n"
81 " .set pop \n"
82 " .endm \n");
84 #define local_save_flags(x) \
85 __asm__ __volatile__( \
86 "local_save_flags %0" \
87 : "=r" (x))
89 __asm__ (
90 " .macro local_irq_save result \n"
91 " .set push \n"
92 " .set reorder \n"
93 " .set noat \n"
94 #ifdef CONFIG_CPU_MIPSR2
95 " di \\result \n"
96 " andi \\result, 1 \n"
97 #else
98 " mfc0 \\result, $12 \n"
99 " ori $1, \\result, 1 \n"
100 " xori $1, 1 \n"
101 " .set noreorder \n"
102 " mtc0 $1, $12 \n"
103 #endif
104 " irq_disable_hazard \n"
105 " .set pop \n"
106 " .endm \n");
108 #define local_irq_save(x) \
109 __asm__ __volatile__( \
110 "local_irq_save\t%0" \
111 : "=r" (x) \
112 : /* no inputs */ \
113 : "memory")
115 __asm__ (
116 " .macro local_irq_restore flags \n"
117 " .set noreorder \n"
118 " .set noat \n"
119 #if defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU)
121 * Slow, but doesn't suffer from a relativly unlikely race
122 * condition we're having since days 1.
124 " beqz \\flags, 1f \n"
125 " di \n"
126 " ei \n"
127 "1: \n"
128 #elif defined(CONFIG_CPU_MIPSR2)
130 * Fast, dangerous. Life is fun, life is good.
132 " mfc0 $1, $12 \n"
133 " ins $1, \\flags, 0, 1 \n"
134 " mtc0 $1, $12 \n"
135 #else
136 " mfc0 $1, $12 \n"
137 " andi \\flags, 1 \n"
138 " ori $1, 1 \n"
139 " xori $1, 1 \n"
140 " or \\flags, $1 \n"
141 " mtc0 \\flags, $12 \n"
142 #endif
143 " irq_disable_hazard \n"
144 " .set at \n"
145 " .set reorder \n"
146 " .endm \n");
148 #define local_irq_restore(flags) \
149 do { \
150 unsigned long __tmp1; \
152 __asm__ __volatile__( \
153 "local_irq_restore\t%0" \
154 : "=r" (__tmp1) \
155 : "0" (flags) \
156 : "memory"); \
157 } while(0)
159 #define irqs_disabled() \
160 ({ \
161 unsigned long flags; \
162 local_save_flags(flags); \
163 !(flags & 1); \
166 #endif /* _ASM_INTERRUPT_H */