2 * linux/drivers/serial/cpm_uart.c
4 * Driver for CPM (SCC/SMC) serial ports; core driver
6 * Based on arch/ppc/cpm2_io/uart.c by Dan Malek
7 * Based on ppc8xx.c by Thomas Gleixner
8 * Based on drivers/serial/amba.c by Russell King
10 * Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2)
11 * Pantelis Antoniou (panto@intracom.gr) (CPM1)
13 * Copyright (C) 2004 Freescale Semiconductor, Inc.
14 * (C) 2004 Intracom, S.A.
15 * (C) 2005 MontaVista Software, Inc. by Vitaly Bordug <vbordug@ru.mvista.com>
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2 of the License, or
20 * (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
33 #include <linux/config.h>
34 #include <linux/module.h>
35 #include <linux/tty.h>
36 #include <linux/ioport.h>
37 #include <linux/init.h>
38 #include <linux/serial.h>
39 #include <linux/console.h>
40 #include <linux/sysrq.h>
41 #include <linux/device.h>
42 #include <linux/bootmem.h>
43 #include <linux/dma-mapping.h>
47 #include <asm/delay.h>
49 #if defined(CONFIG_SERIAL_CPM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
53 #include <linux/serial_core.h>
54 #include <linux/kernel.h>
58 /***********************************************************************/
60 /* Track which ports are configured as uarts */
61 int cpm_uart_port_map
[UART_NR
];
62 /* How many ports did we config as uarts */
65 /**************************************************************/
67 static int cpm_uart_tx_pump(struct uart_port
*port
);
68 static void cpm_uart_init_smc(struct uart_cpm_port
*pinfo
);
69 static void cpm_uart_init_scc(struct uart_cpm_port
*pinfo
);
70 static void cpm_uart_initbd(struct uart_cpm_port
*pinfo
);
72 /**************************************************************/
74 static inline unsigned long cpu2cpm_addr(void *addr
)
76 if ((unsigned long)addr
>= CPM_ADDR
)
77 return (unsigned long)addr
;
78 return virt_to_bus(addr
);
81 static inline void *cpm2cpu_addr(unsigned long addr
)
85 return bus_to_virt(addr
);
89 * Check, if transmit buffers are processed
91 static unsigned int cpm_uart_tx_empty(struct uart_port
*port
)
93 struct uart_cpm_port
*pinfo
= (struct uart_cpm_port
*)port
;
94 volatile cbd_t
*bdp
= pinfo
->tx_bd_base
;
98 if (bdp
->cbd_sc
& BD_SC_READY
)
101 if (bdp
->cbd_sc
& BD_SC_WRAP
) {
108 pr_debug("CPM uart[%d]:tx_empty: %d\n", port
->line
, ret
);
113 static void cpm_uart_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
115 /* Whee. Do nothing. */
118 static unsigned int cpm_uart_get_mctrl(struct uart_port
*port
)
120 /* Whee. Do nothing. */
121 return TIOCM_CAR
| TIOCM_DSR
| TIOCM_CTS
;
127 static void cpm_uart_stop_tx(struct uart_port
*port
)
129 struct uart_cpm_port
*pinfo
= (struct uart_cpm_port
*)port
;
130 volatile smc_t
*smcp
= pinfo
->smcp
;
131 volatile scc_t
*sccp
= pinfo
->sccp
;
133 pr_debug("CPM uart[%d]:stop tx\n", port
->line
);
136 smcp
->smc_smcm
&= ~SMCM_TX
;
138 sccp
->scc_sccm
&= ~UART_SCCM_TX
;
144 static void cpm_uart_start_tx(struct uart_port
*port
)
146 struct uart_cpm_port
*pinfo
= (struct uart_cpm_port
*)port
;
147 volatile smc_t
*smcp
= pinfo
->smcp
;
148 volatile scc_t
*sccp
= pinfo
->sccp
;
150 pr_debug("CPM uart[%d]:start tx\n", port
->line
);
153 if (smcp
->smc_smcm
& SMCM_TX
)
156 if (sccp
->scc_sccm
& UART_SCCM_TX
)
160 if (cpm_uart_tx_pump(port
) != 0) {
162 smcp
->smc_smcm
|= SMCM_TX
;
163 smcp
->smc_smcmr
|= SMCMR_TEN
;
165 sccp
->scc_sccm
|= UART_SCCM_TX
;
166 pinfo
->sccp
->scc_gsmrl
|= SCC_GSMRL_ENT
;
174 static void cpm_uart_stop_rx(struct uart_port
*port
)
176 struct uart_cpm_port
*pinfo
= (struct uart_cpm_port
*)port
;
177 volatile smc_t
*smcp
= pinfo
->smcp
;
178 volatile scc_t
*sccp
= pinfo
->sccp
;
180 pr_debug("CPM uart[%d]:stop rx\n", port
->line
);
183 smcp
->smc_smcm
&= ~SMCM_RX
;
185 sccp
->scc_sccm
&= ~UART_SCCM_RX
;
189 * Enable Modem status interrupts
191 static void cpm_uart_enable_ms(struct uart_port
*port
)
193 pr_debug("CPM uart[%d]:enable ms\n", port
->line
);
199 static void cpm_uart_break_ctl(struct uart_port
*port
, int break_state
)
201 struct uart_cpm_port
*pinfo
= (struct uart_cpm_port
*)port
;
202 int line
= pinfo
- cpm_uart_ports
;
204 pr_debug("CPM uart[%d]:break ctrl, break_state: %d\n", port
->line
,
208 cpm_line_cr_cmd(line
, CPM_CR_STOP_TX
);
210 cpm_line_cr_cmd(line
, CPM_CR_RESTART_TX
);
214 * Transmit characters, refill buffer descriptor, if possible
216 static void cpm_uart_int_tx(struct uart_port
*port
, struct pt_regs
*regs
)
218 pr_debug("CPM uart[%d]:TX INT\n", port
->line
);
220 cpm_uart_tx_pump(port
);
226 static void cpm_uart_int_rx(struct uart_port
*port
, struct pt_regs
*regs
)
229 unsigned char ch
, *cp
;
230 struct tty_struct
*tty
= port
->info
->tty
;
231 struct uart_cpm_port
*pinfo
= (struct uart_cpm_port
*)port
;
236 pr_debug("CPM uart[%d]:RX INT\n", port
->line
);
238 /* Just loop through the closed BDs and copy the characters into
244 status
= bdp
->cbd_sc
;
245 /* If this one is empty, return happy */
246 if (status
& BD_SC_EMPTY
)
249 /* get number of characters, and check spce in flip-buffer */
252 /* If we have not enough room in tty flip buffer, then we try
253 * later, which will be the next rx-interrupt or a timeout
255 if(tty_buffer_request_room(tty
, i
) < i
) {
256 printk(KERN_WARNING
"No room in flip buffer\n");
261 cp
= cpm2cpu_addr(bdp
->cbd_bufaddr
);
263 /* loop through the buffer */
270 (BD_SC_BR
| BD_SC_FR
| BD_SC_PR
| BD_SC_OV
))
272 if (uart_handle_sysrq_char(port
, ch
, regs
))
276 tty_insert_flip_char(tty
, ch
, flg
);
278 } /* End while (i--) */
280 /* This BD is ready to be used again. Clear status. get next */
281 bdp
->cbd_sc
&= ~(BD_SC_BR
| BD_SC_FR
| BD_SC_PR
| BD_SC_OV
| BD_SC_ID
);
282 bdp
->cbd_sc
|= BD_SC_EMPTY
;
284 if (bdp
->cbd_sc
& BD_SC_WRAP
)
285 bdp
= pinfo
->rx_bd_base
;
291 /* Write back buffer pointer */
292 pinfo
->rx_cur
= (volatile cbd_t
*) bdp
;
294 /* activate BH processing */
295 tty_flip_buffer_push(tty
);
299 /* Error processing */
303 if (status
& BD_SC_BR
)
305 if (status
& BD_SC_PR
)
306 port
->icount
.parity
++;
307 if (status
& BD_SC_FR
)
308 port
->icount
.frame
++;
309 if (status
& BD_SC_OV
)
310 port
->icount
.overrun
++;
312 /* Mask out ignored conditions */
313 status
&= port
->read_status_mask
;
315 /* Handle the remaining ones */
316 if (status
& BD_SC_BR
)
318 else if (status
& BD_SC_PR
)
320 else if (status
& BD_SC_FR
)
323 /* overrun does not affect the current character ! */
324 if (status
& BD_SC_OV
) {
327 /* We skip this buffer */
328 /* CHECK: Is really nothing senseful there */
329 /* ASSUMPTION: it contains nothing valid */
339 * Asynchron mode interrupt handler
341 static irqreturn_t
cpm_uart_int(int irq
, void *data
, struct pt_regs
*regs
)
344 struct uart_port
*port
= (struct uart_port
*)data
;
345 struct uart_cpm_port
*pinfo
= (struct uart_cpm_port
*)port
;
346 volatile smc_t
*smcp
= pinfo
->smcp
;
347 volatile scc_t
*sccp
= pinfo
->sccp
;
349 pr_debug("CPM uart[%d]:IRQ\n", port
->line
);
352 events
= smcp
->smc_smce
;
353 smcp
->smc_smce
= events
;
354 if (events
& SMCM_BRKE
)
355 uart_handle_break(port
);
356 if (events
& SMCM_RX
)
357 cpm_uart_int_rx(port
, regs
);
358 if (events
& SMCM_TX
)
359 cpm_uart_int_tx(port
, regs
);
361 events
= sccp
->scc_scce
;
362 sccp
->scc_scce
= events
;
363 if (events
& UART_SCCM_BRKE
)
364 uart_handle_break(port
);
365 if (events
& UART_SCCM_RX
)
366 cpm_uart_int_rx(port
, regs
);
367 if (events
& UART_SCCM_TX
)
368 cpm_uart_int_tx(port
, regs
);
370 return (events
) ? IRQ_HANDLED
: IRQ_NONE
;
373 static int cpm_uart_startup(struct uart_port
*port
)
376 struct uart_cpm_port
*pinfo
= (struct uart_cpm_port
*)port
;
377 int line
= pinfo
- cpm_uart_ports
;
379 pr_debug("CPM uart[%d]:startup\n", port
->line
);
381 /* Install interrupt handler. */
382 retval
= request_irq(port
->irq
, cpm_uart_int
, 0, "cpm_uart", port
);
388 pinfo
->smcp
->smc_smcm
|= SMCM_RX
;
389 pinfo
->smcp
->smc_smcmr
|= SMCMR_REN
;
391 pinfo
->sccp
->scc_sccm
|= UART_SCCM_RX
;
394 if (!(pinfo
->flags
& FLAG_CONSOLE
))
395 cpm_line_cr_cmd(line
,CPM_CR_INIT_TRX
);
399 inline void cpm_uart_wait_until_send(struct uart_cpm_port
*pinfo
)
401 set_current_state(TASK_UNINTERRUPTIBLE
);
402 schedule_timeout(pinfo
->wait_closing
);
408 static void cpm_uart_shutdown(struct uart_port
*port
)
410 struct uart_cpm_port
*pinfo
= (struct uart_cpm_port
*)port
;
411 int line
= pinfo
- cpm_uart_ports
;
413 pr_debug("CPM uart[%d]:shutdown\n", port
->line
);
415 /* free interrupt handler */
416 free_irq(port
->irq
, port
);
418 /* If the port is not the console, disable Rx and Tx. */
419 if (!(pinfo
->flags
& FLAG_CONSOLE
)) {
420 /* Wait for all the BDs marked sent */
421 while(!cpm_uart_tx_empty(port
)) {
422 set_current_state(TASK_UNINTERRUPTIBLE
);
426 if (pinfo
->wait_closing
)
427 cpm_uart_wait_until_send(pinfo
);
431 volatile smc_t
*smcp
= pinfo
->smcp
;
432 smcp
->smc_smcmr
&= ~(SMCMR_REN
| SMCMR_TEN
);
433 smcp
->smc_smcm
&= ~(SMCM_RX
| SMCM_TX
);
435 volatile scc_t
*sccp
= pinfo
->sccp
;
436 sccp
->scc_gsmrl
&= ~(SCC_GSMRL_ENR
| SCC_GSMRL_ENT
);
437 sccp
->scc_sccm
&= ~(UART_SCCM_TX
| UART_SCCM_RX
);
440 /* Shut them really down and reinit buffer descriptors */
441 cpm_line_cr_cmd(line
, CPM_CR_STOP_TX
);
442 cpm_uart_initbd(pinfo
);
446 static void cpm_uart_set_termios(struct uart_port
*port
,
447 struct termios
*termios
, struct termios
*old
)
451 u16 cval
, scval
, prev_mode
;
453 struct uart_cpm_port
*pinfo
= (struct uart_cpm_port
*)port
;
454 volatile smc_t
*smcp
= pinfo
->smcp
;
455 volatile scc_t
*sccp
= pinfo
->sccp
;
457 pr_debug("CPM uart[%d]:set_termios\n", port
->line
);
459 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/ 16);
461 /* Character length programmed into the mode register is the
462 * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
463 * 1 or 2 stop bits, minus 1.
464 * The value 'bits' counts this for us.
470 switch (termios
->c_cflag
& CSIZE
) {
483 /* Never happens, but GCC is too dumb to figure it out */
490 if (termios
->c_cflag
& CSTOPB
) {
491 cval
|= SMCMR_SL
; /* Two stops */
492 scval
|= SCU_PSMR_SL
;
496 if (termios
->c_cflag
& PARENB
) {
498 scval
|= SCU_PSMR_PEN
;
500 if (!(termios
->c_cflag
& PARODD
)) {
501 cval
|= SMCMR_PM_EVEN
;
502 scval
|= (SCU_PSMR_REVP
| SCU_PSMR_TEVP
);
507 * Set up parity check flag
509 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
511 port
->read_status_mask
= (BD_SC_EMPTY
| BD_SC_OV
);
512 if (termios
->c_iflag
& INPCK
)
513 port
->read_status_mask
|= BD_SC_FR
| BD_SC_PR
;
514 if ((termios
->c_iflag
& BRKINT
) || (termios
->c_iflag
& PARMRK
))
515 port
->read_status_mask
|= BD_SC_BR
;
518 * Characters to ignore
520 port
->ignore_status_mask
= 0;
521 if (termios
->c_iflag
& IGNPAR
)
522 port
->ignore_status_mask
|= BD_SC_PR
| BD_SC_FR
;
523 if (termios
->c_iflag
& IGNBRK
) {
524 port
->ignore_status_mask
|= BD_SC_BR
;
526 * If we're ignore parity and break indicators, ignore
527 * overruns too. (For real raw support).
529 if (termios
->c_iflag
& IGNPAR
)
530 port
->ignore_status_mask
|= BD_SC_OV
;
533 * !!! ignore all characters if CREAD is not set
535 if ((termios
->c_cflag
& CREAD
) == 0)
536 port
->read_status_mask
&= ~BD_SC_EMPTY
;
538 spin_lock_irqsave(&port
->lock
, flags
);
540 /* Start bit has not been added (so don't, because we would just
541 * subtract it later), and we need to add one for the number of
542 * stops bits (there is always at least one).
546 /* Set the mode register. We want to keep a copy of the
547 * enables, because we want to put them back if they were
550 prev_mode
= smcp
->smc_smcmr
;
551 smcp
->smc_smcmr
= smcr_mk_clen(bits
) | cval
| SMCMR_SM_UART
;
552 smcp
->smc_smcmr
|= (prev_mode
& (SMCMR_REN
| SMCMR_TEN
));
554 sccp
->scc_psmr
= (sbits
<< 12) | scval
;
557 cpm_set_brg(pinfo
->brg
- 1, baud
);
558 spin_unlock_irqrestore(&port
->lock
, flags
);
562 static const char *cpm_uart_type(struct uart_port
*port
)
564 pr_debug("CPM uart[%d]:uart_type\n", port
->line
);
566 return port
->type
== PORT_CPM
? "CPM UART" : NULL
;
570 * verify the new serial_struct (for TIOCSSERIAL).
572 static int cpm_uart_verify_port(struct uart_port
*port
,
573 struct serial_struct
*ser
)
577 pr_debug("CPM uart[%d]:verify_port\n", port
->line
);
579 if (ser
->type
!= PORT_UNKNOWN
&& ser
->type
!= PORT_CPM
)
581 if (ser
->irq
< 0 || ser
->irq
>= NR_IRQS
)
583 if (ser
->baud_base
< 9600)
589 * Transmit characters, refill buffer descriptor, if possible
591 static int cpm_uart_tx_pump(struct uart_port
*port
)
596 struct uart_cpm_port
*pinfo
= (struct uart_cpm_port
*)port
;
597 struct circ_buf
*xmit
= &port
->info
->xmit
;
599 /* Handle xon/xoff */
601 /* Pick next descriptor and fill from buffer */
604 p
= cpm2cpu_addr(bdp
->cbd_bufaddr
);
608 bdp
->cbd_sc
|= BD_SC_READY
;
610 if (bdp
->cbd_sc
& BD_SC_WRAP
)
611 bdp
= pinfo
->tx_bd_base
;
621 if (uart_circ_empty(xmit
) || uart_tx_stopped(port
)) {
622 cpm_uart_stop_tx(port
);
626 /* Pick next descriptor and fill from buffer */
629 while (!(bdp
->cbd_sc
& BD_SC_READY
) && (xmit
->tail
!= xmit
->head
)) {
631 p
= cpm2cpu_addr(bdp
->cbd_bufaddr
);
632 while (count
< pinfo
->tx_fifosize
) {
633 *p
++ = xmit
->buf
[xmit
->tail
];
634 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
637 if (xmit
->head
== xmit
->tail
)
640 bdp
->cbd_datlen
= count
;
641 bdp
->cbd_sc
|= BD_SC_READY
;
644 if (bdp
->cbd_sc
& BD_SC_WRAP
)
645 bdp
= pinfo
->tx_bd_base
;
651 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
652 uart_write_wakeup(port
);
654 if (uart_circ_empty(xmit
)) {
655 cpm_uart_stop_tx(port
);
663 * init buffer descriptors
665 static void cpm_uart_initbd(struct uart_cpm_port
*pinfo
)
671 pr_debug("CPM uart[%d]:initbd\n", pinfo
->port
.line
);
673 /* Set the physical address of the host memory
674 * buffers in the buffer descriptors, and the
675 * virtual address for us to work with.
677 mem_addr
= pinfo
->mem_addr
;
678 bdp
= pinfo
->rx_cur
= pinfo
->rx_bd_base
;
679 for (i
= 0; i
< (pinfo
->rx_nrfifos
- 1); i
++, bdp
++) {
680 bdp
->cbd_bufaddr
= cpu2cpm_addr(mem_addr
);
681 bdp
->cbd_sc
= BD_SC_EMPTY
| BD_SC_INTRPT
;
682 mem_addr
+= pinfo
->rx_fifosize
;
685 bdp
->cbd_bufaddr
= cpu2cpm_addr(mem_addr
);
686 bdp
->cbd_sc
= BD_SC_WRAP
| BD_SC_EMPTY
| BD_SC_INTRPT
;
688 /* Set the physical address of the host memory
689 * buffers in the buffer descriptors, and the
690 * virtual address for us to work with.
692 mem_addr
= pinfo
->mem_addr
+ L1_CACHE_ALIGN(pinfo
->rx_nrfifos
* pinfo
->rx_fifosize
);
693 bdp
= pinfo
->tx_cur
= pinfo
->tx_bd_base
;
694 for (i
= 0; i
< (pinfo
->tx_nrfifos
- 1); i
++, bdp
++) {
695 bdp
->cbd_bufaddr
= cpu2cpm_addr(mem_addr
);
696 bdp
->cbd_sc
= BD_SC_INTRPT
;
697 mem_addr
+= pinfo
->tx_fifosize
;
700 bdp
->cbd_bufaddr
= cpu2cpm_addr(mem_addr
);
701 bdp
->cbd_sc
= BD_SC_WRAP
| BD_SC_INTRPT
;
704 static void cpm_uart_init_scc(struct uart_cpm_port
*pinfo
)
706 int line
= pinfo
- cpm_uart_ports
;
708 volatile scc_uart_t
*sup
;
710 pr_debug("CPM uart[%d]:init_scc\n", pinfo
->port
.line
);
716 pinfo
->sccup
->scc_genscc
.scc_rbase
= (unsigned char *)pinfo
->rx_bd_base
- DPRAM_BASE
;
717 pinfo
->sccup
->scc_genscc
.scc_tbase
= (unsigned char *)pinfo
->tx_bd_base
- DPRAM_BASE
;
719 /* Set up the uart parameters in the
723 cpm_set_scc_fcr(sup
);
725 sup
->scc_genscc
.scc_mrblr
= pinfo
->rx_fifosize
;
726 sup
->scc_maxidl
= pinfo
->rx_fifosize
;
735 sup
->scc_char1
= 0x8000;
736 sup
->scc_char2
= 0x8000;
737 sup
->scc_char3
= 0x8000;
738 sup
->scc_char4
= 0x8000;
739 sup
->scc_char5
= 0x8000;
740 sup
->scc_char6
= 0x8000;
741 sup
->scc_char7
= 0x8000;
742 sup
->scc_char8
= 0x8000;
743 sup
->scc_rccm
= 0xc0ff;
745 /* Send the CPM an initialize command.
747 cpm_line_cr_cmd(line
, CPM_CR_INIT_TRX
);
749 /* Set UART mode, 8 bit, no parity, one stop.
750 * Enable receive and transmit.
754 (SCC_GSMRL_MODE_UART
| SCC_GSMRL_TDCR_16
| SCC_GSMRL_RDCR_16
);
756 /* Enable rx interrupts and clear all pending events. */
758 scp
->scc_scce
= 0xffff;
759 scp
->scc_dsr
= 0x7e7e;
760 scp
->scc_psmr
= 0x3000;
762 scp
->scc_gsmrl
|= (SCC_GSMRL_ENR
| SCC_GSMRL_ENT
);
765 static void cpm_uart_init_smc(struct uart_cpm_port
*pinfo
)
767 int line
= pinfo
- cpm_uart_ports
;
769 volatile smc_uart_t
*up
;
771 pr_debug("CPM uart[%d]:init_smc\n", pinfo
->port
.line
);
777 pinfo
->smcup
->smc_rbase
= (u_char
*)pinfo
->rx_bd_base
- DPRAM_BASE
;
778 pinfo
->smcup
->smc_tbase
= (u_char
*)pinfo
->tx_bd_base
- DPRAM_BASE
;
781 * In case SMC1 is being relocated...
783 #if defined (CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
784 up
->smc_rbptr
= pinfo
->smcup
->smc_rbase
;
785 up
->smc_tbptr
= pinfo
->smcup
->smc_tbase
;
788 up
->smc_brkcr
= 1; /* number of break chars */
792 /* Set up the uart parameters in the
797 /* Using idle charater time requires some additional tuning. */
798 up
->smc_mrblr
= pinfo
->rx_fifosize
;
799 up
->smc_maxidl
= pinfo
->rx_fifosize
;
804 cpm_line_cr_cmd(line
, CPM_CR_INIT_TRX
);
806 /* Set UART mode, 8 bit, no parity, one stop.
807 * Enable receive and transmit.
809 sp
->smc_smcmr
= smcr_mk_clen(9) | SMCMR_SM_UART
;
811 /* Enable only rx interrupts clear all pending events. */
815 sp
->smc_smcmr
|= (SMCMR_REN
| SMCMR_TEN
);
819 * Initialize port. This is called from early_console stuff
820 * so we have to be careful here !
822 static int cpm_uart_request_port(struct uart_port
*port
)
824 struct uart_cpm_port
*pinfo
= (struct uart_cpm_port
*)port
;
827 pr_debug("CPM uart[%d]:request port\n", port
->line
);
829 if (pinfo
->flags
& FLAG_CONSOLE
)
833 * Setup any port IO, connect any baud rate generators,
834 * etc. This is expected to be handled by board
837 if (pinfo
->set_lineif
)
838 pinfo
->set_lineif(pinfo
);
841 pinfo
->smcp
->smc_smcm
&= ~(SMCM_RX
| SMCM_TX
);
842 pinfo
->smcp
->smc_smcmr
&= ~(SMCMR_REN
| SMCMR_TEN
);
844 pinfo
->sccp
->scc_sccm
&= ~(UART_SCCM_TX
| UART_SCCM_RX
);
845 pinfo
->sccp
->scc_gsmrl
&= ~(SCC_GSMRL_ENR
| SCC_GSMRL_ENT
);
848 ret
= cpm_uart_allocbuf(pinfo
, 0);
853 cpm_uart_initbd(pinfo
);
855 cpm_uart_init_smc(pinfo
);
857 cpm_uart_init_scc(pinfo
);
862 static void cpm_uart_release_port(struct uart_port
*port
)
864 struct uart_cpm_port
*pinfo
= (struct uart_cpm_port
*)port
;
866 if (!(pinfo
->flags
& FLAG_CONSOLE
))
867 cpm_uart_freebuf(pinfo
);
871 * Configure/autoconfigure the port.
873 static void cpm_uart_config_port(struct uart_port
*port
, int flags
)
875 pr_debug("CPM uart[%d]:config_port\n", port
->line
);
877 if (flags
& UART_CONFIG_TYPE
) {
878 port
->type
= PORT_CPM
;
879 cpm_uart_request_port(port
);
882 static struct uart_ops cpm_uart_pops
= {
883 .tx_empty
= cpm_uart_tx_empty
,
884 .set_mctrl
= cpm_uart_set_mctrl
,
885 .get_mctrl
= cpm_uart_get_mctrl
,
886 .stop_tx
= cpm_uart_stop_tx
,
887 .start_tx
= cpm_uart_start_tx
,
888 .stop_rx
= cpm_uart_stop_rx
,
889 .enable_ms
= cpm_uart_enable_ms
,
890 .break_ctl
= cpm_uart_break_ctl
,
891 .startup
= cpm_uart_startup
,
892 .shutdown
= cpm_uart_shutdown
,
893 .set_termios
= cpm_uart_set_termios
,
894 .type
= cpm_uart_type
,
895 .release_port
= cpm_uart_release_port
,
896 .request_port
= cpm_uart_request_port
,
897 .config_port
= cpm_uart_config_port
,
898 .verify_port
= cpm_uart_verify_port
,
901 struct uart_cpm_port cpm_uart_ports
[UART_NR
] = {
905 .ops
= &cpm_uart_pops
,
907 .lock
= SPIN_LOCK_UNLOCKED
,
910 .tx_nrfifos
= TX_NUM_FIFO
,
911 .tx_fifosize
= TX_BUF_SIZE
,
912 .rx_nrfifos
= RX_NUM_FIFO
,
913 .rx_fifosize
= RX_BUF_SIZE
,
914 .set_lineif
= smc1_lineif
,
919 .ops
= &cpm_uart_pops
,
921 .lock
= SPIN_LOCK_UNLOCKED
,
924 .tx_nrfifos
= TX_NUM_FIFO
,
925 .tx_fifosize
= TX_BUF_SIZE
,
926 .rx_nrfifos
= RX_NUM_FIFO
,
927 .rx_fifosize
= RX_BUF_SIZE
,
928 .set_lineif
= smc2_lineif
,
929 #ifdef CONFIG_SERIAL_CPM_ALT_SMC2
936 .ops
= &cpm_uart_pops
,
938 .lock
= SPIN_LOCK_UNLOCKED
,
940 .tx_nrfifos
= TX_NUM_FIFO
,
941 .tx_fifosize
= TX_BUF_SIZE
,
942 .rx_nrfifos
= RX_NUM_FIFO
,
943 .rx_fifosize
= RX_BUF_SIZE
,
944 .set_lineif
= scc1_lineif
,
945 .wait_closing
= SCC_WAIT_CLOSING
,
950 .ops
= &cpm_uart_pops
,
952 .lock
= SPIN_LOCK_UNLOCKED
,
954 .tx_nrfifos
= TX_NUM_FIFO
,
955 .tx_fifosize
= TX_BUF_SIZE
,
956 .rx_nrfifos
= RX_NUM_FIFO
,
957 .rx_fifosize
= RX_BUF_SIZE
,
958 .set_lineif
= scc2_lineif
,
959 .wait_closing
= SCC_WAIT_CLOSING
,
964 .ops
= &cpm_uart_pops
,
966 .lock
= SPIN_LOCK_UNLOCKED
,
968 .tx_nrfifos
= TX_NUM_FIFO
,
969 .tx_fifosize
= TX_BUF_SIZE
,
970 .rx_nrfifos
= RX_NUM_FIFO
,
971 .rx_fifosize
= RX_BUF_SIZE
,
972 .set_lineif
= scc3_lineif
,
973 .wait_closing
= SCC_WAIT_CLOSING
,
978 .ops
= &cpm_uart_pops
,
980 .lock
= SPIN_LOCK_UNLOCKED
,
982 .tx_nrfifos
= TX_NUM_FIFO
,
983 .tx_fifosize
= TX_BUF_SIZE
,
984 .rx_nrfifos
= RX_NUM_FIFO
,
985 .rx_fifosize
= RX_BUF_SIZE
,
986 .set_lineif
= scc4_lineif
,
987 .wait_closing
= SCC_WAIT_CLOSING
,
991 #ifdef CONFIG_SERIAL_CPM_CONSOLE
993 * Print a string to the serial port trying not to disturb
994 * any possible real use of the port...
996 * Note that this is called with interrupts already disabled
998 static void cpm_uart_console_write(struct console
*co
, const char *s
,
1001 struct uart_cpm_port
*pinfo
=
1002 &cpm_uart_ports
[cpm_uart_port_map
[co
->index
]];
1004 volatile cbd_t
*bdp
, *bdbase
;
1005 volatile unsigned char *cp
;
1007 /* Get the address of the host memory buffer.
1009 bdp
= pinfo
->tx_cur
;
1010 bdbase
= pinfo
->tx_bd_base
;
1013 * Now, do each character. This is not as bad as it looks
1014 * since this is a holding FIFO and not a transmitting FIFO.
1015 * We could add the complexity of filling the entire transmit
1016 * buffer, but we would just wait longer between accesses......
1018 for (i
= 0; i
< count
; i
++, s
++) {
1019 /* Wait for transmitter fifo to empty.
1020 * Ready indicates output is ready, and xmt is doing
1021 * that, not that it is ready for us to send.
1023 while ((bdp
->cbd_sc
& BD_SC_READY
) != 0)
1026 /* Send the character out.
1027 * If the buffer address is in the CPM DPRAM, don't
1030 cp
= cpm2cpu_addr(bdp
->cbd_bufaddr
);
1034 bdp
->cbd_datlen
= 1;
1035 bdp
->cbd_sc
|= BD_SC_READY
;
1037 if (bdp
->cbd_sc
& BD_SC_WRAP
)
1042 /* if a LF, also do CR... */
1044 while ((bdp
->cbd_sc
& BD_SC_READY
) != 0)
1047 cp
= cpm2cpu_addr(bdp
->cbd_bufaddr
);
1050 bdp
->cbd_datlen
= 1;
1051 bdp
->cbd_sc
|= BD_SC_READY
;
1053 if (bdp
->cbd_sc
& BD_SC_WRAP
)
1061 * Finally, Wait for transmitter & holding register to empty
1062 * and restore the IER
1064 while ((bdp
->cbd_sc
& BD_SC_READY
) != 0)
1067 pinfo
->tx_cur
= (volatile cbd_t
*) bdp
;
1071 * Setup console. Be careful is called early !
1073 static int __init
cpm_uart_console_setup(struct console
*co
, char *options
)
1075 struct uart_port
*port
;
1076 struct uart_cpm_port
*pinfo
;
1084 (struct uart_port
*)&cpm_uart_ports
[cpm_uart_port_map
[co
->index
]];
1085 pinfo
= (struct uart_cpm_port
*)port
;
1087 pinfo
->flags
|= FLAG_CONSOLE
;
1090 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
1092 bd_t
*bd
= (bd_t
*) __res
;
1094 if (bd
->bi_baudrate
)
1095 baud
= bd
->bi_baudrate
;
1101 * Setup any port IO, connect any baud rate generators,
1102 * etc. This is expected to be handled by board
1105 if (pinfo
->set_lineif
)
1106 pinfo
->set_lineif(pinfo
);
1108 if (IS_SMC(pinfo
)) {
1109 pinfo
->smcp
->smc_smcm
&= ~(SMCM_RX
| SMCM_TX
);
1110 pinfo
->smcp
->smc_smcmr
&= ~(SMCMR_REN
| SMCMR_TEN
);
1112 pinfo
->sccp
->scc_sccm
&= ~(UART_SCCM_TX
| UART_SCCM_RX
);
1113 pinfo
->sccp
->scc_gsmrl
&= ~(SCC_GSMRL_ENR
| SCC_GSMRL_ENT
);
1116 ret
= cpm_uart_allocbuf(pinfo
, 1);
1121 cpm_uart_initbd(pinfo
);
1124 cpm_uart_init_smc(pinfo
);
1126 cpm_uart_init_scc(pinfo
);
1128 uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
1133 static struct uart_driver cpm_reg
;
1134 static struct console cpm_scc_uart_console
= {
1136 .write
= cpm_uart_console_write
,
1137 .device
= uart_console_device
,
1138 .setup
= cpm_uart_console_setup
,
1139 .flags
= CON_PRINTBUFFER
,
1144 int __init
cpm_uart_console_init(void)
1146 int ret
= cpm_uart_init_portdesc();
1149 register_console(&cpm_scc_uart_console
);
1153 console_initcall(cpm_uart_console_init
);
1155 #define CPM_UART_CONSOLE &cpm_scc_uart_console
1157 #define CPM_UART_CONSOLE NULL
1160 static struct uart_driver cpm_reg
= {
1161 .owner
= THIS_MODULE
,
1162 .driver_name
= "ttyCPM",
1163 .dev_name
= "ttyCPM",
1164 .major
= SERIAL_CPM_MAJOR
,
1165 .minor
= SERIAL_CPM_MINOR
,
1166 .cons
= CPM_UART_CONSOLE
,
1169 static int __init
cpm_uart_init(void)
1173 printk(KERN_INFO
"Serial: CPM driver $Revision: 0.01 $\n");
1175 #ifndef CONFIG_SERIAL_CPM_CONSOLE
1176 ret
= cpm_uart_init_portdesc();
1181 cpm_reg
.nr
= cpm_uart_nr
;
1182 ret
= uart_register_driver(&cpm_reg
);
1187 for (i
= 0; i
< cpm_uart_nr
; i
++) {
1188 int con
= cpm_uart_port_map
[i
];
1189 cpm_uart_ports
[con
].port
.line
= i
;
1190 cpm_uart_ports
[con
].port
.flags
= UPF_BOOT_AUTOCONF
;
1191 uart_add_one_port(&cpm_reg
, &cpm_uart_ports
[con
].port
);
1197 static void __exit
cpm_uart_exit(void)
1201 for (i
= 0; i
< cpm_uart_nr
; i
++) {
1202 int con
= cpm_uart_port_map
[i
];
1203 uart_remove_one_port(&cpm_reg
, &cpm_uart_ports
[con
].port
);
1206 uart_unregister_driver(&cpm_reg
);
1209 module_init(cpm_uart_init
);
1210 module_exit(cpm_uart_exit
);
1212 MODULE_AUTHOR("Kumar Gala/Antoniou Pantelis");
1213 MODULE_DESCRIPTION("CPM SCC/SMC port driver $Revision: 0.01 $");
1214 MODULE_LICENSE("GPL");
1215 MODULE_ALIAS_CHARDEV(SERIAL_CPM_MAJOR
, SERIAL_CPM_MINOR
);