2 * i8042 keyboard and mouse controller driver for Linux
4 * Copyright (c) 1999-2004 Vojtech Pavlik
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
13 #include <linux/delay.h>
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/interrupt.h>
17 #include <linux/ioport.h>
18 #include <linux/init.h>
19 #include <linux/serio.h>
20 #include <linux/err.h>
21 #include <linux/rcupdate.h>
22 #include <linux/platform_device.h>
23 #include <linux/i8042.h>
27 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
28 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
29 MODULE_LICENSE("GPL");
31 static unsigned int i8042_nokbd
;
32 module_param_named(nokbd
, i8042_nokbd
, bool, 0);
33 MODULE_PARM_DESC(nokbd
, "Do not probe or use KBD port.");
35 static unsigned int i8042_noaux
;
36 module_param_named(noaux
, i8042_noaux
, bool, 0);
37 MODULE_PARM_DESC(noaux
, "Do not probe or use AUX (mouse) port.");
39 static unsigned int i8042_nomux
;
40 module_param_named(nomux
, i8042_nomux
, bool, 0);
41 MODULE_PARM_DESC(nomux
, "Do not check whether an active multiplexing conrtoller is present.");
43 static unsigned int i8042_unlock
;
44 module_param_named(unlock
, i8042_unlock
, bool, 0);
45 MODULE_PARM_DESC(unlock
, "Ignore keyboard lock.");
47 static unsigned int i8042_reset
;
48 module_param_named(reset
, i8042_reset
, bool, 0);
49 MODULE_PARM_DESC(reset
, "Reset controller during init and cleanup.");
51 static unsigned int i8042_direct
;
52 module_param_named(direct
, i8042_direct
, bool, 0);
53 MODULE_PARM_DESC(direct
, "Put keyboard port into non-translated mode.");
55 static unsigned int i8042_dumbkbd
;
56 module_param_named(dumbkbd
, i8042_dumbkbd
, bool, 0);
57 MODULE_PARM_DESC(dumbkbd
, "Pretend that controller can only read data from keyboard");
59 static unsigned int i8042_noloop
;
60 module_param_named(noloop
, i8042_noloop
, bool, 0);
61 MODULE_PARM_DESC(noloop
, "Disable the AUX Loopback command while probing for the AUX port");
63 static unsigned int i8042_blink_frequency
= 500;
64 module_param_named(panicblink
, i8042_blink_frequency
, uint
, 0600);
65 MODULE_PARM_DESC(panicblink
, "Frequency with which keyboard LEDs should blink when kernel panics");
68 static int i8042_nopnp
;
69 module_param_named(nopnp
, i8042_nopnp
, bool, 0);
70 MODULE_PARM_DESC(nopnp
, "Do not use PNP to detect controller settings");
75 static int i8042_debug
;
76 module_param_named(debug
, i8042_debug
, bool, 0600);
77 MODULE_PARM_DESC(debug
, "Turn i8042 debugging mode on and off");
82 static DEFINE_SPINLOCK(i8042_lock
);
91 #define I8042_KBD_PORT_NO 0
92 #define I8042_AUX_PORT_NO 1
93 #define I8042_MUX_PORT_NO 2
94 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
96 static struct i8042_port i8042_ports
[I8042_NUM_PORTS
];
98 static unsigned char i8042_initial_ctr
;
99 static unsigned char i8042_ctr
;
100 static unsigned char i8042_mux_present
;
101 static unsigned char i8042_kbd_irq_registered
;
102 static unsigned char i8042_aux_irq_registered
;
103 static unsigned char i8042_suppress_kbd_ack
;
104 static struct platform_device
*i8042_platform_device
;
106 static irqreturn_t
i8042_interrupt(int irq
, void *dev_id
);
109 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
110 * be ready for reading values from it / writing values to it.
111 * Called always with i8042_lock held.
114 static int i8042_wait_read(void)
118 while ((~i8042_read_status() & I8042_STR_OBF
) && (i
< I8042_CTL_TIMEOUT
)) {
122 return -(i
== I8042_CTL_TIMEOUT
);
125 static int i8042_wait_write(void)
129 while ((i8042_read_status() & I8042_STR_IBF
) && (i
< I8042_CTL_TIMEOUT
)) {
133 return -(i
== I8042_CTL_TIMEOUT
);
137 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
138 * of the i8042 down the toilet.
141 static int i8042_flush(void)
144 unsigned char data
, str
;
147 spin_lock_irqsave(&i8042_lock
, flags
);
149 while (((str
= i8042_read_status()) & I8042_STR_OBF
) && (i
< I8042_BUFFER_SIZE
)) {
151 data
= i8042_read_data();
153 dbg("%02x <- i8042 (flush, %s)", data
,
154 str
& I8042_STR_AUXDATA
? "aux" : "kbd");
157 spin_unlock_irqrestore(&i8042_lock
, flags
);
163 * i8042_command() executes a command on the i8042. It also sends the input
164 * parameter(s) of the commands to it, and receives the output value(s). The
165 * parameters are to be stored in the param array, and the output is placed
166 * into the same array. The number of the parameters and output values is
167 * encoded in bits 8-11 of the command number.
170 static int __i8042_command(unsigned char *param
, int command
)
174 if (i8042_noloop
&& command
== I8042_CMD_AUX_LOOP
)
177 error
= i8042_wait_write();
181 dbg("%02x -> i8042 (command)", command
& 0xff);
182 i8042_write_command(command
& 0xff);
184 for (i
= 0; i
< ((command
>> 12) & 0xf); i
++) {
185 error
= i8042_wait_write();
188 dbg("%02x -> i8042 (parameter)", param
[i
]);
189 i8042_write_data(param
[i
]);
192 for (i
= 0; i
< ((command
>> 8) & 0xf); i
++) {
193 error
= i8042_wait_read();
195 dbg(" -- i8042 (timeout)");
199 if (command
== I8042_CMD_AUX_LOOP
&&
200 !(i8042_read_status() & I8042_STR_AUXDATA
)) {
201 dbg(" -- i8042 (auxerr)");
205 param
[i
] = i8042_read_data();
206 dbg("%02x <- i8042 (return)", param
[i
]);
212 int i8042_command(unsigned char *param
, int command
)
217 spin_lock_irqsave(&i8042_lock
, flags
);
218 retval
= __i8042_command(param
, command
);
219 spin_unlock_irqrestore(&i8042_lock
, flags
);
223 EXPORT_SYMBOL(i8042_command
);
226 * i8042_kbd_write() sends a byte out through the keyboard interface.
229 static int i8042_kbd_write(struct serio
*port
, unsigned char c
)
234 spin_lock_irqsave(&i8042_lock
, flags
);
236 if (!(retval
= i8042_wait_write())) {
237 dbg("%02x -> i8042 (kbd-data)", c
);
241 spin_unlock_irqrestore(&i8042_lock
, flags
);
247 * i8042_aux_write() sends a byte out through the aux interface.
250 static int i8042_aux_write(struct serio
*serio
, unsigned char c
)
252 struct i8042_port
*port
= serio
->port_data
;
254 return i8042_command(&c
, port
->mux
== -1 ?
256 I8042_CMD_MUX_SEND
+ port
->mux
);
260 * i8042_start() is called by serio core when port is about to finish
261 * registering. It will mark port as existing so i8042_interrupt can
262 * start sending data through it.
264 static int i8042_start(struct serio
*serio
)
266 struct i8042_port
*port
= serio
->port_data
;
274 * i8042_stop() marks serio port as non-existing so i8042_interrupt
275 * will not try to send data to the port that is about to go away.
276 * The function is called by serio core as part of unregister procedure.
278 static void i8042_stop(struct serio
*serio
)
280 struct i8042_port
*port
= serio
->port_data
;
288 * i8042_interrupt() is the most important function in this driver -
289 * it handles the interrupts from the i8042, and sends incoming bytes
290 * to the upper layers.
293 static irqreturn_t
i8042_interrupt(int irq
, void *dev_id
)
295 struct i8042_port
*port
;
297 unsigned char str
, data
;
299 unsigned int port_no
;
302 spin_lock_irqsave(&i8042_lock
, flags
);
303 str
= i8042_read_status();
304 if (unlikely(~str
& I8042_STR_OBF
)) {
305 spin_unlock_irqrestore(&i8042_lock
, flags
);
306 if (irq
) dbg("Interrupt %d, without any data", irq
);
310 data
= i8042_read_data();
311 spin_unlock_irqrestore(&i8042_lock
, flags
);
313 if (i8042_mux_present
&& (str
& I8042_STR_AUXDATA
)) {
314 static unsigned long last_transmit
;
315 static unsigned char last_str
;
318 if (str
& I8042_STR_MUXERR
) {
319 dbg("MUX error, status is %02x, data is %02x", str
, data
);
321 * When MUXERR condition is signalled the data register can only contain
322 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
323 * it is not always the case. Some KBCs also report 0xfc when there is
324 * nothing connected to the port while others sometimes get confused which
325 * port the data came from and signal error leaving the data intact. They
326 * _do not_ revert to legacy mode (actually I've never seen KBC reverting
327 * to legacy mode yet, when we see one we'll add proper handling).
328 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
329 * rest assume that the data came from the same serio last byte
330 * was transmitted (if transmission happened not too long ago).
335 if (time_before(jiffies
, last_transmit
+ HZ
/10)) {
339 /* fall through - report timeout */
342 case 0xfe: dfl
= SERIO_TIMEOUT
; data
= 0xfe; break;
343 case 0xff: dfl
= SERIO_PARITY
; data
= 0xfe; break;
347 port_no
= I8042_MUX_PORT_NO
+ ((str
>> 6) & 3);
349 last_transmit
= jiffies
;
352 dfl
= ((str
& I8042_STR_PARITY
) ? SERIO_PARITY
: 0) |
353 ((str
& I8042_STR_TIMEOUT
) ? SERIO_TIMEOUT
: 0);
355 port_no
= (str
& I8042_STR_AUXDATA
) ?
356 I8042_AUX_PORT_NO
: I8042_KBD_PORT_NO
;
359 port
= &i8042_ports
[port_no
];
361 dbg("%02x <- i8042 (interrupt, %d, %d%s%s)",
363 dfl
& SERIO_PARITY
? ", bad parity" : "",
364 dfl
& SERIO_TIMEOUT
? ", timeout" : "");
366 if (unlikely(i8042_suppress_kbd_ack
))
367 if (port_no
== I8042_KBD_PORT_NO
&&
368 (data
== 0xfa || data
== 0xfe)) {
369 i8042_suppress_kbd_ack
--;
373 if (likely(port
->exists
))
374 serio_interrupt(port
->serio
, data
, dfl
);
377 return IRQ_RETVAL(ret
);
381 * i8042_enable_kbd_port enables keybaord port on chip
384 static int i8042_enable_kbd_port(void)
386 i8042_ctr
&= ~I8042_CTR_KBDDIS
;
387 i8042_ctr
|= I8042_CTR_KBDINT
;
389 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
390 i8042_ctr
&= ~I8042_CTR_KBDINT
;
391 i8042_ctr
|= I8042_CTR_KBDDIS
;
392 printk(KERN_ERR
"i8042.c: Failed to enable KBD port.\n");
400 * i8042_enable_aux_port enables AUX (mouse) port on chip
403 static int i8042_enable_aux_port(void)
405 i8042_ctr
&= ~I8042_CTR_AUXDIS
;
406 i8042_ctr
|= I8042_CTR_AUXINT
;
408 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
409 i8042_ctr
&= ~I8042_CTR_AUXINT
;
410 i8042_ctr
|= I8042_CTR_AUXDIS
;
411 printk(KERN_ERR
"i8042.c: Failed to enable AUX port.\n");
419 * i8042_enable_mux_ports enables 4 individual AUX ports after
420 * the controller has been switched into Multiplexed mode
423 static int i8042_enable_mux_ports(void)
428 for (i
= 0; i
< I8042_NUM_MUX_PORTS
; i
++) {
429 i8042_command(¶m
, I8042_CMD_MUX_PFX
+ i
);
430 i8042_command(¶m
, I8042_CMD_AUX_ENABLE
);
433 return i8042_enable_aux_port();
437 * i8042_set_mux_mode checks whether the controller has an active
438 * multiplexor and puts the chip into Multiplexed (1) or Legacy (0) mode.
441 static int i8042_set_mux_mode(unsigned int mode
, unsigned char *mux_version
)
446 * Get rid of bytes in the queue.
452 * Internal loopback test - send three bytes, they should come back from the
453 * mouse interface, the last should be version.
457 if (i8042_command(¶m
, I8042_CMD_AUX_LOOP
) || param
!= 0xf0)
459 param
= mode
? 0x56 : 0xf6;
460 if (i8042_command(¶m
, I8042_CMD_AUX_LOOP
) || param
!= (mode
? 0x56 : 0xf6))
462 param
= mode
? 0xa4 : 0xa5;
463 if (i8042_command(¶m
, I8042_CMD_AUX_LOOP
) || param
== (mode
? 0xa4 : 0xa5))
467 *mux_version
= param
;
473 * i8042_check_mux() checks whether the controller supports the PS/2 Active
474 * Multiplexing specification by Synaptics, Phoenix, Insyde and
478 static int __devinit
i8042_check_mux(void)
480 unsigned char mux_version
;
482 if (i8042_set_mux_mode(1, &mux_version
))
486 * Workaround for interference with USB Legacy emulation
487 * that causes a v10.12 MUX to be found.
489 if (mux_version
== 0xAC)
492 printk(KERN_INFO
"i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
493 (mux_version
>> 4) & 0xf, mux_version
& 0xf);
496 * Disable all muxed ports by disabling AUX.
498 i8042_ctr
|= I8042_CTR_AUXDIS
;
499 i8042_ctr
&= ~I8042_CTR_AUXINT
;
501 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
502 printk(KERN_ERR
"i8042.c: Failed to disable AUX port, can't use MUX.\n");
506 i8042_mux_present
= 1;
512 * The following is used to test AUX IRQ delivery.
514 static struct completion i8042_aux_irq_delivered __devinitdata
;
515 static int i8042_irq_being_tested __devinitdata
;
517 static irqreturn_t __devinit
i8042_aux_test_irq(int irq
, void *dev_id
)
520 unsigned char str
, data
;
523 spin_lock_irqsave(&i8042_lock
, flags
);
524 str
= i8042_read_status();
525 if (str
& I8042_STR_OBF
) {
526 data
= i8042_read_data();
527 if (i8042_irq_being_tested
&&
528 data
== 0xa5 && (str
& I8042_STR_AUXDATA
))
529 complete(&i8042_aux_irq_delivered
);
532 spin_unlock_irqrestore(&i8042_lock
, flags
);
534 return IRQ_RETVAL(ret
);
538 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
539 * verifies success by readinng CTR. Used when testing for presence of AUX
542 static int __devinit
i8042_toggle_aux(int on
)
547 if (i8042_command(¶m
,
548 on
? I8042_CMD_AUX_ENABLE
: I8042_CMD_AUX_DISABLE
))
551 /* some chips need some time to set the I8042_CTR_AUXDIS bit */
552 for (i
= 0; i
< 100; i
++) {
555 if (i8042_command(¶m
, I8042_CMD_CTL_RCTR
))
558 if (!(param
& I8042_CTR_AUXDIS
) == on
)
566 * i8042_check_aux() applies as much paranoia as it can at detecting
567 * the presence of an AUX interface.
570 static int __devinit
i8042_check_aux(void)
573 int irq_registered
= 0;
574 int aux_loop_broken
= 0;
579 * Get rid of bytes in the queue.
585 * Internal loopback test - filters out AT-type i8042's. Unfortunately
586 * SiS screwed up and their 5597 doesn't support the LOOP command even
587 * though it has an AUX port.
591 retval
= i8042_command(¶m
, I8042_CMD_AUX_LOOP
);
592 if (retval
|| param
!= 0x5a) {
595 * External connection test - filters out AT-soldered PS/2 i8042's
596 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
597 * 0xfa - no error on some notebooks which ignore the spec
598 * Because it's common for chipsets to return error on perfectly functioning
599 * AUX ports, we test for this only when the LOOP command failed.
602 if (i8042_command(¶m
, I8042_CMD_AUX_TEST
) ||
603 (param
&& param
!= 0xfa && param
!= 0xff))
607 * If AUX_LOOP completed without error but returned unexpected data
615 * Bit assignment test - filters out PS/2 i8042's in AT mode
618 if (i8042_toggle_aux(0)) {
619 printk(KERN_WARNING
"Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
620 printk(KERN_WARNING
"If AUX port is really absent please use the 'i8042.noaux' option.\n");
623 if (i8042_toggle_aux(1))
627 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
628 * used it for a PCI card or somethig else.
631 if (i8042_noloop
|| aux_loop_broken
) {
633 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
634 * is working and hope we are right.
640 if (request_irq(I8042_AUX_IRQ
, i8042_aux_test_irq
, IRQF_SHARED
,
641 "i8042", i8042_platform_device
))
646 if (i8042_enable_aux_port())
649 spin_lock_irqsave(&i8042_lock
, flags
);
651 init_completion(&i8042_aux_irq_delivered
);
652 i8042_irq_being_tested
= 1;
655 retval
= __i8042_command(¶m
, I8042_CMD_AUX_LOOP
& 0xf0ff);
657 spin_unlock_irqrestore(&i8042_lock
, flags
);
662 if (wait_for_completion_timeout(&i8042_aux_irq_delivered
,
663 msecs_to_jiffies(250)) == 0) {
665 * AUX IRQ was never delivered so we need to flush the controller to
666 * get rid of the byte we put there; otherwise keyboard may not work.
675 * Disable the interface.
678 i8042_ctr
|= I8042_CTR_AUXDIS
;
679 i8042_ctr
&= ~I8042_CTR_AUXINT
;
681 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
))
685 free_irq(I8042_AUX_IRQ
, i8042_platform_device
);
690 static int i8042_controller_check(void)
692 if (i8042_flush() == I8042_BUFFER_SIZE
) {
693 printk(KERN_ERR
"i8042.c: No controller found.\n");
700 static int i8042_controller_selftest(void)
707 if (i8042_command(¶m
, I8042_CMD_CTL_TEST
)) {
708 printk(KERN_ERR
"i8042.c: i8042 controller self test timeout.\n");
712 if (param
!= I8042_RET_CTL_TEST
) {
713 printk(KERN_ERR
"i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
714 param
, I8042_RET_CTL_TEST
);
722 * i8042_controller init initializes the i8042 controller, and,
723 * most importantly, sets it into non-xlated mode if that's
727 static int i8042_controller_init(void)
732 * Save the CTR for restoral on unload / reboot.
735 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_RCTR
)) {
736 printk(KERN_ERR
"i8042.c: Can't read CTR while initializing i8042.\n");
740 i8042_initial_ctr
= i8042_ctr
;
743 * Disable the keyboard interface and interrupt.
746 i8042_ctr
|= I8042_CTR_KBDDIS
;
747 i8042_ctr
&= ~I8042_CTR_KBDINT
;
753 spin_lock_irqsave(&i8042_lock
, flags
);
754 if (~i8042_read_status() & I8042_STR_KEYLOCK
) {
756 i8042_ctr
|= I8042_CTR_IGNKEYLOCK
;
758 printk(KERN_WARNING
"i8042.c: Warning: Keylock active.\n");
760 spin_unlock_irqrestore(&i8042_lock
, flags
);
763 * If the chip is configured into nontranslated mode by the BIOS, don't
764 * bother enabling translating and be happy.
767 if (~i8042_ctr
& I8042_CTR_XLATE
)
771 * Set nontranslated mode for the kbd interface if requested by an option.
772 * After this the kbd interface becomes a simple serial in/out, like the aux
773 * interface is. We don't do this by default, since it can confuse notebook
778 i8042_ctr
&= ~I8042_CTR_XLATE
;
784 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
785 printk(KERN_ERR
"i8042.c: Can't write CTR while initializing i8042.\n");
794 * Reset the controller and reset CRT to the original value set by BIOS.
797 static void i8042_controller_reset(void)
802 * Disable both KBD and AUX interfaces so they don't get in the way
805 i8042_ctr
|= I8042_CTR_KBDDIS
| I8042_CTR_AUXDIS
;
806 i8042_ctr
&= ~(I8042_CTR_KBDINT
| I8042_CTR_AUXINT
);
809 * Disable MUX mode if present.
812 if (i8042_mux_present
)
813 i8042_set_mux_mode(0, NULL
);
816 * Reset the controller if requested.
819 i8042_controller_selftest();
822 * Restore the original control register setting.
825 if (i8042_command(&i8042_initial_ctr
, I8042_CMD_CTL_WCTR
))
826 printk(KERN_WARNING
"i8042.c: Can't restore CTR.\n");
831 * i8042_panic_blink() will flash the keyboard LEDs and is called when
832 * kernel panics. Flashing LEDs is useful for users running X who may
833 * not see the console and will help distingushing panics from "real"
836 * Note that DELAY has a limit of 10ms so we will not get stuck here
837 * waiting for KBC to free up even if KBD interrupt is off
840 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
842 static long i8042_panic_blink(long count
)
845 static long last_blink
;
849 * We expect frequency to be about 1/2s. KDB uses about 1s.
850 * Make sure they are different.
852 if (!i8042_blink_frequency
)
854 if (count
- last_blink
< i8042_blink_frequency
)
858 while (i8042_read_status() & I8042_STR_IBF
)
860 dbg("%02x -> i8042 (panic blink)", 0xed);
861 i8042_suppress_kbd_ack
= 2;
862 i8042_write_data(0xed); /* set leds */
864 while (i8042_read_status() & I8042_STR_IBF
)
867 dbg("%02x -> i8042 (panic blink)", led
);
868 i8042_write_data(led
);
878 * Here we try to restore the original BIOS settings. We only want to
879 * do that once, when we really suspend, not when we taking memory
880 * snapshot for swsusp (in this case we'll perform required cleanup
881 * as part of shutdown process).
884 static int i8042_suspend(struct platform_device
*dev
, pm_message_t state
)
886 if (dev
->dev
.power
.power_state
.event
!= state
.event
) {
887 if (state
.event
== PM_EVENT_SUSPEND
)
888 i8042_controller_reset();
890 dev
->dev
.power
.power_state
= state
;
898 * Here we try to reset everything back to a state in which suspended
901 static int i8042_resume(struct platform_device
*dev
)
906 * Do not bother with restoring state if we haven't suspened yet
908 if (dev
->dev
.power
.power_state
.event
== PM_EVENT_ON
)
911 error
= i8042_controller_check();
915 error
= i8042_controller_selftest();
920 * Restore original CTR value and disable all ports
923 i8042_ctr
= i8042_initial_ctr
;
925 i8042_ctr
&= ~I8042_CTR_XLATE
;
926 i8042_ctr
|= I8042_CTR_AUXDIS
| I8042_CTR_KBDDIS
;
927 i8042_ctr
&= ~(I8042_CTR_AUXINT
| I8042_CTR_KBDINT
);
928 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
929 printk(KERN_ERR
"i8042: Can't write CTR to resume\n");
933 if (i8042_mux_present
) {
934 if (i8042_set_mux_mode(1, NULL
) || i8042_enable_mux_ports())
936 "i8042: failed to resume active multiplexor, "
937 "mouse won't work.\n");
938 } else if (i8042_ports
[I8042_AUX_PORT_NO
].serio
)
939 i8042_enable_aux_port();
941 if (i8042_ports
[I8042_KBD_PORT_NO
].serio
)
942 i8042_enable_kbd_port();
944 i8042_interrupt(0, NULL
);
946 dev
->dev
.power
.power_state
= PMSG_ON
;
950 #endif /* CONFIG_PM */
953 * We need to reset the 8042 back to original mode on system shutdown,
954 * because otherwise BIOSes will be confused.
957 static void i8042_shutdown(struct platform_device
*dev
)
959 i8042_controller_reset();
962 static int __devinit
i8042_create_kbd_port(void)
965 struct i8042_port
*port
= &i8042_ports
[I8042_KBD_PORT_NO
];
967 serio
= kzalloc(sizeof(struct serio
), GFP_KERNEL
);
971 serio
->id
.type
= i8042_direct
? SERIO_8042
: SERIO_8042_XL
;
972 serio
->write
= i8042_dumbkbd
? NULL
: i8042_kbd_write
;
973 serio
->start
= i8042_start
;
974 serio
->stop
= i8042_stop
;
975 serio
->port_data
= port
;
976 serio
->dev
.parent
= &i8042_platform_device
->dev
;
977 strlcpy(serio
->name
, "i8042 KBD port", sizeof(serio
->name
));
978 strlcpy(serio
->phys
, I8042_KBD_PHYS_DESC
, sizeof(serio
->phys
));
981 port
->irq
= I8042_KBD_IRQ
;
986 static int __devinit
i8042_create_aux_port(int idx
)
989 int port_no
= idx
< 0 ? I8042_AUX_PORT_NO
: I8042_MUX_PORT_NO
+ idx
;
990 struct i8042_port
*port
= &i8042_ports
[port_no
];
992 serio
= kzalloc(sizeof(struct serio
), GFP_KERNEL
);
996 serio
->id
.type
= SERIO_8042
;
997 serio
->write
= i8042_aux_write
;
998 serio
->start
= i8042_start
;
999 serio
->stop
= i8042_stop
;
1000 serio
->port_data
= port
;
1001 serio
->dev
.parent
= &i8042_platform_device
->dev
;
1003 strlcpy(serio
->name
, "i8042 AUX port", sizeof(serio
->name
));
1004 strlcpy(serio
->phys
, I8042_AUX_PHYS_DESC
, sizeof(serio
->phys
));
1006 snprintf(serio
->name
, sizeof(serio
->name
), "i8042 AUX%d port", idx
);
1007 snprintf(serio
->phys
, sizeof(serio
->phys
), I8042_MUX_PHYS_DESC
, idx
+ 1);
1010 port
->serio
= serio
;
1012 port
->irq
= I8042_AUX_IRQ
;
1017 static void __devinit
i8042_free_kbd_port(void)
1019 kfree(i8042_ports
[I8042_KBD_PORT_NO
].serio
);
1020 i8042_ports
[I8042_KBD_PORT_NO
].serio
= NULL
;
1023 static void __devinit
i8042_free_aux_ports(void)
1027 for (i
= I8042_AUX_PORT_NO
; i
< I8042_NUM_PORTS
; i
++) {
1028 kfree(i8042_ports
[i
].serio
);
1029 i8042_ports
[i
].serio
= NULL
;
1033 static void __devinit
i8042_register_ports(void)
1037 for (i
= 0; i
< I8042_NUM_PORTS
; i
++) {
1038 if (i8042_ports
[i
].serio
) {
1039 printk(KERN_INFO
"serio: %s at %#lx,%#lx irq %d\n",
1040 i8042_ports
[i
].serio
->name
,
1041 (unsigned long) I8042_DATA_REG
,
1042 (unsigned long) I8042_COMMAND_REG
,
1043 i8042_ports
[i
].irq
);
1044 serio_register_port(i8042_ports
[i
].serio
);
1049 static void __devexit
i8042_unregister_ports(void)
1053 for (i
= 0; i
< I8042_NUM_PORTS
; i
++) {
1054 if (i8042_ports
[i
].serio
) {
1055 serio_unregister_port(i8042_ports
[i
].serio
);
1056 i8042_ports
[i
].serio
= NULL
;
1061 static void i8042_free_irqs(void)
1063 if (i8042_aux_irq_registered
)
1064 free_irq(I8042_AUX_IRQ
, i8042_platform_device
);
1065 if (i8042_kbd_irq_registered
)
1066 free_irq(I8042_KBD_IRQ
, i8042_platform_device
);
1068 i8042_aux_irq_registered
= i8042_kbd_irq_registered
= 0;
1071 static int __devinit
i8042_setup_aux(void)
1073 int (*aux_enable
)(void);
1077 if (i8042_check_aux())
1080 if (i8042_nomux
|| i8042_check_mux()) {
1081 error
= i8042_create_aux_port(-1);
1083 goto err_free_ports
;
1084 aux_enable
= i8042_enable_aux_port
;
1086 for (i
= 0; i
< I8042_NUM_MUX_PORTS
; i
++) {
1087 error
= i8042_create_aux_port(i
);
1089 goto err_free_ports
;
1091 aux_enable
= i8042_enable_mux_ports
;
1094 error
= request_irq(I8042_AUX_IRQ
, i8042_interrupt
, IRQF_SHARED
,
1095 "i8042", i8042_platform_device
);
1097 goto err_free_ports
;
1102 i8042_aux_irq_registered
= 1;
1106 free_irq(I8042_AUX_IRQ
, i8042_platform_device
);
1108 i8042_free_aux_ports();
1112 static int __devinit
i8042_setup_kbd(void)
1116 error
= i8042_create_kbd_port();
1120 error
= request_irq(I8042_KBD_IRQ
, i8042_interrupt
, IRQF_SHARED
,
1121 "i8042", i8042_platform_device
);
1125 error
= i8042_enable_kbd_port();
1129 i8042_kbd_irq_registered
= 1;
1133 free_irq(I8042_KBD_IRQ
, i8042_platform_device
);
1135 i8042_free_kbd_port();
1139 static int __devinit
i8042_probe(struct platform_device
*dev
)
1143 error
= i8042_controller_selftest();
1147 error
= i8042_controller_init();
1152 error
= i8042_setup_aux();
1153 if (error
&& error
!= -ENODEV
&& error
!= -EBUSY
)
1158 error
= i8042_setup_kbd();
1164 * Ok, everything is ready, let's register all serio ports
1166 i8042_register_ports();
1171 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1173 i8042_controller_reset();
1178 static int __devexit
i8042_remove(struct platform_device
*dev
)
1180 i8042_unregister_ports();
1182 i8042_controller_reset();
1187 static struct platform_driver i8042_driver
= {
1190 .owner
= THIS_MODULE
,
1192 .probe
= i8042_probe
,
1193 .remove
= __devexit_p(i8042_remove
),
1194 .shutdown
= i8042_shutdown
,
1196 .suspend
= i8042_suspend
,
1197 .resume
= i8042_resume
,
1201 static int __init
i8042_init(void)
1207 err
= i8042_platform_init();
1211 err
= i8042_controller_check();
1213 goto err_platform_exit
;
1215 err
= platform_driver_register(&i8042_driver
);
1217 goto err_platform_exit
;
1219 i8042_platform_device
= platform_device_alloc("i8042", -1);
1220 if (!i8042_platform_device
) {
1222 goto err_unregister_driver
;
1225 err
= platform_device_add(i8042_platform_device
);
1227 goto err_free_device
;
1229 panic_blink
= i8042_panic_blink
;
1234 platform_device_put(i8042_platform_device
);
1235 err_unregister_driver
:
1236 platform_driver_unregister(&i8042_driver
);
1238 i8042_platform_exit();
1243 static void __exit
i8042_exit(void)
1245 platform_device_unregister(i8042_platform_device
);
1246 platform_driver_unregister(&i8042_driver
);
1247 i8042_platform_exit();
1252 module_init(i8042_init
);
1253 module_exit(i8042_exit
);