V4L/DVB (6715): ivtv: Remove unnecessary register update
[linux-2.6/verdex.git] / drivers / media / dvb / frontends / tda10086.c
blob9d26ace651518389d1cbd3255ee6b05ef83eba34
1 /*
2 Driver for Philips tda10086 DVBS Demodulator
4 (c) 2006 Andrew de Quincey
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/init.h>
24 #include <linux/module.h>
25 #include <linux/device.h>
26 #include <linux/jiffies.h>
27 #include <linux/string.h>
28 #include <linux/slab.h>
30 #include "dvb_frontend.h"
31 #include "tda10086.h"
33 #define SACLK 96000000
35 struct tda10086_state {
36 struct i2c_adapter* i2c;
37 const struct tda10086_config* config;
38 struct dvb_frontend frontend;
40 /* private demod data */
41 u32 frequency;
42 u32 symbol_rate;
43 bool has_lock;
46 static int debug = 0;
47 #define dprintk(args...) \
48 do { \
49 if (debug) printk(KERN_DEBUG "tda10086: " args); \
50 } while (0)
52 static int tda10086_write_byte(struct tda10086_state *state, int reg, int data)
54 int ret;
55 u8 b0[] = { reg, data };
56 struct i2c_msg msg = { .flags = 0, .buf = b0, .len = 2 };
58 msg.addr = state->config->demod_address;
59 ret = i2c_transfer(state->i2c, &msg, 1);
61 if (ret != 1)
62 dprintk("%s: error reg=0x%x, data=0x%x, ret=%i\n",
63 __FUNCTION__, reg, data, ret);
65 return (ret != 1) ? ret : 0;
68 static int tda10086_read_byte(struct tda10086_state *state, int reg)
70 int ret;
71 u8 b0[] = { reg };
72 u8 b1[] = { 0 };
73 struct i2c_msg msg[] = {{ .flags = 0, .buf = b0, .len = 1 },
74 { .flags = I2C_M_RD, .buf = b1, .len = 1 }};
76 msg[0].addr = state->config->demod_address;
77 msg[1].addr = state->config->demod_address;
78 ret = i2c_transfer(state->i2c, msg, 2);
80 if (ret != 2) {
81 dprintk("%s: error reg=0x%x, ret=%i\n", __FUNCTION__, reg,
82 ret);
83 return ret;
86 return b1[0];
89 static int tda10086_write_mask(struct tda10086_state *state, int reg, int mask, int data)
91 int val;
93 // read a byte and check
94 val = tda10086_read_byte(state, reg);
95 if (val < 0)
96 return val;
98 // mask if off
99 val = val & ~mask;
100 val |= data & 0xff;
102 // write it out again
103 return tda10086_write_byte(state, reg, val);
106 static int tda10086_init(struct dvb_frontend* fe)
108 struct tda10086_state* state = fe->demodulator_priv;
110 dprintk ("%s\n", __FUNCTION__);
112 // reset
113 tda10086_write_byte(state, 0x00, 0x00);
114 msleep(10);
116 // misc setup
117 tda10086_write_byte(state, 0x01, 0x94);
118 tda10086_write_byte(state, 0x02, 0x35); // NOTE: TT drivers appear to disable CSWP
119 tda10086_write_byte(state, 0x03, 0xe4);
120 tda10086_write_byte(state, 0x04, 0x43);
121 tda10086_write_byte(state, 0x0c, 0x0c);
122 tda10086_write_byte(state, 0x1b, 0xb0); // noise threshold
123 tda10086_write_byte(state, 0x20, 0x89); // misc
124 tda10086_write_byte(state, 0x30, 0x04); // acquisition period length
125 tda10086_write_byte(state, 0x32, 0x00); // irq off
126 tda10086_write_byte(state, 0x31, 0x56); // setup AFC
128 // setup PLL (assumes 16Mhz XIN)
129 tda10086_write_byte(state, 0x55, 0x2c); // misc PLL setup
130 tda10086_write_byte(state, 0x3a, 0x0b); // M=12
131 tda10086_write_byte(state, 0x3b, 0x01); // P=2
132 tda10086_write_mask(state, 0x55, 0x20, 0x00); // powerup PLL
134 // setup TS interface
135 tda10086_write_byte(state, 0x11, 0x81);
136 tda10086_write_byte(state, 0x12, 0x81);
137 tda10086_write_byte(state, 0x19, 0x40); // parallel mode A + MSBFIRST
138 tda10086_write_byte(state, 0x56, 0x80); // powerdown WPLL - unused in the mode we use
139 tda10086_write_byte(state, 0x57, 0x08); // bypass WPLL - unused in the mode we use
140 tda10086_write_byte(state, 0x10, 0x2a);
142 // setup ADC
143 tda10086_write_byte(state, 0x58, 0x61); // ADC setup
144 tda10086_write_mask(state, 0x58, 0x01, 0x00); // powerup ADC
146 // setup AGC
147 tda10086_write_byte(state, 0x05, 0x0B);
148 tda10086_write_byte(state, 0x37, 0x63);
149 tda10086_write_byte(state, 0x3f, 0x0a); // NOTE: flydvb varies it
150 tda10086_write_byte(state, 0x40, 0x64);
151 tda10086_write_byte(state, 0x41, 0x4f);
152 tda10086_write_byte(state, 0x42, 0x43);
154 // setup viterbi
155 tda10086_write_byte(state, 0x1a, 0x11); // VBER 10^6, DVB, QPSK
157 // setup carrier recovery
158 tda10086_write_byte(state, 0x3d, 0x80);
160 // setup SEC
161 tda10086_write_byte(state, 0x36, 0x80); // all SEC off, no 22k tone
162 tda10086_write_byte(state, 0x34, (((1<<19) * (22000/1000)) / (SACLK/1000))); // } tone frequency
163 tda10086_write_byte(state, 0x35, (((1<<19) * (22000/1000)) / (SACLK/1000)) >> 8); // }
165 return 0;
168 static void tda10086_diseqc_wait(struct tda10086_state *state)
170 unsigned long timeout = jiffies + msecs_to_jiffies(200);
171 while (!(tda10086_read_byte(state, 0x50) & 0x01)) {
172 if(time_after(jiffies, timeout)) {
173 printk("%s: diseqc queue not ready, command may be lost.\n", __FUNCTION__);
174 break;
176 msleep(10);
180 static int tda10086_set_tone (struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
182 struct tda10086_state* state = fe->demodulator_priv;
184 dprintk ("%s\n", __FUNCTION__);
186 switch (tone) {
187 case SEC_TONE_OFF:
188 tda10086_write_byte(state, 0x36, 0x80);
189 break;
191 case SEC_TONE_ON:
192 tda10086_write_byte(state, 0x36, 0x81);
193 break;
196 return 0;
199 static int tda10086_send_master_cmd (struct dvb_frontend* fe,
200 struct dvb_diseqc_master_cmd* cmd)
202 struct tda10086_state* state = fe->demodulator_priv;
203 int i;
204 u8 oldval;
206 dprintk ("%s\n", __FUNCTION__);
208 if (cmd->msg_len > 6)
209 return -EINVAL;
210 oldval = tda10086_read_byte(state, 0x36);
212 for(i=0; i< cmd->msg_len; i++) {
213 tda10086_write_byte(state, 0x48+i, cmd->msg[i]);
215 tda10086_write_byte(state, 0x36, 0x88 | ((cmd->msg_len - 1) << 4));
217 tda10086_diseqc_wait(state);
219 tda10086_write_byte(state, 0x36, oldval);
221 return 0;
224 static int tda10086_send_burst (struct dvb_frontend* fe, fe_sec_mini_cmd_t minicmd)
226 struct tda10086_state* state = fe->demodulator_priv;
227 u8 oldval = tda10086_read_byte(state, 0x36);
229 dprintk ("%s\n", __FUNCTION__);
231 switch(minicmd) {
232 case SEC_MINI_A:
233 tda10086_write_byte(state, 0x36, 0x84);
234 break;
236 case SEC_MINI_B:
237 tda10086_write_byte(state, 0x36, 0x86);
238 break;
241 tda10086_diseqc_wait(state);
243 tda10086_write_byte(state, 0x36, oldval);
245 return 0;
248 static int tda10086_set_inversion(struct tda10086_state *state,
249 struct dvb_frontend_parameters *fe_params)
251 u8 invval = 0x80;
253 dprintk ("%s %i %i\n", __FUNCTION__, fe_params->inversion, state->config->invert);
255 switch(fe_params->inversion) {
256 case INVERSION_OFF:
257 if (state->config->invert)
258 invval = 0x40;
259 break;
260 case INVERSION_ON:
261 if (!state->config->invert)
262 invval = 0x40;
263 break;
264 case INVERSION_AUTO:
265 invval = 0x00;
266 break;
268 tda10086_write_mask(state, 0x0c, 0xc0, invval);
270 return 0;
273 static int tda10086_set_symbol_rate(struct tda10086_state *state,
274 struct dvb_frontend_parameters *fe_params)
276 u8 dfn = 0;
277 u8 afs = 0;
278 u8 byp = 0;
279 u8 reg37 = 0x43;
280 u8 reg42 = 0x43;
281 u64 big;
282 u32 tmp;
283 u32 bdr;
284 u32 bdri;
285 u32 symbol_rate = fe_params->u.qpsk.symbol_rate;
287 dprintk ("%s %i\n", __FUNCTION__, symbol_rate);
289 // setup the decimation and anti-aliasing filters..
290 if (symbol_rate < (u32) (SACLK * 0.0137)) {
291 dfn=4;
292 afs=1;
293 } else if (symbol_rate < (u32) (SACLK * 0.0208)) {
294 dfn=4;
295 afs=0;
296 } else if (symbol_rate < (u32) (SACLK * 0.0270)) {
297 dfn=3;
298 afs=1;
299 } else if (symbol_rate < (u32) (SACLK * 0.0416)) {
300 dfn=3;
301 afs=0;
302 } else if (symbol_rate < (u32) (SACLK * 0.0550)) {
303 dfn=2;
304 afs=1;
305 } else if (symbol_rate < (u32) (SACLK * 0.0833)) {
306 dfn=2;
307 afs=0;
308 } else if (symbol_rate < (u32) (SACLK * 0.1100)) {
309 dfn=1;
310 afs=1;
311 } else if (symbol_rate < (u32) (SACLK * 0.1666)) {
312 dfn=1;
313 afs=0;
314 } else if (symbol_rate < (u32) (SACLK * 0.2200)) {
315 dfn=0;
316 afs=1;
317 } else if (symbol_rate < (u32) (SACLK * 0.3333)) {
318 dfn=0;
319 afs=0;
320 } else {
321 reg37 = 0x63;
322 reg42 = 0x4f;
323 byp=1;
326 // calculate BDR
327 big = (1ULL<<21) * ((u64) symbol_rate/1000ULL) * (1ULL<<dfn);
328 big += ((SACLK/1000ULL)-1ULL);
329 do_div(big, (SACLK/1000ULL));
330 bdr = big & 0xfffff;
332 // calculate BDRI
333 tmp = (1<<dfn)*(symbol_rate/1000);
334 bdri = ((32 * (SACLK/1000)) + (tmp-1)) / tmp;
336 tda10086_write_byte(state, 0x21, (afs << 7) | dfn);
337 tda10086_write_mask(state, 0x20, 0x08, byp << 3);
338 tda10086_write_byte(state, 0x06, bdr);
339 tda10086_write_byte(state, 0x07, bdr >> 8);
340 tda10086_write_byte(state, 0x08, bdr >> 16);
341 tda10086_write_byte(state, 0x09, bdri);
342 tda10086_write_byte(state, 0x37, reg37);
343 tda10086_write_byte(state, 0x42, reg42);
345 return 0;
348 static int tda10086_set_fec(struct tda10086_state *state,
349 struct dvb_frontend_parameters *fe_params)
351 u8 fecval;
353 dprintk ("%s %i\n", __FUNCTION__, fe_params->u.qpsk.fec_inner);
355 switch(fe_params->u.qpsk.fec_inner) {
356 case FEC_1_2:
357 fecval = 0x00;
358 break;
359 case FEC_2_3:
360 fecval = 0x01;
361 break;
362 case FEC_3_4:
363 fecval = 0x02;
364 break;
365 case FEC_4_5:
366 fecval = 0x03;
367 break;
368 case FEC_5_6:
369 fecval = 0x04;
370 break;
371 case FEC_6_7:
372 fecval = 0x05;
373 break;
374 case FEC_7_8:
375 fecval = 0x06;
376 break;
377 case FEC_8_9:
378 fecval = 0x07;
379 break;
380 case FEC_AUTO:
381 fecval = 0x08;
382 break;
383 default:
384 return -1;
386 tda10086_write_byte(state, 0x0d, fecval);
388 return 0;
391 static int tda10086_set_frontend(struct dvb_frontend* fe,
392 struct dvb_frontend_parameters *fe_params)
394 struct tda10086_state *state = fe->demodulator_priv;
395 int ret;
396 u32 freq = 0;
397 int freqoff;
399 dprintk ("%s\n", __FUNCTION__);
401 // modify parameters for tuning
402 tda10086_write_byte(state, 0x02, 0x35);
403 state->has_lock = false;
405 // set params
406 if (fe->ops.tuner_ops.set_params) {
407 fe->ops.tuner_ops.set_params(fe, fe_params);
408 if (fe->ops.i2c_gate_ctrl)
409 fe->ops.i2c_gate_ctrl(fe, 0);
411 if (fe->ops.tuner_ops.get_frequency)
412 fe->ops.tuner_ops.get_frequency(fe, &freq);
413 if (fe->ops.i2c_gate_ctrl)
414 fe->ops.i2c_gate_ctrl(fe, 0);
417 // calcluate the frequency offset (in *Hz* not kHz)
418 freqoff = fe_params->frequency - freq;
419 freqoff = ((1<<16) * freqoff) / (SACLK/1000);
420 tda10086_write_byte(state, 0x3d, 0x80 | ((freqoff >> 8) & 0x7f));
421 tda10086_write_byte(state, 0x3e, freqoff);
423 if ((ret = tda10086_set_inversion(state, fe_params)) < 0)
424 return ret;
425 if ((ret = tda10086_set_symbol_rate(state, fe_params)) < 0)
426 return ret;
427 if ((ret = tda10086_set_fec(state, fe_params)) < 0)
428 return ret;
430 // soft reset + disable TS output until lock
431 tda10086_write_mask(state, 0x10, 0x40, 0x40);
432 tda10086_write_mask(state, 0x00, 0x01, 0x00);
434 state->symbol_rate = fe_params->u.qpsk.symbol_rate;
435 state->frequency = fe_params->frequency;
436 return 0;
439 static int tda10086_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *fe_params)
441 struct tda10086_state* state = fe->demodulator_priv;
442 u8 val;
443 int tmp;
444 u64 tmp64;
446 dprintk ("%s\n", __FUNCTION__);
448 // check for invalid symbol rate
449 if (fe_params->u.qpsk.symbol_rate < 500000)
450 return -EINVAL;
452 // calculate the updated frequency (note: we convert from Hz->kHz)
453 tmp64 = tda10086_read_byte(state, 0x52);
454 tmp64 |= (tda10086_read_byte(state, 0x51) << 8);
455 if (tmp64 & 0x8000)
456 tmp64 |= 0xffffffffffff0000ULL;
457 tmp64 = (tmp64 * (SACLK/1000ULL));
458 do_div(tmp64, (1ULL<<15) * (1ULL<<1));
459 fe_params->frequency = (int) state->frequency + (int) tmp64;
461 // the inversion
462 val = tda10086_read_byte(state, 0x0c);
463 if (val & 0x80) {
464 switch(val & 0x40) {
465 case 0x00:
466 fe_params->inversion = INVERSION_OFF;
467 if (state->config->invert)
468 fe_params->inversion = INVERSION_ON;
469 break;
470 default:
471 fe_params->inversion = INVERSION_ON;
472 if (state->config->invert)
473 fe_params->inversion = INVERSION_OFF;
474 break;
476 } else {
477 tda10086_read_byte(state, 0x0f);
478 switch(val & 0x02) {
479 case 0x00:
480 fe_params->inversion = INVERSION_OFF;
481 if (state->config->invert)
482 fe_params->inversion = INVERSION_ON;
483 break;
484 default:
485 fe_params->inversion = INVERSION_ON;
486 if (state->config->invert)
487 fe_params->inversion = INVERSION_OFF;
488 break;
492 // calculate the updated symbol rate
493 tmp = tda10086_read_byte(state, 0x1d);
494 if (tmp & 0x80)
495 tmp |= 0xffffff00;
496 tmp = (tmp * 480 * (1<<1)) / 128;
497 tmp = ((state->symbol_rate/1000) * tmp) / (1000000/1000);
498 fe_params->u.qpsk.symbol_rate = state->symbol_rate + tmp;
500 // the FEC
501 val = (tda10086_read_byte(state, 0x0d) & 0x70) >> 4;
502 switch(val) {
503 case 0x00:
504 fe_params->u.qpsk.fec_inner = FEC_1_2;
505 break;
506 case 0x01:
507 fe_params->u.qpsk.fec_inner = FEC_2_3;
508 break;
509 case 0x02:
510 fe_params->u.qpsk.fec_inner = FEC_3_4;
511 break;
512 case 0x03:
513 fe_params->u.qpsk.fec_inner = FEC_4_5;
514 break;
515 case 0x04:
516 fe_params->u.qpsk.fec_inner = FEC_5_6;
517 break;
518 case 0x05:
519 fe_params->u.qpsk.fec_inner = FEC_6_7;
520 break;
521 case 0x06:
522 fe_params->u.qpsk.fec_inner = FEC_7_8;
523 break;
524 case 0x07:
525 fe_params->u.qpsk.fec_inner = FEC_8_9;
526 break;
529 return 0;
532 static int tda10086_read_status(struct dvb_frontend* fe, fe_status_t *fe_status)
534 struct tda10086_state* state = fe->demodulator_priv;
535 u8 val;
537 dprintk ("%s\n", __FUNCTION__);
539 val = tda10086_read_byte(state, 0x0e);
540 *fe_status = 0;
541 if (val & 0x01)
542 *fe_status |= FE_HAS_SIGNAL;
543 if (val & 0x02)
544 *fe_status |= FE_HAS_CARRIER;
545 if (val & 0x04)
546 *fe_status |= FE_HAS_VITERBI;
547 if (val & 0x08)
548 *fe_status |= FE_HAS_SYNC;
549 if (val & 0x10) {
550 *fe_status |= FE_HAS_LOCK;
551 if (!state->has_lock) {
552 state->has_lock = true;
553 // modify parameters for stable reception
554 tda10086_write_byte(state, 0x02, 0x00);
558 return 0;
561 static int tda10086_read_signal_strength(struct dvb_frontend* fe, u16 * signal)
563 struct tda10086_state* state = fe->demodulator_priv;
564 u8 _str;
566 dprintk ("%s\n", __FUNCTION__);
568 _str = 0xff - tda10086_read_byte(state, 0x43);
569 *signal = (_str << 8) | _str;
571 return 0;
574 static int tda10086_read_snr(struct dvb_frontend* fe, u16 * snr)
576 struct tda10086_state* state = fe->demodulator_priv;
577 u8 _snr;
579 dprintk ("%s\n", __FUNCTION__);
581 _snr = 0xff - tda10086_read_byte(state, 0x1c);
582 *snr = (_snr << 8) | _snr;
584 return 0;
587 static int tda10086_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
589 struct tda10086_state* state = fe->demodulator_priv;
591 dprintk ("%s\n", __FUNCTION__);
593 // read it
594 *ucblocks = tda10086_read_byte(state, 0x18) & 0x7f;
596 // reset counter
597 tda10086_write_byte(state, 0x18, 0x00);
598 tda10086_write_byte(state, 0x18, 0x80);
600 return 0;
603 static int tda10086_read_ber(struct dvb_frontend* fe, u32* ber)
605 struct tda10086_state* state = fe->demodulator_priv;
607 dprintk ("%s\n", __FUNCTION__);
609 // read it
610 *ber = 0;
611 *ber |= tda10086_read_byte(state, 0x15);
612 *ber |= tda10086_read_byte(state, 0x16) << 8;
613 *ber |= (tda10086_read_byte(state, 0x17) & 0xf) << 16;
615 return 0;
618 static int tda10086_sleep(struct dvb_frontend* fe)
620 struct tda10086_state* state = fe->demodulator_priv;
622 dprintk ("%s\n", __FUNCTION__);
624 tda10086_write_mask(state, 0x00, 0x08, 0x08);
626 return 0;
629 static int tda10086_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
631 struct tda10086_state* state = fe->demodulator_priv;
633 dprintk ("%s\n", __FUNCTION__);
635 if (enable) {
636 tda10086_write_mask(state, 0x00, 0x10, 0x10);
637 } else {
638 tda10086_write_mask(state, 0x00, 0x10, 0x00);
641 return 0;
644 static int tda10086_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
646 if (fesettings->parameters.u.qpsk.symbol_rate > 20000000) {
647 fesettings->min_delay_ms = 50;
648 fesettings->step_size = 2000;
649 fesettings->max_drift = 8000;
650 } else if (fesettings->parameters.u.qpsk.symbol_rate > 12000000) {
651 fesettings->min_delay_ms = 100;
652 fesettings->step_size = 1500;
653 fesettings->max_drift = 9000;
654 } else if (fesettings->parameters.u.qpsk.symbol_rate > 8000000) {
655 fesettings->min_delay_ms = 100;
656 fesettings->step_size = 1000;
657 fesettings->max_drift = 8000;
658 } else if (fesettings->parameters.u.qpsk.symbol_rate > 4000000) {
659 fesettings->min_delay_ms = 100;
660 fesettings->step_size = 500;
661 fesettings->max_drift = 7000;
662 } else if (fesettings->parameters.u.qpsk.symbol_rate > 2000000) {
663 fesettings->min_delay_ms = 200;
664 fesettings->step_size = (fesettings->parameters.u.qpsk.symbol_rate / 8000);
665 fesettings->max_drift = 14 * fesettings->step_size;
666 } else {
667 fesettings->min_delay_ms = 200;
668 fesettings->step_size = (fesettings->parameters.u.qpsk.symbol_rate / 8000);
669 fesettings->max_drift = 18 * fesettings->step_size;
672 return 0;
675 static void tda10086_release(struct dvb_frontend* fe)
677 struct tda10086_state *state = fe->demodulator_priv;
678 tda10086_sleep(fe);
679 kfree(state);
682 static struct dvb_frontend_ops tda10086_ops = {
684 .info = {
685 .name = "Philips TDA10086 DVB-S",
686 .type = FE_QPSK,
687 .frequency_min = 950000,
688 .frequency_max = 2150000,
689 .frequency_stepsize = 125, /* kHz for QPSK frontends */
690 .symbol_rate_min = 1000000,
691 .symbol_rate_max = 45000000,
692 .caps = FE_CAN_INVERSION_AUTO |
693 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
694 FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
695 FE_CAN_QPSK
698 .release = tda10086_release,
700 .init = tda10086_init,
701 .sleep = tda10086_sleep,
702 .i2c_gate_ctrl = tda10086_i2c_gate_ctrl,
704 .set_frontend = tda10086_set_frontend,
705 .get_frontend = tda10086_get_frontend,
706 .get_tune_settings = tda10086_get_tune_settings,
708 .read_status = tda10086_read_status,
709 .read_ber = tda10086_read_ber,
710 .read_signal_strength = tda10086_read_signal_strength,
711 .read_snr = tda10086_read_snr,
712 .read_ucblocks = tda10086_read_ucblocks,
714 .diseqc_send_master_cmd = tda10086_send_master_cmd,
715 .diseqc_send_burst = tda10086_send_burst,
716 .set_tone = tda10086_set_tone,
719 struct dvb_frontend* tda10086_attach(const struct tda10086_config* config,
720 struct i2c_adapter* i2c)
722 struct tda10086_state *state;
724 dprintk ("%s\n", __FUNCTION__);
726 /* allocate memory for the internal state */
727 state = kmalloc(sizeof(struct tda10086_state), GFP_KERNEL);
728 if (!state)
729 return NULL;
731 /* setup the state */
732 state->config = config;
733 state->i2c = i2c;
735 /* check if the demod is there */
736 if (tda10086_read_byte(state, 0x1e) != 0xe1) {
737 kfree(state);
738 return NULL;
741 /* create dvb_frontend */
742 memcpy(&state->frontend.ops, &tda10086_ops, sizeof(struct dvb_frontend_ops));
743 state->frontend.demodulator_priv = state;
744 return &state->frontend;
747 module_param(debug, int, 0644);
748 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
750 MODULE_DESCRIPTION("Philips TDA10086 DVB-S Demodulator");
751 MODULE_AUTHOR("Andrew de Quincey");
752 MODULE_LICENSE("GPL");
754 EXPORT_SYMBOL(tda10086_attach);