1 #ifndef _I386_TLBFLUSH_H
2 #define _I386_TLBFLUSH_H
5 #include <asm/processor.h>
8 #include <asm/paravirt.h>
10 #define __flush_tlb() __native_flush_tlb()
11 #define __flush_tlb_global() __native_flush_tlb_global()
12 #define __flush_tlb_single(addr) __native_flush_tlb_single(addr)
15 #define __native_flush_tlb() \
17 unsigned int tmpreg; \
19 __asm__ __volatile__( \
20 "movl %%cr3, %0; \n" \
21 "movl %0, %%cr3; # flush TLB \n" \
27 * Global pages have to be flushed a bit differently. Not a real
28 * performance problem because this does not happen often.
30 #define __native_flush_tlb_global() \
32 unsigned int tmpreg, cr4, cr4_orig; \
34 __asm__ __volatile__( \
35 "movl %%cr4, %2; # turn off PGE \n" \
38 "movl %1, %%cr4; \n" \
39 "movl %%cr3, %0; \n" \
40 "movl %0, %%cr3; # flush TLB \n" \
41 "movl %2, %%cr4; # turn PGE back on \n" \
42 : "=&r" (tmpreg), "=&r" (cr4), "=&r" (cr4_orig) \
43 : "i" (~X86_CR4_PGE) \
47 #define __native_flush_tlb_single(addr) \
48 __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory")
50 # define __flush_tlb_all() \
53 __flush_tlb_global(); \
58 #define cpu_has_invlpg (boot_cpu_data.x86 > 3)
60 #ifdef CONFIG_X86_INVLPG
61 # define __flush_tlb_one(addr) __flush_tlb_single(addr)
63 # define __flush_tlb_one(addr) \
66 __flush_tlb_single(addr); \
75 * - flush_tlb() flushes the current mm struct TLBs
76 * - flush_tlb_all() flushes all processes TLBs
77 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
78 * - flush_tlb_page(vma, vmaddr) flushes one page
79 * - flush_tlb_range(vma, start, end) flushes a range of pages
80 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
81 * - flush_tlb_others(cpumask, mm, va) flushes a TLBs on other cpus
83 * ..but the i386 has somewhat limited tlb flushing capabilities,
84 * and page-granular flushes are available only on i486 and up.
87 #define TLB_FLUSH_ALL 0xffffffff
92 #include <linux/sched.h>
94 #define flush_tlb() __flush_tlb()
95 #define flush_tlb_all() __flush_tlb_all()
96 #define local_flush_tlb() __flush_tlb()
98 static inline void flush_tlb_mm(struct mm_struct
*mm
)
100 if (mm
== current
->active_mm
)
104 static inline void flush_tlb_page(struct vm_area_struct
*vma
,
107 if (vma
->vm_mm
== current
->active_mm
)
108 __flush_tlb_one(addr
);
111 static inline void flush_tlb_range(struct vm_area_struct
*vma
,
112 unsigned long start
, unsigned long end
)
114 if (vma
->vm_mm
== current
->active_mm
)
118 static inline void native_flush_tlb_others(const cpumask_t
*cpumask
,
119 struct mm_struct
*mm
, unsigned long va
)
127 #define local_flush_tlb() \
130 extern void flush_tlb_all(void);
131 extern void flush_tlb_current_task(void);
132 extern void flush_tlb_mm(struct mm_struct
*);
133 extern void flush_tlb_page(struct vm_area_struct
*, unsigned long);
135 #define flush_tlb() flush_tlb_current_task()
137 static inline void flush_tlb_range(struct vm_area_struct
* vma
, unsigned long start
, unsigned long end
)
139 flush_tlb_mm(vma
->vm_mm
);
142 void native_flush_tlb_others(const cpumask_t
*cpumask
, struct mm_struct
*mm
,
145 #define TLBSTATE_OK 1
146 #define TLBSTATE_LAZY 2
150 struct mm_struct
*active_mm
;
152 char __cacheline_padding
[L1_CACHE_BYTES
-8];
154 DECLARE_PER_CPU(struct tlb_state
, cpu_tlbstate
);
157 #ifndef CONFIG_PARAVIRT
158 #define flush_tlb_others(mask, mm, va) \
159 native_flush_tlb_others(&mask, mm, va)
162 static inline void flush_tlb_kernel_range(unsigned long start
,
168 #endif /* _I386_TLBFLUSH_H */