3 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
4 * Copyright 2003-2004 Jeff Garzik
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2, or (at your option)
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; see the file COPYING. If not, write to
19 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
22 * libata documentation is available via 'make {ps|pdf}docs',
23 * as Documentation/DocBook/libata.*
25 * Hardware documentation available from http://www.t13.org/
29 #ifndef __LINUX_ATA_H__
30 #define __LINUX_ATA_H__
32 #include <linux/types.h>
34 /* defines only for the constants which don't work well as enums */
35 #define ATA_DMA_BOUNDARY 0xffffUL
36 #define ATA_DMA_MASK 0xffffffffULL
39 /* various global constants */
40 ATA_MAX_DEVICES
= 2, /* per bus/port */
41 ATA_MAX_PRD
= 256, /* we could make these 256/256 */
43 ATA_MAX_SECTORS_128
= 128,
44 ATA_MAX_SECTORS
= 256,
45 ATA_MAX_SECTORS_LBA48
= 65535,/* TODO: 65536? */
46 ATA_MAX_SECTORS_TAPE
= 65535,
52 ATA_ID_OLD_PIO_MODES
= 51,
53 ATA_ID_FIELD_VALID
= 53,
54 ATA_ID_MWDMA_MODES
= 63,
55 ATA_ID_PIO_MODES
= 64,
56 ATA_ID_EIDE_DMA_MIN
= 65,
58 ATA_ID_EIDE_PIO_IORDY
= 68,
59 ATA_ID_UDMA_MODES
= 88,
60 ATA_ID_MAJOR_VER
= 80,
61 ATA_ID_PIO4
= (1 << 1),
63 ATA_ID_SERNO_LEN
= 20,
64 ATA_ID_FW_REV_LEN
= 8,
70 ATA_PIO1
= ATA_PIO0
| (1 << 1),
71 ATA_PIO2
= ATA_PIO1
| (1 << 2),
72 ATA_PIO3
= ATA_PIO2
| (1 << 3),
73 ATA_PIO4
= ATA_PIO3
| (1 << 4),
74 ATA_PIO5
= ATA_PIO4
| (1 << 5),
75 ATA_PIO6
= ATA_PIO5
| (1 << 6),
77 ATA_SWDMA0
= (1 << 0),
78 ATA_SWDMA1
= ATA_SWDMA0
| (1 << 1),
79 ATA_SWDMA2
= ATA_SWDMA1
| (1 << 2),
81 ATA_SWDMA2_ONLY
= (1 << 2),
83 ATA_MWDMA0
= (1 << 0),
84 ATA_MWDMA1
= ATA_MWDMA0
| (1 << 1),
85 ATA_MWDMA2
= ATA_MWDMA1
| (1 << 2),
87 ATA_MWDMA12_ONLY
= (1 << 1) | (1 << 2),
88 ATA_MWDMA2_ONLY
= (1 << 2),
91 ATA_UDMA1
= ATA_UDMA0
| (1 << 1),
92 ATA_UDMA2
= ATA_UDMA1
| (1 << 2),
93 ATA_UDMA3
= ATA_UDMA2
| (1 << 3),
94 ATA_UDMA4
= ATA_UDMA3
| (1 << 4),
95 ATA_UDMA5
= ATA_UDMA4
| (1 << 5),
96 ATA_UDMA6
= ATA_UDMA5
| (1 << 6),
97 ATA_UDMA7
= ATA_UDMA6
| (1 << 7),
98 /* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */
100 ATA_UDMA_MASK_40C
= ATA_UDMA2
, /* udma0-2 */
104 ATA_PRD_TBL_SZ
= (ATA_MAX_PRD
* ATA_PRD_SZ
),
105 ATA_PRD_EOT
= (1 << 31), /* end-of-table flag */
107 ATA_DMA_TABLE_OFS
= 4,
110 ATA_DMA_WR
= (1 << 3),
111 ATA_DMA_START
= (1 << 0),
112 ATA_DMA_INTR
= (1 << 2),
113 ATA_DMA_ERR
= (1 << 1),
114 ATA_DMA_ACTIVE
= (1 << 0),
116 /* bits in ATA command block registers */
117 ATA_HOB
= (1 << 7), /* LBA48 selector */
118 ATA_NIEN
= (1 << 1), /* disable-irq flag */
119 ATA_LBA
= (1 << 6), /* LBA28 selector */
120 ATA_DEV1
= (1 << 4), /* Select Device 1 (slave) */
121 ATA_DEVICE_OBS
= (1 << 7) | (1 << 5), /* obs bits in dev reg */
122 ATA_DEVCTL_OBS
= (1 << 3), /* obsolete bit in devctl reg */
123 ATA_BUSY
= (1 << 7), /* BSY status bit */
124 ATA_DRDY
= (1 << 6), /* device ready */
125 ATA_DF
= (1 << 5), /* device fault */
126 ATA_DRQ
= (1 << 3), /* data request i/o */
127 ATA_ERR
= (1 << 0), /* have an error */
128 ATA_SRST
= (1 << 2), /* software reset */
129 ATA_ICRC
= (1 << 7), /* interface CRC error */
130 ATA_UNC
= (1 << 6), /* uncorrectable media error */
131 ATA_IDNF
= (1 << 4), /* ID not found */
132 ATA_ABORTED
= (1 << 2), /* command aborted */
134 /* ATA command block registers */
137 ATA_REG_NSECT
= 0x02,
141 ATA_REG_DEVICE
= 0x06,
142 ATA_REG_STATUS
= 0x07,
144 ATA_REG_FEATURE
= ATA_REG_ERR
, /* and their aliases */
145 ATA_REG_CMD
= ATA_REG_STATUS
,
146 ATA_REG_BYTEL
= ATA_REG_LBAM
,
147 ATA_REG_BYTEH
= ATA_REG_LBAH
,
148 ATA_REG_DEVSEL
= ATA_REG_DEVICE
,
149 ATA_REG_IRQ
= ATA_REG_NSECT
,
151 /* ATA device commands */
152 ATA_CMD_DEV_RESET
= 0x08, /* ATAPI device reset */
153 ATA_CMD_CHK_POWER
= 0xE5, /* check power mode */
154 ATA_CMD_STANDBY
= 0xE2, /* place in standby power mode */
155 ATA_CMD_IDLE
= 0xE3, /* place in idle power mode */
156 ATA_CMD_EDD
= 0x90, /* execute device diagnostic */
157 ATA_CMD_FLUSH
= 0xE7,
158 ATA_CMD_FLUSH_EXT
= 0xEA,
159 ATA_CMD_ID_ATA
= 0xEC,
160 ATA_CMD_ID_ATAPI
= 0xA1,
162 ATA_CMD_READ_EXT
= 0x25,
163 ATA_CMD_WRITE
= 0xCA,
164 ATA_CMD_WRITE_EXT
= 0x35,
165 ATA_CMD_WRITE_FUA_EXT
= 0x3D,
166 ATA_CMD_FPDMA_READ
= 0x60,
167 ATA_CMD_FPDMA_WRITE
= 0x61,
168 ATA_CMD_PIO_READ
= 0x20,
169 ATA_CMD_PIO_READ_EXT
= 0x24,
170 ATA_CMD_PIO_WRITE
= 0x30,
171 ATA_CMD_PIO_WRITE_EXT
= 0x34,
172 ATA_CMD_READ_MULTI
= 0xC4,
173 ATA_CMD_READ_MULTI_EXT
= 0x29,
174 ATA_CMD_WRITE_MULTI
= 0xC5,
175 ATA_CMD_WRITE_MULTI_EXT
= 0x39,
176 ATA_CMD_WRITE_MULTI_FUA_EXT
= 0xCE,
177 ATA_CMD_SET_FEATURES
= 0xEF,
178 ATA_CMD_SET_MULTI
= 0xC6,
179 ATA_CMD_PACKET
= 0xA0,
180 ATA_CMD_VERIFY
= 0x40,
181 ATA_CMD_VERIFY_EXT
= 0x42,
182 ATA_CMD_STANDBYNOW1
= 0xE0,
183 ATA_CMD_IDLEIMMEDIATE
= 0xE1,
184 ATA_CMD_SLEEP
= 0xE6,
185 ATA_CMD_INIT_DEV_PARAMS
= 0x91,
186 ATA_CMD_READ_NATIVE_MAX
= 0xF8,
187 ATA_CMD_READ_NATIVE_MAX_EXT
= 0x27,
188 ATA_CMD_SET_MAX
= 0xF9,
189 ATA_CMD_SET_MAX_EXT
= 0x37,
190 ATA_CMD_READ_LOG_EXT
= 0x2f,
191 ATA_CMD_PMP_READ
= 0xE4,
192 ATA_CMD_PMP_WRITE
= 0xE8,
193 ATA_CMD_CONF_OVERLAY
= 0xB1,
194 ATA_CMD_SEC_FREEZE_LOCK
= 0xF5,
196 /* READ_LOG_EXT pages */
197 ATA_LOG_SATA_NCQ
= 0x10,
199 /* READ/WRITE LONG (obsolete) */
200 ATA_CMD_READ_LONG
= 0x22,
201 ATA_CMD_READ_LONG_ONCE
= 0x23,
202 ATA_CMD_WRITE_LONG
= 0x32,
203 ATA_CMD_WRITE_LONG_ONCE
= 0x33,
205 /* SETFEATURES stuff */
206 SETFEATURES_XFER
= 0x03,
215 XFER_MW_DMA_4
= 0x24, /* CFA only */
216 XFER_MW_DMA_3
= 0x23, /* CFA only */
217 XFER_MW_DMA_2
= 0x22,
218 XFER_MW_DMA_1
= 0x21,
219 XFER_MW_DMA_0
= 0x20,
220 XFER_SW_DMA_2
= 0x12,
221 XFER_SW_DMA_1
= 0x11,
222 XFER_SW_DMA_0
= 0x10,
223 XFER_PIO_6
= 0x0E, /* CFA only */
224 XFER_PIO_5
= 0x0D, /* CFA only */
230 XFER_PIO_SLOW
= 0x00,
232 SETFEATURES_WC_ON
= 0x02, /* Enable write cache */
233 SETFEATURES_WC_OFF
= 0x82, /* Disable write cache */
235 SETFEATURES_SPINUP
= 0x07, /* Spin-up drive */
237 SETFEATURES_SATA_ENABLE
= 0x10, /* Enable use of SATA feature */
238 SETFEATURES_SATA_DISABLE
= 0x90, /* Disable use of SATA feature */
240 /* SETFEATURE Sector counts for SATA features */
241 SATA_AN
= 0x05, /* Asynchronous Notification */
242 SATA_DIPM
= 0x03, /* Device Initiated Power Management */
244 /* feature values for SET_MAX */
245 ATA_SET_MAX_ADDR
= 0x00,
246 ATA_SET_MAX_PASSWD
= 0x01,
247 ATA_SET_MAX_LOCK
= 0x02,
248 ATA_SET_MAX_UNLOCK
= 0x03,
249 ATA_SET_MAX_FREEZE_LOCK
= 0x04,
251 /* feature values for DEVICE CONFIGURATION OVERLAY */
252 ATA_DCO_RESTORE
= 0xC0,
253 ATA_DCO_FREEZE_LOCK
= 0xC1,
254 ATA_DCO_IDENTIFY
= 0xC2,
258 ATAPI_PKT_DMA
= (1 << 0),
259 ATAPI_DMADIR
= (1 << 2), /* ATAPI data dir:
260 0=to device, 1=to host */
264 SATA_PMP_MAX_PORTS
= 15,
265 SATA_PMP_CTRL_PORT
= 15,
267 SATA_PMP_GSCR_DWORDS
= 128,
268 SATA_PMP_GSCR_PROD_ID
= 0,
269 SATA_PMP_GSCR_REV
= 1,
270 SATA_PMP_GSCR_PORT_INFO
= 2,
271 SATA_PMP_GSCR_ERROR
= 32,
272 SATA_PMP_GSCR_ERROR_EN
= 33,
273 SATA_PMP_GSCR_FEAT
= 64,
274 SATA_PMP_GSCR_FEAT_EN
= 96,
276 SATA_PMP_PSCR_STATUS
= 0,
277 SATA_PMP_PSCR_ERROR
= 1,
278 SATA_PMP_PSCR_CONTROL
= 2,
280 SATA_PMP_FEAT_BIST
= (1 << 0),
281 SATA_PMP_FEAT_PMREQ
= (1 << 1),
282 SATA_PMP_FEAT_DYNSSC
= (1 << 2),
283 SATA_PMP_FEAT_NOTIFY
= (1 << 3),
289 ATA_CBL_PATA40_SHORT
= 3, /* 40 wire cable to high UDMA spec */
290 ATA_CBL_PATA_UNK
= 4,
293 /* SATA Status and Control Registers */
298 SCR_NOTIFICATION
= 4,
301 SERR_DATA_RECOVERED
= (1 << 0), /* recovered data error */
302 SERR_COMM_RECOVERED
= (1 << 1), /* recovered comm failure */
303 SERR_DATA
= (1 << 8), /* unrecovered data error */
304 SERR_PERSISTENT
= (1 << 9), /* persistent data/comm error */
305 SERR_PROTOCOL
= (1 << 10), /* protocol violation */
306 SERR_INTERNAL
= (1 << 11), /* host internal error */
307 SERR_PHYRDY_CHG
= (1 << 16), /* PHY RDY changed */
308 SERR_PHY_INT_ERR
= (1 << 17), /* PHY internal error */
309 SERR_COMM_WAKE
= (1 << 18), /* Comm wake */
310 SERR_10B_8B_ERR
= (1 << 19), /* 10b to 8b decode error */
311 SERR_DISPARITY
= (1 << 20), /* Disparity */
312 SERR_CRC
= (1 << 21), /* CRC error */
313 SERR_HANDSHAKE
= (1 << 22), /* Handshake error */
314 SERR_LINK_SEQ_ERR
= (1 << 23), /* Link sequence error */
315 SERR_TRANS_ST_ERROR
= (1 << 24), /* Transport state trans. error */
316 SERR_UNRECOG_FIS
= (1 << 25), /* Unrecognized FIS */
317 SERR_DEV_XCHG
= (1 << 26), /* device exchanged */
319 /* struct ata_taskfile flags */
320 ATA_TFLAG_LBA48
= (1 << 0), /* enable 48-bit LBA and "HOB" */
321 ATA_TFLAG_ISADDR
= (1 << 1), /* enable r/w to nsect/lba regs */
322 ATA_TFLAG_DEVICE
= (1 << 2), /* enable r/w to device reg */
323 ATA_TFLAG_WRITE
= (1 << 3), /* data dir: host->dev==1 (write) */
324 ATA_TFLAG_LBA
= (1 << 4), /* enable LBA */
325 ATA_TFLAG_FUA
= (1 << 5), /* enable FUA */
326 ATA_TFLAG_POLLING
= (1 << 6), /* set nIEN to 1 and use polling */
329 enum ata_tf_protocols
{
330 /* ATA taskfile protocols */
331 ATA_PROT_UNKNOWN
, /* unknown/invalid */
332 ATA_PROT_NODATA
, /* no data */
333 ATA_PROT_PIO
, /* PIO data xfer */
334 ATA_PROT_DMA
, /* DMA */
335 ATA_PROT_NCQ
, /* NCQ */
336 ATA_PROT_ATAPI
, /* packet command, PIO data xfer*/
337 ATA_PROT_ATAPI_NODATA
, /* packet command, no data */
338 ATA_PROT_ATAPI_DMA
, /* packet command with special DMA sauce */
342 ATA_IOC_GET_IO32
= 0x309,
343 ATA_IOC_SET_IO32
= 0x324,
346 /* core structures */
353 struct ata_taskfile
{
354 unsigned long flags
; /* ATA_TFLAG_xxx */
355 u8 protocol
; /* ATA_PROT_xxx */
357 u8 ctl
; /* control reg */
359 u8 hob_feature
; /* additional data */
360 u8 hob_nsect
; /* to support LBA48 */
373 u8 command
; /* IO operation */
376 #define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0)
377 #define ata_id_has_lba(id) ((id)[49] & (1 << 9))
378 #define ata_id_has_dma(id) ((id)[49] & (1 << 8))
379 #define ata_id_has_ncq(id) ((id)[76] & (1 << 8))
380 #define ata_id_queue_depth(id) (((id)[75] & 0x1f) + 1)
381 #define ata_id_removeable(id) ((id)[0] & (1 << 7))
382 #define ata_id_has_dword_io(id) ((id)[48] & (1 << 0))
383 #define ata_id_has_atapi_AN(id) \
384 ( (((id)[76] != 0x0000) && ((id)[76] != 0xffff)) && \
385 ((id)[78] & (1 << 5)) )
386 #define ata_id_iordy_disable(id) ((id)[49] & (1 << 10))
387 #define ata_id_has_iordy(id) ((id)[49] & (1 << 11))
388 #define ata_id_u32(id,n) \
389 (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
390 #define ata_id_u64(id,n) \
391 ( ((u64) (id)[(n) + 3] << 48) | \
392 ((u64) (id)[(n) + 2] << 32) | \
393 ((u64) (id)[(n) + 1] << 16) | \
394 ((u64) (id)[(n) + 0]) )
396 #define ata_id_cdb_intr(id) (((id)[0] & 0x60) == 0x20)
398 static inline bool ata_id_has_hipm(const u16
*id
)
402 if (val
== 0 || val
== 0xffff)
405 return val
& (1 << 9);
408 static inline bool ata_id_has_dipm(const u16
*id
)
412 if (val
== 0 || val
== 0xffff)
415 return val
& (1 << 3);
418 static inline int ata_id_has_fua(const u16
*id
)
420 if ((id
[84] & 0xC000) != 0x4000)
422 return id
[84] & (1 << 6);
425 static inline int ata_id_has_flush(const u16
*id
)
427 if ((id
[83] & 0xC000) != 0x4000)
429 return id
[83] & (1 << 12);
432 static inline int ata_id_has_flush_ext(const u16
*id
)
434 if ((id
[83] & 0xC000) != 0x4000)
436 return id
[83] & (1 << 13);
439 static inline int ata_id_has_lba48(const u16
*id
)
441 if ((id
[83] & 0xC000) != 0x4000)
443 if (!ata_id_u64(id
, 100))
445 return id
[83] & (1 << 10);
448 static inline int ata_id_hpa_enabled(const u16
*id
)
450 /* Yes children, word 83 valid bits cover word 82 data */
451 if ((id
[83] & 0xC000) != 0x4000)
453 /* And 87 covers 85-87 */
454 if ((id
[87] & 0xC000) != 0x4000)
456 /* Check command sets enabled as well as supported */
457 if ((id
[85] & ( 1 << 10)) == 0)
459 return id
[82] & (1 << 10);
462 static inline int ata_id_has_wcache(const u16
*id
)
464 /* Yes children, word 83 valid bits cover word 82 data */
465 if ((id
[83] & 0xC000) != 0x4000)
467 return id
[82] & (1 << 5);
470 static inline int ata_id_has_pm(const u16
*id
)
472 if ((id
[83] & 0xC000) != 0x4000)
474 return id
[82] & (1 << 3);
477 static inline int ata_id_rahead_enabled(const u16
*id
)
479 if ((id
[87] & 0xC000) != 0x4000)
481 return id
[85] & (1 << 6);
484 static inline int ata_id_wcache_enabled(const u16
*id
)
486 if ((id
[87] & 0xC000) != 0x4000)
488 return id
[85] & (1 << 5);
492 * ata_id_major_version - get ATA level of drive
496 * ATA-1 considers identify optional
497 * ATA-2 introduces mandatory identify
498 * ATA-3 introduces word 80 and accurate reporting
500 * The practical impact of this is that ata_id_major_version cannot
501 * reliably report on drives below ATA3.
504 static inline unsigned int ata_id_major_version(const u16
*id
)
508 if (id
[ATA_ID_MAJOR_VER
] == 0xFFFF)
511 for (mver
= 14; mver
>= 1; mver
--)
512 if (id
[ATA_ID_MAJOR_VER
] & (1 << mver
))
517 static inline int ata_id_is_sata(const u16
*id
)
519 return ata_id_major_version(id
) >= 5 && id
[93] == 0;
522 static inline int ata_id_current_chs_valid(const u16
*id
)
524 /* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command
525 has not been issued to the device then the values of
526 id[54] to id[56] are vendor specific. */
527 return (id
[53] & 0x01) && /* Current translation valid */
528 id
[54] && /* cylinders in current translation */
529 id
[55] && /* heads in current translation */
531 id
[56]; /* sectors in current translation */
534 static inline int ata_id_is_cfa(const u16
*id
)
537 if (v
== 0x848A) /* Standard CF */
539 /* Could be CF hiding as standard ATA */
540 if (ata_id_major_version(id
) >= 3 && id
[82] != 0xFFFF &&
541 (id
[82] & ( 1 << 2)))
546 static inline int ata_drive_40wire(const u16
*dev_id
)
548 if (ata_id_is_sata(dev_id
))
550 if ((dev_id
[93] & 0xE000) == 0x6000)
551 return 0; /* 80 wire */
555 static inline int ata_drive_40wire_relaxed(const u16
*dev_id
)
557 if ((dev_id
[93] & 0x2000) == 0x2000)
558 return 0; /* 80 wire */
562 static inline int atapi_cdb_len(const u16
*dev_id
)
564 u16 tmp
= dev_id
[0] & 0x3;
572 static inline int atapi_command_packet_set(const u16
*dev_id
)
574 return (dev_id
[0] >> 8) & 0x1f;
577 static inline int is_atapi_taskfile(const struct ata_taskfile
*tf
)
579 return (tf
->protocol
== ATA_PROT_ATAPI
) ||
580 (tf
->protocol
== ATA_PROT_ATAPI_NODATA
) ||
581 (tf
->protocol
== ATA_PROT_ATAPI_DMA
);
584 static inline int is_multi_taskfile(struct ata_taskfile
*tf
)
586 return (tf
->command
== ATA_CMD_READ_MULTI
) ||
587 (tf
->command
== ATA_CMD_WRITE_MULTI
) ||
588 (tf
->command
== ATA_CMD_READ_MULTI_EXT
) ||
589 (tf
->command
== ATA_CMD_WRITE_MULTI_EXT
) ||
590 (tf
->command
== ATA_CMD_WRITE_MULTI_FUA_EXT
);
593 static inline int ata_ok(u8 status
)
595 return ((status
& (ATA_BUSY
| ATA_DRDY
| ATA_DF
| ATA_DRQ
| ATA_ERR
))
599 static inline int lba_28_ok(u64 block
, u32 n_block
)
601 /* check the ending block number */
602 return ((block
+ n_block
- 1) < ((u64
)1 << 28)) && (n_block
<= 256);
605 static inline int lba_48_ok(u64 block
, u32 n_block
)
607 /* check the ending block number */
608 return ((block
+ n_block
- 1) < ((u64
)1 << 48)) && (n_block
<= 65536);
611 #define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff)
612 #define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16)
613 #define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff)
614 #define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf)
616 #endif /* __LINUX_ATA_H__ */