2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
6 #include <linux/config.h>
8 #include <linux/sched.h>
9 #include <linux/highmem.h>
10 #include <linux/module.h>
11 #include <linux/slab.h>
12 #include <asm/uaccess.h>
13 #include <asm/processor.h>
14 #include <asm/tlbflush.h>
15 #include <asm/pgalloc.h>
16 #include <asm/sections.h>
18 static DEFINE_SPINLOCK(cpa_lock
);
19 static struct list_head df_list
= LIST_HEAD_INIT(df_list
);
22 pte_t
*lookup_address(unsigned long address
)
24 pgd_t
*pgd
= pgd_offset_k(address
);
29 pud
= pud_offset(pgd
, address
);
32 pmd
= pmd_offset(pud
, address
);
37 return pte_offset_kernel(pmd
, address
);
40 static struct page
*split_large_page(unsigned long address
, pgprot_t prot
,
48 spin_unlock_irq(&cpa_lock
);
49 base
= alloc_pages(GFP_KERNEL
, 0);
50 spin_lock_irq(&cpa_lock
);
54 address
= __pa(address
);
55 addr
= address
& LARGE_PAGE_MASK
;
56 pbase
= (pte_t
*)page_address(base
);
57 for (i
= 0; i
< PTRS_PER_PTE
; i
++, addr
+= PAGE_SIZE
) {
58 set_pte(&pbase
[i
], pfn_pte(addr
>> PAGE_SHIFT
,
59 addr
== address
? prot
: ref_prot
));
64 static void flush_kernel_map(void *dummy
)
66 /* Could use CLFLUSH here if the CPU supports it (Hammer,P4) */
67 if (boot_cpu_data
.x86_model
>= 4)
69 /* Flush all to work around Errata in early athlons regarding
70 * large page flushing.
75 static void set_pmd_pte(pte_t
*kpte
, unsigned long address
, pte_t pte
)
80 set_pte_atomic(kpte
, pte
); /* change init_mm */
84 spin_lock_irqsave(&pgd_lock
, flags
);
85 for (page
= pgd_list
; page
; page
= (struct page
*)page
->index
) {
89 pgd
= (pgd_t
*)page_address(page
) + pgd_index(address
);
90 pud
= pud_offset(pgd
, address
);
91 pmd
= pmd_offset(pud
, address
);
92 set_pte_atomic((pte_t
*)pmd
, pte
);
94 spin_unlock_irqrestore(&pgd_lock
, flags
);
98 * No more special protections in this 2/4MB area - revert to a
101 static inline void revert_page(struct page
*kpte_page
, unsigned long address
)
107 ((address
& LARGE_PAGE_MASK
) < (unsigned long)&_etext
)
108 ? PAGE_KERNEL_LARGE_EXEC
: PAGE_KERNEL_LARGE
;
111 pmd_offset(pud_offset(pgd_offset_k(address
), address
), address
);
112 set_pmd_pte(linear
, address
,
113 pfn_pte((__pa(address
) & LARGE_PAGE_MASK
) >> PAGE_SHIFT
,
118 __change_page_attr(struct page
*page
, pgprot_t prot
)
121 unsigned long address
;
122 struct page
*kpte_page
;
124 BUG_ON(PageHighMem(page
));
125 address
= (unsigned long)page_address(page
);
127 kpte
= lookup_address(address
);
130 kpte_page
= virt_to_page(kpte
);
131 if (pgprot_val(prot
) != pgprot_val(PAGE_KERNEL
)) {
132 if ((pte_val(*kpte
) & _PAGE_PSE
) == 0) {
133 set_pte_atomic(kpte
, mk_pte(page
, prot
));
139 ((address
& LARGE_PAGE_MASK
) < (unsigned long)&_etext
)
140 ? PAGE_KERNEL_EXEC
: PAGE_KERNEL
;
141 split
= split_large_page(address
, prot
, ref_prot
);
144 set_pmd_pte(kpte
,address
,mk_pte(split
, ref_prot
));
148 } else if ((pte_val(*kpte
) & _PAGE_PSE
) == 0) {
149 set_pte_atomic(kpte
, mk_pte(page
, PAGE_KERNEL
));
150 __put_page(kpte_page
);
155 * If the pte was reserved, it means it was created at boot
156 * time (not via split_large_page) and in turn we must not
157 * replace it with a largepage.
159 if (!PageReserved(kpte_page
)) {
160 /* memleak and potential failed 2M page regeneration */
161 BUG_ON(!page_count(kpte_page
));
163 if (cpu_has_pse
&& (page_count(kpte_page
) == 1)) {
164 list_add(&kpte_page
->lru
, &df_list
);
165 revert_page(kpte_page
, address
);
171 static inline void flush_map(void)
173 on_each_cpu(flush_kernel_map
, NULL
, 1, 1);
177 * Change the page attributes of an page in the linear mapping.
179 * This should be used when a page is mapped with a different caching policy
180 * than write-back somewhere - some CPUs do not like it when mappings with
181 * different caching policies exist. This changes the page attributes of the
182 * in kernel linear mapping too.
184 * The caller needs to ensure that there are no conflicting mappings elsewhere.
185 * This function only deals with the kernel linear map.
187 * Caller must call global_flush_tlb() after this.
189 int change_page_attr(struct page
*page
, int numpages
, pgprot_t prot
)
195 spin_lock_irqsave(&cpa_lock
, flags
);
196 for (i
= 0; i
< numpages
; i
++, page
++) {
197 err
= __change_page_attr(page
, prot
);
201 spin_unlock_irqrestore(&cpa_lock
, flags
);
205 void global_flush_tlb(void)
208 struct page
*pg
, *next
;
210 BUG_ON(irqs_disabled());
212 spin_lock_irq(&cpa_lock
);
213 list_splice_init(&df_list
, &l
);
214 spin_unlock_irq(&cpa_lock
);
216 list_for_each_entry_safe(pg
, next
, &l
, lru
)
220 #ifdef CONFIG_DEBUG_PAGEALLOC
221 void kernel_map_pages(struct page
*page
, int numpages
, int enable
)
223 if (PageHighMem(page
))
225 /* the return value is ignored - the calls cannot fail,
226 * large pages are disabled at boot time.
228 change_page_attr(page
, numpages
, enable
? PAGE_KERNEL
: __pgprot(0));
229 /* we should perform an IPI and flush all tlbs,
230 * but that can deadlock->flush only current cpu.
236 EXPORT_SYMBOL(change_page_attr
);
237 EXPORT_SYMBOL(global_flush_tlb
);