2 * arch/ppc/syslib/ibm44x_common.c
4 * PPC44x system library
6 * Matt Porter <mporter@kernel.crashing.org>
7 * Copyright 2002-2005 MontaVista Software Inc.
9 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
10 * Copyright (c) 2003, 2004 Zultys Technologies
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
18 #include <linux/config.h>
19 #include <linux/time.h>
20 #include <linux/types.h>
21 #include <linux/serial.h>
22 #include <linux/module.h>
23 #include <linux/initrd.h>
25 #include <asm/ibm44x.h>
27 #include <asm/machdep.h>
29 #include <asm/ppc4xx_pic.h>
30 #include <asm/param.h>
31 #include <asm/bootinfo.h>
32 #include <asm/ppcboot.h>
34 #include <syslib/gen550.h>
36 /* Global Variables */
39 phys_addr_t
fixup_bigphys_addr(phys_addr_t addr
, phys_addr_t size
)
41 phys_addr_t page_4gb
= 0;
44 * Trap the least significant 32-bit portions of an
45 * address in the 440's 36-bit address space. Fix
46 * them up with the appropriate ERPN
48 if ((addr
>= PPC44x_IO_LO
) && (addr
<= PPC44x_IO_HI
))
49 page_4gb
= PPC44x_IO_PAGE
;
50 else if ((addr
>= PPC44x_PCI0CFG_LO
) && (addr
<= PPC44x_PCI0CFG_HI
))
51 page_4gb
= PPC44x_PCICFG_PAGE
;
53 else if ((addr
>= PPC44x_PCI1CFG_LO
) && (addr
<= PPC44x_PCI1CFG_HI
))
54 page_4gb
= PPC44x_PCICFG_PAGE
;
55 else if ((addr
>= PPC44x_PCI2CFG_LO
) && (addr
<= PPC44x_PCI2CFG_HI
))
56 page_4gb
= PPC44x_PCICFG_PAGE
;
58 else if ((addr
>= PPC44x_PCIMEM_LO
) && (addr
<= PPC44x_PCIMEM_HI
))
59 page_4gb
= PPC44x_PCIMEM_PAGE
;
61 return (page_4gb
| addr
);
63 EXPORT_SYMBOL(fixup_bigphys_addr
);
65 void __init
ibm44x_calibrate_decr(unsigned int freq
)
67 tb_ticks_per_jiffy
= freq
/ HZ
;
68 tb_to_us
= mulhwu_scale_factor(freq
, 1000000);
70 /* Set the time base to zero */
74 /* Clear any pending timer interrupts */
75 mtspr(SPRN_TSR
, TSR_ENW
| TSR_WIS
| TSR_DIS
| TSR_FIS
);
77 /* Enable decrementer interrupt */
78 mtspr(SPRN_TCR
, TCR_DIE
);
81 extern void abort(void);
83 static void ibm44x_restart(char *cmd
)
89 static void ibm44x_power_off(void)
95 static void ibm44x_halt(void)
102 * Read the 44x memory controller to get size of system memory.
104 static unsigned long __init
ibm44x_find_end_of_memory(void)
114 mtdcr(DCRN_SDRAM0_CFGADDR
, SDRAM0_B0CR
);
117 mtdcr(DCRN_SDRAM0_CFGADDR
, SDRAM0_B1CR
);
120 mtdcr(DCRN_SDRAM0_CFGADDR
, SDRAM0_B2CR
);
123 mtdcr(DCRN_SDRAM0_CFGADDR
, SDRAM0_B3CR
);
127 bank_config
= mfdcr(DCRN_SDRAM0_CFGDATA
);
129 if (!(bank_config
& SDRAM_CONFIG_BANK_ENABLE
))
131 switch (SDRAM_CONFIG_BANK_SIZE(bank_config
))
133 case SDRAM_CONFIG_SIZE_8M
:
134 mem_size
+= PPC44x_MEM_SIZE_8M
;
136 case SDRAM_CONFIG_SIZE_16M
:
137 mem_size
+= PPC44x_MEM_SIZE_16M
;
139 case SDRAM_CONFIG_SIZE_32M
:
140 mem_size
+= PPC44x_MEM_SIZE_32M
;
142 case SDRAM_CONFIG_SIZE_64M
:
143 mem_size
+= PPC44x_MEM_SIZE_64M
;
145 case SDRAM_CONFIG_SIZE_128M
:
146 mem_size
+= PPC44x_MEM_SIZE_128M
;
148 case SDRAM_CONFIG_SIZE_256M
:
149 mem_size
+= PPC44x_MEM_SIZE_256M
;
151 case SDRAM_CONFIG_SIZE_512M
:
152 mem_size
+= PPC44x_MEM_SIZE_512M
;
159 void __init
ibm44x_platform_init(unsigned long r3
, unsigned long r4
, unsigned long r5
,
160 unsigned long r6
, unsigned long r7
)
162 parse_bootinfo(find_bootinfo());
165 * If we were passed in a board information, copy it into the
166 * residual data area.
169 __res
= *(bd_t
*)(r3
+ KERNELBASE
);
171 #if defined(CONFIG_BLK_DEV_INITRD)
173 * If the init RAM disk has been configured in, and there's a valid
174 * starting address for it, set it up.
177 initrd_start
= r4
+ KERNELBASE
;
178 initrd_end
= r5
+ KERNELBASE
;
180 #endif /* CONFIG_BLK_DEV_INITRD */
182 /* Copy the kernel command line arguments to a safe place. */
185 *(char *) (r7
+ KERNELBASE
) = 0;
186 strcpy(cmd_line
, (char *) (r6
+ KERNELBASE
));
189 ppc_md
.init_IRQ
= ppc4xx_pic_init
;
190 ppc_md
.find_end_of_memory
= ibm44x_find_end_of_memory
;
191 ppc_md
.restart
= ibm44x_restart
;
192 ppc_md
.power_off
= ibm44x_power_off
;
193 ppc_md
.halt
= ibm44x_halt
;
195 #ifdef CONFIG_SERIAL_TEXT_DEBUG
196 ppc_md
.progress
= gen550_progress
;
197 #endif /* CONFIG_SERIAL_TEXT_DEBUG */
199 ppc_md
.kgdb_map_scc
= gen550_kgdb_map_scc
;
203 * The Abatron BDI JTAG debugger does not tolerate others
204 * mucking with the debug registers.
206 #if !defined(CONFIG_BDI_SWITCH)
207 /* Enable internal debug mode */
208 mtspr(SPRN_DBCR0
, (DBCR0_IDM
));
210 /* Clear any residual debug events */
211 mtspr(SPRN_DBSR
, 0xffffffff);
215 /* Called from machine_check_exception */
216 void platform_machine_check(struct pt_regs
*regs
)
218 #if defined(CONFIG_440SP) || defined(CONFIG_440SPE)
219 printk("PLB0: BEAR=0x%08x%08x ACR= 0x%08x BESR= 0x%08x%08x\n",
220 mfdcr(DCRN_PLB0_BEARH
), mfdcr(DCRN_PLB0_BEARL
),
221 mfdcr(DCRN_PLB0_ACR
), mfdcr(DCRN_PLB0_BESRH
),
222 mfdcr(DCRN_PLB0_BESRL
));
223 printk("PLB1: BEAR=0x%08x%08x ACR= 0x%08x BESR= 0x%08x%08x\n",
224 mfdcr(DCRN_PLB1_BEARH
), mfdcr(DCRN_PLB1_BEARL
),
225 mfdcr(DCRN_PLB1_ACR
), mfdcr(DCRN_PLB1_BESRH
),
226 mfdcr(DCRN_PLB1_BESRL
));
228 printk("PLB0: BEAR=0x%08x%08x ACR= 0x%08x BESR= 0x%08x\n",
229 mfdcr(DCRN_PLB0_BEARH
), mfdcr(DCRN_PLB0_BEARL
),
230 mfdcr(DCRN_PLB0_ACR
), mfdcr(DCRN_PLB0_BESR
));
232 printk("POB0: BEAR=0x%08x%08x BESR0=0x%08x BESR1=0x%08x\n",
233 mfdcr(DCRN_POB0_BEARH
), mfdcr(DCRN_POB0_BEARL
),
234 mfdcr(DCRN_POB0_BESR0
), mfdcr(DCRN_POB0_BESR1
));
235 printk("OPB0: BEAR=0x%08x%08x BSTAT=0x%08x\n",
236 mfdcr(DCRN_OPB0_BEARH
), mfdcr(DCRN_OPB0_BEARL
),
237 mfdcr(DCRN_OPB0_BSTAT
));