drivers/video/intelfb/intelfb.h

   1 #ifndef _INTELFB_H
   2 #define _INTELFB_H
   3
   4 /* $DHD: intelfb/intelfb.h,v 1.40 2003/06/27 15:06:25 dawes Exp $ */
   5
   6 #include <linux/agp_backend.h>
   7 #include <linux/fb.h>
   8
   9
  10 /*** Version/name ***/
  11 #define INTELFB_VERSION                 "0.9.4"
  12 #define INTELFB_MODULE_NAME             "intelfb"
  13 #define SUPPORTED_CHIPSETS              "830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM"
  14
  15
  16 /*** Debug/feature defines ***/
  17
  18 #ifndef DEBUG
  19 #define DEBUG                           0
  20 #endif
  21
  22 #ifndef VERBOSE
  23 #define VERBOSE                         0
  24 #endif
  25
  26 #ifndef REGDUMP
  27 #define REGDUMP                         0
  28 #endif
  29
  30 #ifndef DETECT_VGA_CLASS_ONLY
  31 #define DETECT_VGA_CLASS_ONLY           1
  32 #endif
  33
  34 #ifndef ALLOCATE_FOR_PANNING
  35 #define ALLOCATE_FOR_PANNING            1
  36 #endif
  37
  38 #ifndef PREFERRED_MODE
  39 #define PREFERRED_MODE                  "1024x768-32@70"
  40 #endif
  41
  42 /*** hw-related values ***/
  43
  44 /* Resource Allocation */
  45 #define INTELFB_FB_ACQUIRED                 1
  46 #define INTELFB_MMIO_ACQUIRED               2
  47
  48 /* PCI ids for supported devices */
  49 #define PCI_DEVICE_ID_INTEL_830M        0x3577
  50 #define PCI_DEVICE_ID_INTEL_845G        0x2562
  51 #define PCI_DEVICE_ID_INTEL_85XGM       0x3582
  52 #define PCI_DEVICE_ID_INTEL_865G        0x2572
  53 #define PCI_DEVICE_ID_INTEL_915G        0x2582
  54 #define PCI_DEVICE_ID_INTEL_915GM       0x2592
  55 #define PCI_DEVICE_ID_INTEL_945G        0x2772
  56 #define PCI_DEVICE_ID_INTEL_945GM       0x27A2
  57
  58 /* Size of MMIO region */
  59 #define INTEL_REG_SIZE                  0x80000
  60
  61 #define STRIDE_ALIGNMENT                16
  62 #define STRIDE_ALIGNMENT_I9XX           64
  63
  64 #define PALETTE_8_ENTRIES               256
  65
  66
  67 /*** Macros ***/
  68
  69 /* basic arithmetic */
  70 #define KB(x)                   ((x) * 1024)
  71 #define MB(x)                   ((x) * 1024 * 1024)
  72 #define BtoKB(x)                ((x) / 1024)
  73 #define BtoMB(x)                ((x) / 1024 / 1024)
  74
  75 #define GTT_PAGE_SIZE           KB(4)
  76
  77 #define ROUND_UP_TO(x, y)       (((x) + (y) - 1) / (y) * (y))
  78 #define ROUND_DOWN_TO(x, y)     ((x) / (y) * (y))
  79 #define ROUND_UP_TO_PAGE(x)     ROUND_UP_TO((x), GTT_PAGE_SIZE)
  80 #define ROUND_DOWN_TO_PAGE(x)   ROUND_DOWN_TO((x), GTT_PAGE_SIZE)
  81
  82 /* messages */
  83 #define PFX                     INTELFB_MODULE_NAME ": "
  84
  85 #define ERR_MSG(fmt, args...)   printk(KERN_ERR PFX fmt, ## args)
  86 #define WRN_MSG(fmt, args...)   printk(KERN_WARNING PFX fmt, ## args)
  87 #define NOT_MSG(fmt, args...)   printk(KERN_NOTICE PFX fmt, ## args)
  88 #define INF_MSG(fmt, args...)   printk(KERN_INFO PFX fmt, ## args)
  89 #if DEBUG
  90 #define DBG_MSG(fmt, args...)   printk(KERN_DEBUG PFX fmt, ## args)
  91 #else
  92 #define DBG_MSG(fmt, args...)   while (0) printk(fmt, ## args)
  93 #endif
  94
  95 /* get commonly used pointers */
  96 #define GET_DINFO(info)         (info)->par
  97
  98 /* misc macros */
  99 #define ACCEL(d, i)                                                     \
 100         ((d)->accel && !(d)->ring_lockup &&                             \
 101          ((i)->var.accel_flags & FB_ACCELF_TEXT))
 102
 103 /*#define NOACCEL_CHIPSET(d)                                            \
 104         ((d)->chipset != INTEL_865G)*/
 105 #define NOACCEL_CHIPSET(d)                                              \
 106         (0)
 107
 108 #define FIXED_MODE(d) ((d)->fixed_mode)
 109
 110 /*** Driver paramters ***/
 111
 112 #define RINGBUFFER_SIZE         KB(64)
 113 #define HW_CURSOR_SIZE          KB(4)
 114
 115 /* Intel agpgart driver */
 116 #define AGP_PHYSICAL_MEMORY     2
 117
 118 /*** Data Types ***/
 119
 120 /* supported chipsets */
 121 enum intel_chips {
 122         INTEL_830M,
 123         INTEL_845G,
 124         INTEL_85XGM,
 125         INTEL_852GM,
 126         INTEL_852GME,
 127         INTEL_855GM,
 128         INTEL_855GME,
 129         INTEL_865G,
 130         INTEL_915G,
 131         INTEL_915GM,
 132         INTEL_945G,
 133         INTEL_945GM,
 134 };
 135
 136 struct intelfb_hwstate {
 137         u32 vga0_divisor;
 138         u32 vga1_divisor;
 139         u32 vga_pd;
 140         u32 dpll_a;
 141         u32 dpll_b;
 142         u32 fpa0;
 143         u32 fpa1;
 144         u32 fpb0;
 145         u32 fpb1;
 146         u32 palette_a[PALETTE_8_ENTRIES];
 147         u32 palette_b[PALETTE_8_ENTRIES];
 148         u32 htotal_a;
 149         u32 hblank_a;
 150         u32 hsync_a;
 151         u32 vtotal_a;
 152         u32 vblank_a;
 153         u32 vsync_a;
 154         u32 src_size_a;
 155         u32 bclrpat_a;
 156         u32 htotal_b;
 157         u32 hblank_b;
 158         u32 hsync_b;
 159         u32 vtotal_b;
 160         u32 vblank_b;
 161         u32 vsync_b;
 162         u32 src_size_b;
 163         u32 bclrpat_b;
 164         u32 adpa;
 165         u32 dvoa;
 166         u32 dvob;
 167         u32 dvoc;
 168         u32 dvoa_srcdim;
 169         u32 dvob_srcdim;
 170         u32 dvoc_srcdim;
 171         u32 lvds;
 172         u32 pipe_a_conf;
 173         u32 pipe_b_conf;
 174         u32 disp_arb;
 175         u32 cursor_a_control;
 176         u32 cursor_b_control;
 177         u32 cursor_a_base;
 178         u32 cursor_b_base;
 179         u32 cursor_size;
 180         u32 disp_a_ctrl;
 181         u32 disp_b_ctrl;
 182         u32 disp_a_base;
 183         u32 disp_b_base;
 184         u32 cursor_a_palette[4];
 185         u32 cursor_b_palette[4];
 186         u32 disp_a_stride;
 187         u32 disp_b_stride;
 188         u32 vgacntrl;
 189         u32 add_id;
 190         u32 swf0x[7];
 191         u32 swf1x[7];
 192         u32 swf3x[3];
 193         u32 fence[8];
 194         u32 instpm;
 195         u32 mem_mode;
 196         u32 fw_blc_0;
 197         u32 fw_blc_1;
 198 };
 199
 200 struct intelfb_heap_data {
 201         u32 physical;
 202         u8 __iomem *virtual;
 203         u32 offset;  // in GATT pages
 204         u32 size;    // in bytes
 205 };
 206
 207 struct intelfb_info {
 208         struct fb_info *info;
 209         struct fb_ops  *fbops;
 210         struct pci_dev *pdev;
 211
 212         struct intelfb_hwstate save_state;
 213
 214         /* agpgart structs */
 215         struct agp_memory *gtt_fb_mem;     // use all stolen memory or vram
 216         struct agp_memory *gtt_ring_mem;   // ring buffer
 217         struct agp_memory *gtt_cursor_mem; // hw cursor
 218
 219         /* use a gart reserved fb mem */
 220         u8 fbmem_gart;
 221
 222         /* mtrr support */
 223         u32 mtrr_reg;
 224         u32 has_mtrr;
 225
 226         /* heap data */
 227         struct intelfb_heap_data aperture;
 228         struct intelfb_heap_data fb;
 229         struct intelfb_heap_data ring;
 230         struct intelfb_heap_data cursor;
 231
 232         /* mmio regs */
 233         u32 mmio_base_phys;
 234         u8 __iomem *mmio_base;
 235
 236         /* fb start offset (in bytes) */
 237         u32 fb_start;
 238
 239         /* ring buffer */
 240         u8 __iomem *ring_head;
 241         u32 ring_tail;
 242         u32 ring_tail_mask;
 243         u32 ring_space;
 244         u32 ring_lockup;
 245
 246         /* palette */
 247         u32 pseudo_palette[17];
 248
 249         /* chip info */
 250         int pci_chipset;
 251         int chipset;
 252         const char *name;
 253         int mobile;
 254
 255         /* current mode */
 256         int bpp, depth;
 257         u32 visual;
 258         int xres, yres, pitch;
 259         int pixclock;
 260
 261         /* current pipe */
 262         int pipe;
 263
 264         /* some flags */
 265         int accel;
 266         int hwcursor;
 267         int fixed_mode;
 268         int ring_active;
 269         int flag;
 270
 271         /* hw cursor */
 272         int cursor_on;
 273         int cursor_blanked;
 274         u8  cursor_src[64];
 275
 276         /* initial parameters */
 277         int initial_vga;
 278         struct fb_var_screeninfo initial_var;
 279         u32 initial_fb_base;
 280         u32 initial_video_ram;
 281         u32 initial_pitch;
 282
 283         /* driver registered */
 284         int registered;
 285
 286         /* index into plls */
 287         int pll_index;
 288 };
 289
 290 #define IS_I9XX(dinfo) (((dinfo)->chipset == INTEL_915G)||(dinfo->chipset == INTEL_915GM)||((dinfo)->chipset == INTEL_945G)||(dinfo->chipset==INTEL_945GM))
 291
 292 /*** function prototypes ***/
 293
 294 extern int intelfb_var_to_depth(const struct fb_var_screeninfo *var);
 295
 296 #endif /* _INTELFB_H */