arch/mips/momentum/ocelot_c/prom.c

   1 /*
   2  * Copyright 2002 Momentum Computer Inc.
   3  * Author: Matthew Dharm <mdharm@momenco.com>
   4  *
   5  * Louis Hamilton, Red Hat, Inc.
   6  *   hamilton@redhat.com  [MIPS64 modifications]
   7  *
   8  * Based on Ocelot Linux port, which is
   9  * Copyright 2001 MontaVista Software Inc.
  10  * Author: jsun@mvista.com or jsun@junsun.net
  11  *
  12  * This program is free software; you can redistribute  it and/or modify it
  13  * under  the terms of  the GNU General  Public License as published by the
  14  * Free Software Foundation;  either version 2 of the  License, or (at your
  15  * option) any later version.
  16  */
  17 #include <linux/init.h>
  18 #include <linux/mm.h>
  19 #include <linux/sched.h>
  20 #include <linux/bootmem.h>
  21 #include <linux/mv643xx.h>
  22
  23 #include <asm/addrspace.h>
  24 #include <asm/bootinfo.h>
  25 #include <asm/pmon.h>
  26
  27 #include "ocelot_c_fpga.h"
  28
  29 struct callvectors* debug_vectors;
  30
  31 extern unsigned long marvell_base;
  32 extern unsigned long cpu_clock;
  33
  34 #ifdef CONFIG_MV643XX_ETH
  35 extern unsigned char prom_mac_addr_base[6];
  36 #endif
  37
  38 const char *get_system_type(void)
  39 {
  40 #ifdef CONFIG_CPU_SR71000
  41         return "Momentum Ocelot-CS";
  42 #else
  43         return "Momentum Ocelot-C";
  44 #endif
  45 }
  46
  47 #ifdef CONFIG_MV643XX_ETH
  48 static void burn_clocks(void)
  49 {
  50         int i;
  51
  52         /* this loop should burn at least 1us -- this should be plenty */
  53         for (i = 0; i < 0x10000; i++)
  54                 ;
  55 }
  56
  57 static u8 exchange_bit(u8 val, u8 cs)
  58 {
  59         /* place the data */
  60         OCELOT_FPGA_WRITE((val << 2) | cs, EEPROM_MODE);
  61         burn_clocks();
  62
  63         /* turn the clock on */
  64         OCELOT_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE);
  65         burn_clocks();
  66
  67         /* turn the clock off and read-strobe */
  68         OCELOT_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE);
  69
  70         /* return the data */
  71         return ((OCELOT_FPGA_READ(EEPROM_MODE) >> 3) & 0x1);
  72 }
  73
  74 void get_mac(char dest[6])
  75 {
  76         u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
  77         int i,j;
  78
  79         for (i = 0; i < 12; i++)
  80                 exchange_bit(read_opcode[i], 1);
  81
  82         for (j = 0; j < 6; j++) {
  83                 dest[j] = 0;
  84                 for (i = 0; i < 8; i++) {
  85                         dest[j] <<= 1;
  86                         dest[j] |= exchange_bit(0, 1);
  87                 }
  88         }
  89
  90         /* turn off CS */
  91         exchange_bit(0,0);
  92 }
  93 #endif
  94
  95
  96 #ifdef CONFIG_64BIT
  97
  98 unsigned long signext(unsigned long addr)
  99 {
 100   addr &= 0xffffffff;
 101   return (unsigned long)((int)addr);
 102 }
 103
 104 void *get_arg(unsigned long args, int arc)
 105 {
 106   unsigned long ul;
 107   unsigned char *puc, uc;
 108
 109   args += (arc * 4);
 110   ul = (unsigned long)signext(args);
 111   puc = (unsigned char *)ul;
 112   if (puc == 0)
 113     return (void *)0;
 114
 115 #ifdef CONFIG_CPU_LITTLE_ENDIAN
 116   uc = *puc++;
 117   ul = (unsigned long)uc;
 118   uc = *puc++;
 119   ul |= (((unsigned long)uc) << 8);
 120   uc = *puc++;
 121   ul |= (((unsigned long)uc) << 16);
 122   uc = *puc++;
 123   ul |= (((unsigned long)uc) << 24);
 124 #else  /* CONFIG_CPU_LITTLE_ENDIAN */
 125   uc = *puc++;
 126   ul = ((unsigned long)uc) << 24;
 127   uc = *puc++;
 128   ul |= (((unsigned long)uc) << 16);
 129   uc = *puc++;
 130   ul |= (((unsigned long)uc) << 8);
 131   uc = *puc++;
 132   ul |= ((unsigned long)uc);
 133 #endif  /* CONFIG_CPU_LITTLE_ENDIAN */
 134   ul = signext(ul);
 135   return (void *)ul;
 136 }
 137
 138 char *arg64(unsigned long addrin, int arg_index)
 139 {
 140   unsigned long args;
 141   char *p;
 142   args = signext(addrin);
 143   p = (char *)get_arg(args, arg_index);
 144   return p;
 145 }
 146 #endif  /* CONFIG_64BIT */
 147
 148
 149 void __init prom_init(void)
 150 {
 151         int argc = fw_arg0;
 152         char **arg = (char **) fw_arg1;
 153         char **env = (char **) fw_arg2;
 154         struct callvectors *cv = (struct callvectors *) fw_arg3;
 155         int i;
 156
 157 #ifdef CONFIG_64BIT
 158         char *ptr;
 159
 160         printk("prom_init - MIPS64\n");
 161         /* save the PROM vectors for debugging use */
 162         debug_vectors = (struct callvectors *)signext((unsigned long)cv);
 163
 164         /* arg[0] is "g", the rest is boot parameters */
 165         arcs_cmdline[0] = '\0';
 166
 167         for (i = 1; i < argc; i++) {
 168                 ptr = (char *)arg64((unsigned long)arg, i);
 169                 if ((strlen(arcs_cmdline) + strlen(ptr) + 1) >=
 170                     sizeof(arcs_cmdline))
 171                         break;
 172                 strcat(arcs_cmdline, ptr);
 173                 strcat(arcs_cmdline, " ");
 174         }
 175         i = 0;
 176         while (1) {
 177                 ptr = (char *)arg64((unsigned long)env, i);
 178                 if (! ptr)
 179                         break;
 180
 181                 if (strncmp("gtbase", ptr, strlen("gtbase")) == 0) {
 182                         marvell_base = simple_strtol(ptr + strlen("gtbase="),
 183                                                         NULL, 16);
 184
 185                         if ((marvell_base & 0xffffffff00000000) == 0)
 186                                 marvell_base |= 0xffffffff00000000;
 187
 188                         printk("marvell_base set to 0x%016lx\n", marvell_base);
 189                 }
 190                 if (strncmp("cpuclock", ptr, strlen("cpuclock")) == 0) {
 191                         cpu_clock = simple_strtol(ptr + strlen("cpuclock="),
 192                                                         NULL, 10);
 193                         printk("cpu_clock set to %d\n", cpu_clock);
 194                 }
 195                 i++;
 196         }
 197         printk("arcs_cmdline: %s\n", arcs_cmdline);
 198
 199 #else   /* CONFIG_64BIT */
 200         /* save the PROM vectors for debugging use */
 201         debug_vectors = cv;
 202
 203         /* arg[0] is "g", the rest is boot parameters */
 204         arcs_cmdline[0] = '\0';
 205         for (i = 1; i < argc; i++) {
 206                 if (strlen(arcs_cmdline) + strlen(arg[i] + 1)
 207                     >= sizeof(arcs_cmdline))
 208                         break;
 209                 strcat(arcs_cmdline, arg[i]);
 210                 strcat(arcs_cmdline, " ");
 211         }
 212
 213         while (*env) {
 214                 if (strncmp("gtbase", *env, strlen("gtbase")) == 0) {
 215                         marvell_base = simple_strtol(*env + strlen("gtbase="),
 216                                                         NULL, 16);
 217                 }
 218                 if (strncmp("cpuclock", *env, strlen("cpuclock")) == 0) {
 219                         cpu_clock = simple_strtol(*env + strlen("cpuclock="),
 220                                                         NULL, 10);
 221                 }
 222                 env++;
 223         }
 224 #endif /* CONFIG_64BIT */
 225
 226         mips_machgroup = MACH_GROUP_MOMENCO;
 227         mips_machtype = MACH_MOMENCO_OCELOT_C;
 228
 229 #ifdef CONFIG_MV643XX_ETH
 230         /* get the base MAC address for on-board ethernet ports */
 231         get_mac(prom_mac_addr_base);
 232 #endif
 233
 234 #ifndef CONFIG_64BIT
 235         debug_vectors->printf("Booting Linux kernel...\n");
 236 #endif
 237 }
 238
 239 unsigned long __init prom_free_prom_memory(void)
 240 {
 241         return 0;
 242 }