2 * Copyright (C) 1999, 2000, 2004 MIPS Technologies, Inc.
4 * Authors: Carsten Langgaard <carstenl@mips.com>
5 * Maciej W. Rozycki <macro@mips.com>
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
20 * MIPS boards specific PCI support.
22 #include <linux/types.h>
23 #include <linux/pci.h>
24 #include <linux/kernel.h>
25 #include <linux/init.h>
27 #include <asm/mips-boards/bonito64.h>
29 #define PCI_ACCESS_READ 0
30 #define PCI_ACCESS_WRITE 1
33 * PCI configuration cycle AD bus definition
36 #define PCI_CFG_TYPE0_REG_SHF 0
37 #define PCI_CFG_TYPE0_FUNC_SHF 8
40 #define PCI_CFG_TYPE1_REG_SHF 0
41 #define PCI_CFG_TYPE1_FUNC_SHF 8
42 #define PCI_CFG_TYPE1_DEV_SHF 11
43 #define PCI_CFG_TYPE1_BUS_SHF 16
45 static int bonito64_pcibios_config_access(unsigned char access_type
,
47 unsigned int devfn
, int where
,
50 unsigned char busnum
= bus
->number
;
54 /* Algorithmics Bonito64 system controller. */
56 if ((busnum
== 0) && (PCI_SLOT(devfn
) > 21)) {
57 /* We number bus 0 devices from 0..21 */
61 /* Clear cause register bits */
62 BONITO_PCICMD
|= (BONITO_PCICMD_MABORT_CLR
|
63 BONITO_PCICMD_MTABORT_CLR
);
66 * Setup pattern to be used as PCI "address" for
71 pci_addr
= (u64
) 1 << (PCI_SLOT(devfn
) + 10);
74 pci_addr
= busnum
<< PCI_CFG_TYPE1_BUS_SHF
;
78 PCI_SLOT(devfn
) << PCI_CFG_TYPE1_DEV_SHF
;
81 /* Function (same for Type 0/1) */
82 pci_addr
|= PCI_FUNC(devfn
) << PCI_CFG_TYPE0_FUNC_SHF
;
84 /* Register number (same for Type 0/1) */
85 pci_addr
|= (where
& ~0x3) << PCI_CFG_TYPE0_REG_SHF
;
89 BONITO_PCIMAP_CFG
= pci_addr
>> 16;
92 BONITO_PCIMAP_CFG
= (pci_addr
>> 16) | 0x10000;
97 /* Flush Bonito register block */
98 dummy
= BONITO_PCIMAP_CFG
;
102 if (access_type
== PCI_ACCESS_WRITE
) {
103 *(volatile u32
*) (_pcictrl_bonito_pcicfg
+ (u32
)pci_addr
) = *(u32
*) data
;
106 while (BONITO_PCIMSTAT
& 0xF);
108 *(u32
*) data
= *(volatile u32
*) (_pcictrl_bonito_pcicfg
+ (u32
)pci_addr
);
111 /* Detect Master/Target abort */
112 if (BONITO_PCICMD
& (BONITO_PCICMD_MABORT_CLR
|
113 BONITO_PCICMD_MTABORT_CLR
)) {
117 BONITO_PCICMD
|= (BONITO_PCICMD_MABORT_CLR
|
118 BONITO_PCICMD_MTABORT_CLR
);
128 * We can't address 8 and 16 bit words directly. Instead we have to
129 * read/write a 32bit word and mask/modify the data we actually want.
131 static int bonito64_pcibios_read(struct pci_bus
*bus
, unsigned int devfn
,
132 int where
, int size
, u32
* val
)
136 if ((size
== 2) && (where
& 1))
137 return PCIBIOS_BAD_REGISTER_NUMBER
;
138 else if ((size
== 4) && (where
& 3))
139 return PCIBIOS_BAD_REGISTER_NUMBER
;
141 if (bonito64_pcibios_config_access(PCI_ACCESS_READ
, bus
, devfn
, where
,
146 *val
= (data
>> ((where
& 3) << 3)) & 0xff;
148 *val
= (data
>> ((where
& 3) << 3)) & 0xffff;
152 return PCIBIOS_SUCCESSFUL
;
155 static int bonito64_pcibios_write(struct pci_bus
*bus
, unsigned int devfn
,
156 int where
, int size
, u32 val
)
160 if ((size
== 2) && (where
& 1))
161 return PCIBIOS_BAD_REGISTER_NUMBER
;
162 else if ((size
== 4) && (where
& 3))
163 return PCIBIOS_BAD_REGISTER_NUMBER
;
168 if (bonito64_pcibios_config_access(PCI_ACCESS_READ
, bus
, devfn
,
173 data
= (data
& ~(0xff << ((where
& 3) << 3))) |
174 (val
<< ((where
& 3) << 3));
176 data
= (data
& ~(0xffff << ((where
& 3) << 3))) |
177 (val
<< ((where
& 3) << 3));
180 if (bonito64_pcibios_config_access(PCI_ACCESS_WRITE
, bus
, devfn
, where
,
184 return PCIBIOS_SUCCESSFUL
;
187 struct pci_ops bonito64_pci_ops
= {
188 .read
= bonito64_pcibios_read
,
189 .write
= bonito64_pcibios_write