arch/powerpc/boot/dts/mpc8548cds.dts

   1 /*
   2  * MPC8555 CDS Device Tree Source
   3  *
   4  * Copyright 2006 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12
  13 / {
  14         model = "MPC8548CDS";
  15         compatible = "MPC85xxCDS";
  16         #address-cells = <1>;
  17         #size-cells = <1>;
  18         linux,phandle = <100>;
  19
  20         cpus {
  21                 #cpus = <1>;
  22                 #address-cells = <1>;
  23                 #size-cells = <0>;
  24                 linux,phandle = <200>;
  25
  26                 PowerPC,8548@0 {
  27                         device_type = "cpu";
  28                         reg = <0>;
  29                         d-cache-line-size = <20>;       // 32 bytes
  30                         i-cache-line-size = <20>;       // 32 bytes
  31                         d-cache-size = <8000>;          // L1, 32K
  32                         i-cache-size = <8000>;          // L1, 32K
  33                         timebase-frequency = <0>;       //  33 MHz, from uboot
  34                         bus-frequency = <0>;    // 166 MHz
  35                         clock-frequency = <0>;  // 825 MHz, from uboot
  36                         32-bit;
  37                         linux,phandle = <201>;
  38                 };
  39         };
  40
  41         memory {
  42                 device_type = "memory";
  43                 linux,phandle = <300>;
  44                 reg = <00000000 08000000>;      // 128M at 0x0
  45         };
  46
  47         soc8548@e0000000 {
  48                 #address-cells = <1>;
  49                 #size-cells = <1>;
  50                 #interrupt-cells = <2>;
  51                 device_type = "soc";
  52                 ranges = <0 e0000000 00100000>;
  53                 reg = <e0000000 00100000>;      // CCSRBAR 1M
  54                 bus-frequency = <0>;
  55
  56                 i2c@3000 {
  57                         device_type = "i2c";
  58                         compatible = "fsl-i2c";
  59                         reg = <3000 100>;
  60                         interrupts = <1b 2>;
  61                         interrupt-parent = <40000>;
  62                         dfsrr;
  63                 };
  64
  65                 mdio@24520 {
  66                         #address-cells = <1>;
  67                         #size-cells = <0>;
  68                         device_type = "mdio";
  69                         compatible = "gianfar";
  70                         reg = <24520 20>;
  71                         linux,phandle = <24520>;
  72                         ethernet-phy@0 {
  73                                 linux,phandle = <2452000>;
  74                                 interrupt-parent = <40000>;
  75                                 interrupts = <35 0>;
  76                                 reg = <0>;
  77                                 device_type = "ethernet-phy";
  78                         };
  79                         ethernet-phy@1 {
  80                                 linux,phandle = <2452001>;
  81                                 interrupt-parent = <40000>;
  82                                 interrupts = <35 0>;
  83                                 reg = <1>;
  84                                 device_type = "ethernet-phy";
  85                         };
  86
  87                         ethernet-phy@2 {
  88                                 linux,phandle = <2452002>;
  89                                 interrupt-parent = <40000>;
  90                                 interrupts = <35 0>;
  91                                 reg = <2>;
  92                                 device_type = "ethernet-phy";
  93                         };
  94                         ethernet-phy@3 {
  95                                 linux,phandle = <2452003>;
  96                                 interrupt-parent = <40000>;
  97                                 interrupts = <35 0>;
  98                                 reg = <3>;
  99                                 device_type = "ethernet-phy";
 100                         };
 101                 };
 102
 103                 ethernet@24000 {
 104                         #address-cells = <1>;
 105                         #size-cells = <0>;
 106                         device_type = "network";
 107                         model = "eTSEC";
 108                         compatible = "gianfar";
 109                         reg = <24000 1000>;
 110                         local-mac-address = [ 00 E0 0C 00 73 00 ];
 111                         interrupts = <d 2 e 2 12 2>;
 112                         interrupt-parent = <40000>;
 113                         phy-handle = <2452000>;
 114                 };
 115
 116                 ethernet@25000 {
 117                         #address-cells = <1>;
 118                         #size-cells = <0>;
 119                         device_type = "network";
 120                         model = "eTSEC";
 121                         compatible = "gianfar";
 122                         reg = <25000 1000>;
 123                         local-mac-address = [ 00 E0 0C 00 73 01 ];
 124                         interrupts = <13 2 14 2 18 2>;
 125                         interrupt-parent = <40000>;
 126                         phy-handle = <2452001>;
 127                 };
 128
 129                 ethernet@26000 {
 130                         #address-cells = <1>;
 131                         #size-cells = <0>;
 132                         device_type = "network";
 133                         model = "eTSEC";
 134                         compatible = "gianfar";
 135                         reg = <26000 1000>;
 136                         local-mac-address = [ 00 E0 0C 00 73 02 ];
 137                         interrupts = <f 2 10 2 11 2>;
 138                         interrupt-parent = <40000>;
 139                         phy-handle = <2452001>;
 140                 };
 141
 142 /* eTSEC 4 is currently broken
 143                 ethernet@27000 {
 144                         #address-cells = <1>;
 145                         #size-cells = <0>;
 146                         device_type = "network";
 147                         model = "eTSEC";
 148                         compatible = "gianfar";
 149                         reg = <27000 1000>;
 150                         local-mac-address = [ 00 E0 0C 00 73 03 ];
 151                         interrupts = <15 2 16 2 17 2>;
 152                         interrupt-parent = <40000>;
 153                         phy-handle = <2452001>;
 154                 };
 155  */
 156
 157                 serial@4500 {
 158                         device_type = "serial";
 159                         compatible = "ns16550";
 160                         reg = <4500 100>;       // reg base, size
 161                         clock-frequency = <0>;  // should we fill in in uboot?
 162                         interrupts = <1a 2>;
 163                         interrupt-parent = <40000>;
 164                 };
 165
 166                 serial@4600 {
 167                         device_type = "serial";
 168                         compatible = "ns16550";
 169                         reg = <4600 100>;       // reg base, size
 170                         clock-frequency = <0>;  // should we fill in in uboot?
 171                         interrupts = <1a 2>;
 172                         interrupt-parent = <40000>;
 173                 };
 174
 175                 pci@8000 {
 176                         linux,phandle = <8000>;
 177                         interrupt-map-mask = <1f800 0 0 7>;
 178                         interrupt-map = <
 179
 180                                 /* IDSEL 0x10 */
 181                                 08000 0 0 1 40000 30 1
 182                                 08000 0 0 2 40000 31 1
 183                                 08000 0 0 3 40000 32 1
 184                                 08000 0 0 4 40000 33 1
 185
 186                                 /* IDSEL 0x11 */
 187                                 08800 0 0 1 40000 30 1
 188                                 08800 0 0 2 40000 31 1
 189                                 08800 0 0 3 40000 32 1
 190                                 08800 0 0 4 40000 33 1
 191
 192                                 /* IDSEL 0x12 (Slot 1) */
 193                                 09000 0 0 1 40000 30 1
 194                                 09000 0 0 2 40000 31 1
 195                                 09000 0 0 3 40000 32 1
 196                                 09000 0 0 4 40000 33 1
 197
 198                                 /* IDSEL 0x13 (Slot 2) */
 199                                 09800 0 0 1 40000 31 1
 200                                 09800 0 0 2 40000 32 1
 201                                 09800 0 0 3 40000 33 1
 202                                 09800 0 0 4 40000 30 1
 203
 204                                 /* IDSEL 0x14 (Slot 3) */
 205                                 0a000 0 0 1 40000 32 1
 206                                 0a000 0 0 2 40000 33 1
 207                                 0a000 0 0 3 40000 30 1
 208                                 0a000 0 0 4 40000 31 1
 209
 210                                 /* IDSEL 0x15 (Slot 4) */
 211                                 0a800 0 0 1 40000 33 1
 212                                 0a800 0 0 2 40000 30 1
 213                                 0a800 0 0 3 40000 31 1
 214                                 0a800 0 0 4 40000 32 1
 215
 216                                 /* Bus 1 (Tundra Bridge) */
 217                                 /* IDSEL 0x12 (ISA bridge) */
 218                                 19000 0 0 1 40000 30 1
 219                                 19000 0 0 2 40000 31 1
 220                                 19000 0 0 3 40000 32 1
 221                                 19000 0 0 4 40000 33 1>;
 222                         interrupt-parent = <40000>;
 223                         interrupts = <08 2>;
 224                         bus-range = <0 0>;
 225                         ranges = <02000000 0 80000000 80000000 0 20000000
 226                                   01000000 0 00000000 e2000000 0 00100000>;
 227                         clock-frequency = <3f940aa>;
 228                         #interrupt-cells = <1>;
 229                         #size-cells = <2>;
 230                         #address-cells = <3>;
 231                         reg = <8000 1000>;
 232                         compatible = "85xx";
 233                         device_type = "pci";
 234
 235                         i8259@19000 {
 236                                 clock-frequency = <0>;
 237                                 interrupt-controller;
 238                                 device_type = "interrupt-controller";
 239                                 reg = <19000 0 0 0 1>;
 240                                 #address-cells = <0>;
 241                                 #interrupt-cells = <2>;
 242                                 built-in;
 243                                 compatible = "chrp,iic";
 244                                 big-endian;
 245                                 interrupts = <1>;
 246                                 interrupt-parent = <8000>;
 247                         };
 248                 };
 249
 250                 pci@9000 {
 251                         linux,phandle = <9000>;
 252                         interrupt-map-mask = <f800 0 0 7>;
 253                         interrupt-map = <
 254
 255                                 /* IDSEL 0x15 */
 256                                 a800 0 0 1 40000 3b 1
 257                                 a800 0 0 2 40000 3b 1
 258                                 a800 0 0 3 40000 3b 1
 259                                 a800 0 0 4 40000 3b 1>;
 260                         interrupt-parent = <40000>;
 261                         interrupts = <09 2>;
 262                         bus-range = <0 0>;
 263                         ranges = <02000000 0 a0000000 a0000000 0 20000000
 264                                   01000000 0 00000000 e3000000 0 00100000>;
 265                         clock-frequency = <3f940aa>;
 266                         #interrupt-cells = <1>;
 267                         #size-cells = <2>;
 268                         #address-cells = <3>;
 269                         reg = <9000 1000>;
 270                         compatible = "85xx";
 271                         device_type = "pci";
 272                 };
 273
 274                 pic@40000 {
 275                         linux,phandle = <40000>;
 276                         clock-frequency = <0>;
 277                         interrupt-controller;
 278                         #address-cells = <0>;
 279                         #interrupt-cells = <2>;
 280                         reg = <40000 40000>;
 281                         built-in;
 282                         compatible = "chrp,open-pic";
 283                         device_type = "open-pic";
 284                         big-endian;
 285                 };
 286         };
 287 };