[PATCH] briq_panel: read() and write() get __user pointers, damnit
[linux-2.6/verdex.git] / arch / powerpc / kernel / rtas_pci.c
blobb4a0de79c0600e306aaae78aae5a84bf3c94cf00
1 /*
2 * Copyright (C) 2001 Dave Engebretsen, IBM Corporation
3 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
5 * RTAS specific routines for PCI.
7 * Based on code from pci.c, chrp_pci.c and pSeries_pci.c
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #include <linux/kernel.h>
25 #include <linux/threads.h>
26 #include <linux/pci.h>
27 #include <linux/string.h>
28 #include <linux/init.h>
29 #include <linux/bootmem.h>
31 #include <asm/io.h>
32 #include <asm/pgtable.h>
33 #include <asm/irq.h>
34 #include <asm/prom.h>
35 #include <asm/machdep.h>
36 #include <asm/pci-bridge.h>
37 #include <asm/iommu.h>
38 #include <asm/rtas.h>
39 #include <asm/mpic.h>
40 #include <asm/ppc-pci.h>
42 /* RTAS tokens */
43 static int read_pci_config;
44 static int write_pci_config;
45 static int ibm_read_pci_config;
46 static int ibm_write_pci_config;
48 static inline int config_access_valid(struct pci_dn *dn, int where)
50 if (where < 256)
51 return 1;
52 if (where < 4096 && dn->pci_ext_config_space)
53 return 1;
55 return 0;
58 static int of_device_available(struct device_node * dn)
60 const char *status;
62 status = get_property(dn, "status", NULL);
64 if (!status)
65 return 1;
67 if (!strcmp(status, "okay"))
68 return 1;
70 return 0;
73 int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val)
75 int returnval = -1;
76 unsigned long buid, addr;
77 int ret;
79 if (!pdn)
80 return PCIBIOS_DEVICE_NOT_FOUND;
81 if (!config_access_valid(pdn, where))
82 return PCIBIOS_BAD_REGISTER_NUMBER;
84 addr = rtas_config_addr(pdn->busno, pdn->devfn, where);
85 buid = pdn->phb->buid;
86 if (buid) {
87 ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval,
88 addr, BUID_HI(buid), BUID_LO(buid), size);
89 } else {
90 ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size);
92 *val = returnval;
94 if (ret)
95 return PCIBIOS_DEVICE_NOT_FOUND;
97 if (returnval == EEH_IO_ERROR_VALUE(size) &&
98 eeh_dn_check_failure (pdn->node, NULL))
99 return PCIBIOS_DEVICE_NOT_FOUND;
101 return PCIBIOS_SUCCESSFUL;
104 static int rtas_pci_read_config(struct pci_bus *bus,
105 unsigned int devfn,
106 int where, int size, u32 *val)
108 struct device_node *busdn, *dn;
110 if (bus->self)
111 busdn = pci_device_to_OF_node(bus->self);
112 else
113 busdn = bus->sysdata; /* must be a phb */
115 /* Search only direct children of the bus */
116 for (dn = busdn->child; dn; dn = dn->sibling) {
117 struct pci_dn *pdn = PCI_DN(dn);
118 if (pdn && pdn->devfn == devfn
119 && of_device_available(dn))
120 return rtas_read_config(pdn, where, size, val);
123 return PCIBIOS_DEVICE_NOT_FOUND;
126 int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val)
128 unsigned long buid, addr;
129 int ret;
131 if (!pdn)
132 return PCIBIOS_DEVICE_NOT_FOUND;
133 if (!config_access_valid(pdn, where))
134 return PCIBIOS_BAD_REGISTER_NUMBER;
136 addr = rtas_config_addr(pdn->busno, pdn->devfn, where);
137 buid = pdn->phb->buid;
138 if (buid) {
139 ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr,
140 BUID_HI(buid), BUID_LO(buid), size, (ulong) val);
141 } else {
142 ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val);
145 if (ret)
146 return PCIBIOS_DEVICE_NOT_FOUND;
148 return PCIBIOS_SUCCESSFUL;
151 static int rtas_pci_write_config(struct pci_bus *bus,
152 unsigned int devfn,
153 int where, int size, u32 val)
155 struct device_node *busdn, *dn;
157 if (bus->self)
158 busdn = pci_device_to_OF_node(bus->self);
159 else
160 busdn = bus->sysdata; /* must be a phb */
162 /* Search only direct children of the bus */
163 for (dn = busdn->child; dn; dn = dn->sibling) {
164 struct pci_dn *pdn = PCI_DN(dn);
165 if (pdn && pdn->devfn == devfn
166 && of_device_available(dn))
167 return rtas_write_config(pdn, where, size, val);
169 return PCIBIOS_DEVICE_NOT_FOUND;
172 struct pci_ops rtas_pci_ops = {
173 rtas_pci_read_config,
174 rtas_pci_write_config
177 int is_python(struct device_node *dev)
179 const char *model = get_property(dev, "model", NULL);
181 if (model && strstr(model, "Python"))
182 return 1;
184 return 0;
187 static void python_countermeasures(struct device_node *dev)
189 struct resource registers;
190 void __iomem *chip_regs;
191 volatile u32 val;
193 if (of_address_to_resource(dev, 0, &registers)) {
194 printk(KERN_ERR "Can't get address for Python workarounds !\n");
195 return;
198 /* Python's register file is 1 MB in size. */
199 chip_regs = ioremap(registers.start & ~(0xfffffUL), 0x100000);
202 * Firmware doesn't always clear this bit which is critical
203 * for good performance - Anton
206 #define PRG_CL_RESET_VALID 0x00010000
208 val = in_be32(chip_regs + 0xf6030);
209 if (val & PRG_CL_RESET_VALID) {
210 printk(KERN_INFO "Python workaround: ");
211 val &= ~PRG_CL_RESET_VALID;
212 out_be32(chip_regs + 0xf6030, val);
214 * We must read it back for changes to
215 * take effect
217 val = in_be32(chip_regs + 0xf6030);
218 printk("reg0: %x\n", val);
221 iounmap(chip_regs);
224 void __init init_pci_config_tokens (void)
226 read_pci_config = rtas_token("read-pci-config");
227 write_pci_config = rtas_token("write-pci-config");
228 ibm_read_pci_config = rtas_token("ibm,read-pci-config");
229 ibm_write_pci_config = rtas_token("ibm,write-pci-config");
232 unsigned long __devinit get_phb_buid (struct device_node *phb)
234 int addr_cells;
235 const unsigned int *buid_vals;
236 unsigned int len;
237 unsigned long buid;
239 if (ibm_read_pci_config == -1) return 0;
241 /* PHB's will always be children of the root node,
242 * or so it is promised by the current firmware. */
243 if (phb->parent == NULL)
244 return 0;
245 if (phb->parent->parent)
246 return 0;
248 buid_vals = get_property(phb, "reg", &len);
249 if (buid_vals == NULL)
250 return 0;
252 addr_cells = prom_n_addr_cells(phb);
253 if (addr_cells == 1) {
254 buid = (unsigned long) buid_vals[0];
255 } else {
256 buid = (((unsigned long)buid_vals[0]) << 32UL) |
257 (((unsigned long)buid_vals[1]) & 0xffffffff);
259 return buid;
262 static int phb_set_bus_ranges(struct device_node *dev,
263 struct pci_controller *phb)
265 const int *bus_range;
266 unsigned int len;
268 bus_range = get_property(dev, "bus-range", &len);
269 if (bus_range == NULL || len < 2 * sizeof(int)) {
270 return 1;
273 phb->first_busno = bus_range[0];
274 phb->last_busno = bus_range[1];
276 return 0;
279 int __devinit setup_phb(struct device_node *dev, struct pci_controller *phb)
281 if (is_python(dev))
282 python_countermeasures(dev);
284 if (phb_set_bus_ranges(dev, phb))
285 return 1;
287 phb->ops = &rtas_pci_ops;
288 phb->buid = get_phb_buid(dev);
290 return 0;
293 unsigned long __init find_and_init_phbs(void)
295 struct device_node *node;
296 struct pci_controller *phb;
297 unsigned int index;
298 struct device_node *root = of_find_node_by_path("/");
300 index = 0;
301 for (node = of_get_next_child(root, NULL);
302 node != NULL;
303 node = of_get_next_child(root, node)) {
305 if (node->type == NULL || (strcmp(node->type, "pci") != 0 &&
306 strcmp(node->type, "pciex") != 0))
307 continue;
309 phb = pcibios_alloc_controller(node);
310 if (!phb)
311 continue;
312 setup_phb(node, phb);
313 pci_process_bridge_OF_ranges(phb, node, 0);
314 pci_setup_phb_io(phb, index == 0);
315 index++;
318 of_node_put(root);
319 pci_devs_phb_init();
322 * pci_probe_only and pci_assign_all_buses can be set via properties
323 * in chosen.
325 if (of_chosen) {
326 const int *prop;
328 prop = get_property(of_chosen,
329 "linux,pci-probe-only", NULL);
330 if (prop)
331 pci_probe_only = *prop;
333 prop = get_property(of_chosen,
334 "linux,pci-assign-all-buses", NULL);
335 if (prop)
336 pci_assign_all_buses = *prop;
339 return 0;
342 /* RPA-specific bits for removing PHBs */
343 int pcibios_remove_root_bus(struct pci_controller *phb)
345 struct pci_bus *b = phb->bus;
346 struct resource *res;
347 int rc, i;
349 res = b->resource[0];
350 if (!res->flags) {
351 printk(KERN_ERR "%s: no IO resource for PHB %s\n", __FUNCTION__,
352 b->name);
353 return 1;
356 rc = unmap_bus_range(b);
357 if (rc) {
358 printk(KERN_ERR "%s: failed to unmap IO on bus %s\n",
359 __FUNCTION__, b->name);
360 return 1;
363 if (release_resource(res)) {
364 printk(KERN_ERR "%s: failed to release IO on bus %s\n",
365 __FUNCTION__, b->name);
366 return 1;
369 for (i = 1; i < 3; ++i) {
370 res = b->resource[i];
371 if (!res->flags && i == 0) {
372 printk(KERN_ERR "%s: no MEM resource for PHB %s\n",
373 __FUNCTION__, b->name);
374 return 1;
376 if (res->flags && release_resource(res)) {
377 printk(KERN_ERR
378 "%s: failed to release IO %d on bus %s\n",
379 __FUNCTION__, i, b->name);
380 return 1;
384 list_del(&phb->list_node);
385 pcibios_free_controller(phb);
387 return 0;
389 EXPORT_SYMBOL(pcibios_remove_root_bus);