2 * Support for the Broadcom BCM3510 ATSC demodulator (1st generation Air2PC)
4 * Copyright (C) 2001-5, B2C2 inc.
6 * GPL/Linux driver written by Patrick Boettcher <patrick.boettcher@desy.de>
8 * This driver is "hard-coded" to be used with the 1st generation of
9 * Technisat/B2C2's Air2PC ATSC PCI/USB cards/boxes. The pll-programming
10 * (Panasonic CT10S) is located here, which is actually wrong. Unless there is
11 * another device with a BCM3510, this is no problem.
13 * The driver works also with QAM64 DVB-C, but had an unreasonable high
14 * UNC. (Tested with the Air2PC ATSC 1st generation)
16 * You'll need a firmware for this driver in order to get it running. It is
17 * called "dvb-fe-bcm3510-01.fw".
19 * This program is free software; you can redistribute it and/or modify it
20 * under the terms of the GNU General Public License as published by the Free
21 * Software Foundation; either version 2 of the License, or (at your option)
24 * This program is distributed in the hope that it will be useful, but WITHOUT
25 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
26 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
29 * You should have received a copy of the GNU General Public License along with
30 * this program; if not, write to the Free Software Foundation, Inc., 675 Mass
31 * Ave, Cambridge, MA 02139, USA.
34 #include <linux/init.h>
35 #include <linux/module.h>
36 #include <linux/moduleparam.h>
37 #include <linux/device.h>
38 #include <linux/firmware.h>
40 #include "dvb_frontend.h"
42 #include "bcm3510_priv.h"
44 struct bcm3510_state
{
46 struct i2c_adapter
* i2c
;
47 struct dvb_frontend_ops ops
;
48 const struct bcm3510_config
* config
;
49 struct dvb_frontend frontend
;
51 /* demodulator private data */
52 struct semaphore hab_sem
;
55 unsigned long next_status_check
;
56 unsigned long status_check_interval
;
57 struct bcm3510_hab_cmd_status1 status1
;
58 struct bcm3510_hab_cmd_status2 status2
;
62 module_param(debug
, int, 0644);
63 MODULE_PARM_DESC(debug
, "set debugging level (1=info,2=i2c (|-able)).");
65 #define dprintk(level,x...) if (level & debug) printk(x)
66 #define dbufout(b,l,m) {\
68 for (i = 0; i < l; i++) \
71 #define deb_info(args...) dprintk(0x01,args)
72 #define deb_i2c(args...) dprintk(0x02,args)
73 #define deb_hab(args...) dprintk(0x04,args)
75 /* transfer functions */
76 static int bcm3510_writebytes (struct bcm3510_state
*state
, u8 reg
, u8
*buf
, u8 len
)
80 struct i2c_msg msg
= { .addr
= state
->config
->demod_address
, .flags
= 0, .buf
= b
, .len
= len
+ 1 };
83 memcpy(&b
[1],buf
,len
);
85 deb_i2c("i2c wr %02x: ",reg
);
86 dbufout(buf
,len
,deb_i2c
);
89 if ((err
= i2c_transfer (state
->i2c
, &msg
, 1)) != 1) {
91 deb_info("%s: i2c write error (addr %02x, reg %02x, err == %i)\n",
92 __FUNCTION__
, state
->config
->demod_address
, reg
, err
);
99 static int bcm3510_readbytes (struct bcm3510_state
*state
, u8 reg
, u8
*buf
, u8 len
)
101 struct i2c_msg msg
[] = {
102 { .addr
= state
->config
->demod_address
, .flags
= 0, .buf
= ®
, .len
= 1 },
103 { .addr
= state
->config
->demod_address
, .flags
= I2C_M_RD
, .buf
= buf
, .len
= len
}
109 if ((err
= i2c_transfer (state
->i2c
, msg
, 2)) != 2) {
110 deb_info("%s: i2c read error (addr %02x, reg %02x, err == %i)\n",
111 __FUNCTION__
, state
->config
->demod_address
, reg
, err
);
114 deb_i2c("i2c rd %02x: ",reg
);
115 dbufout(buf
,len
,deb_i2c
);
121 static int bcm3510_writeB(struct bcm3510_state
*state
, u8 reg
, bcm3510_register_value v
)
123 return bcm3510_writebytes(state
,reg
,&v
.raw
,1);
126 static int bcm3510_readB(struct bcm3510_state
*state
, u8 reg
, bcm3510_register_value
*v
)
128 return bcm3510_readbytes(state
,reg
,&v
->raw
,1);
131 /* Host Access Buffer transfers */
132 static int bcm3510_hab_get_response(struct bcm3510_state
*st
, u8
*buf
, int len
)
134 bcm3510_register_value v
;
137 v
.HABADR_a6
.HABADR
= 0;
138 if ((ret
= bcm3510_writeB(st
,0xa6,v
)) < 0)
141 for (i
= 0; i
< len
; i
++) {
142 if ((ret
= bcm3510_readB(st
,0xa7,&v
)) < 0)
144 buf
[i
] = v
.HABDATA_a7
;
149 static int bcm3510_hab_send_request(struct bcm3510_state
*st
, u8
*buf
, int len
)
151 bcm3510_register_value v
,hab
;
155 /* Check if any previous HAB request still needs to be serviced by the
156 * Aquisition Processor before sending new request */
157 if ((ret
= bcm3510_readB(st
,0xa8,&v
)) < 0)
159 if (v
.HABSTAT_a8
.HABR
) {
160 deb_info("HAB is running already - clearing it.\n");
161 v
.HABSTAT_a8
.HABR
= 0;
162 bcm3510_writeB(st
,0xa8,v
);
166 /* Send the start HAB Address (automatically incremented after write of
167 * HABDATA) and write the HAB Data */
168 hab
.HABADR_a6
.HABADR
= 0;
169 if ((ret
= bcm3510_writeB(st
,0xa6,hab
)) < 0)
172 for (i
= 0; i
< len
; i
++) {
173 hab
.HABDATA_a7
= buf
[i
];
174 if ((ret
= bcm3510_writeB(st
,0xa7,hab
)) < 0)
178 /* Set the HABR bit to indicate AP request in progress (LBHABR allows HABR to
180 v
.raw
= 0; v
.HABSTAT_a8
.HABR
= 1; v
.HABSTAT_a8
.LDHABR
= 1;
181 if ((ret
= bcm3510_writeB(st
,0xa8,v
)) < 0)
184 /* Polling method: Wait until the AP finishes processing the HAB request */
186 while (time_before(jiffies
, t
)) {
187 deb_info("waiting for HAB to complete\n");
189 if ((ret
= bcm3510_readB(st
,0xa8,&v
)) < 0)
192 if (!v
.HABSTAT_a8
.HABR
)
196 deb_info("send_request execution timed out.\n");
200 static int bcm3510_do_hab_cmd(struct bcm3510_state
*st
, u8 cmd
, u8 msgid
, u8
*obuf
, u8 olen
, u8
*ibuf
, u8 ilen
)
202 u8 ob
[olen
+2],ib
[ilen
+2];
207 memcpy(&ob
[2],obuf
,olen
);
209 deb_hab("hab snd: ");
210 dbufout(ob
,olen
+2,deb_hab
);
213 if (down_interruptible(&st
->hab_sem
) < 0)
216 if ((ret
= bcm3510_hab_send_request(st
, ob
, olen
+2)) < 0 ||
217 (ret
= bcm3510_hab_get_response(st
, ib
, ilen
+2)) < 0)
220 deb_hab("hab get: ");
221 dbufout(ib
,ilen
+2,deb_hab
);
224 memcpy(ibuf
,&ib
[2],ilen
);
231 /* not needed, we use a semaphore to prevent HAB races */
232 static int bcm3510_is_ap_ready(struct bcm3510_state
*st
)
234 bcm3510_register_value ap
,hab
;
237 if ((ret
= bcm3510_readB(st
,0xa8,&hab
)) < 0 ||
238 (ret
= bcm3510_readB(st
,0xa2,&ap
) < 0))
241 if (ap
.APSTAT1_a2
.RESET
|| ap
.APSTAT1_a2
.IDLE
|| ap
.APSTAT1_a2
.STOP
|| hab
.HABSTAT_a8
.HABR
) {
242 deb_info("AP is busy\n");
250 static int bcm3510_bert_reset(struct bcm3510_state
*st
)
252 bcm3510_register_value b
;
255 if ((ret
< bcm3510_readB(st
,0xfa,&b
)) < 0)
258 b
.BERCTL_fa
.RESYNC
= 0; bcm3510_writeB(st
,0xfa,b
);
259 b
.BERCTL_fa
.RESYNC
= 1; bcm3510_writeB(st
,0xfa,b
);
260 b
.BERCTL_fa
.RESYNC
= 0; bcm3510_writeB(st
,0xfa,b
);
261 b
.BERCTL_fa
.CNTCTL
= 1; b
.BERCTL_fa
.BITCNT
= 1; bcm3510_writeB(st
,0xfa,b
);
263 /* clear residual bit counter TODO */
267 static int bcm3510_refresh_state(struct bcm3510_state
*st
)
269 if (time_after(jiffies
,st
->next_status_check
)) {
270 bcm3510_do_hab_cmd(st
, CMD_STATUS
, MSGID_STATUS1
, NULL
,0, (u8
*)&st
->status1
, sizeof(st
->status1
));
271 bcm3510_do_hab_cmd(st
, CMD_STATUS
, MSGID_STATUS2
, NULL
,0, (u8
*)&st
->status2
, sizeof(st
->status2
));
272 st
->next_status_check
= jiffies
+ (st
->status_check_interval
*HZ
)/1000;
277 static int bcm3510_read_status(struct dvb_frontend
*fe
, fe_status_t
*status
)
279 struct bcm3510_state
* st
= fe
->demodulator_priv
;
280 bcm3510_refresh_state(st
);
283 if (st
->status1
.STATUS1
.RECEIVER_LOCK
)
284 *status
|= FE_HAS_LOCK
| FE_HAS_SYNC
;
286 if (st
->status1
.STATUS1
.FEC_LOCK
)
287 *status
|= FE_HAS_VITERBI
;
289 if (st
->status1
.STATUS1
.OUT_PLL_LOCK
)
290 *status
|= FE_HAS_SIGNAL
| FE_HAS_CARRIER
;
292 if (*status
& FE_HAS_LOCK
)
293 st
->status_check_interval
= 1500;
294 else /* more frequently checks if no lock has been achieved yet */
295 st
->status_check_interval
= 500;
297 deb_info("real_status: %02x\n",*status
);
301 static int bcm3510_read_ber(struct dvb_frontend
* fe
, u32
* ber
)
303 struct bcm3510_state
* st
= fe
->demodulator_priv
;
304 bcm3510_refresh_state(st
);
306 *ber
= (st
->status2
.LDBER0
<< 16) | (st
->status2
.LDBER1
<< 8) | st
->status2
.LDBER2
;
310 static int bcm3510_read_unc(struct dvb_frontend
* fe
, u32
* unc
)
312 struct bcm3510_state
* st
= fe
->demodulator_priv
;
313 bcm3510_refresh_state(st
);
314 *unc
= (st
->status2
.LDUERC0
<< 8) | st
->status2
.LDUERC1
;
318 static int bcm3510_read_signal_strength(struct dvb_frontend
* fe
, u16
* strength
)
320 struct bcm3510_state
* st
= fe
->demodulator_priv
;
323 bcm3510_refresh_state(st
);
324 t
= st
->status2
.SIGNAL
;
333 /* normalize if necessary */
334 *strength
= (t
<< 8) | t
;
338 static int bcm3510_read_snr(struct dvb_frontend
* fe
, u16
* snr
)
340 struct bcm3510_state
* st
= fe
->demodulator_priv
;
341 bcm3510_refresh_state(st
);
343 *snr
= st
->status1
.SNR_EST0
*1000 + ((st
->status1
.SNR_EST1
*1000) >> 8);
347 /* tuner frontend programming */
348 static int bcm3510_tuner_cmd(struct bcm3510_state
* st
,u8 bc
, u16 n
, u8 a
)
350 struct bcm3510_hab_cmd_tune c
;
351 memset(&c
,0,sizeof(struct bcm3510_hab_cmd_tune
));
353 /* I2C Mode disabled, set 16 control / Data pairs */
356 /* CS1, CS0, DATA, CLK bits control the tuner RF_AGC_SEL pin is set to
357 * logic high (as Configuration) */
359 /* Set duration of the initial state of TUNCTL = 3.34 micro Sec */
360 c
.TUNCTL_state
= 0x40;
362 /* PRESCALER DEVIDE RATIO | BC1_2_3_4; (band switch), 1stosc REFERENCE COUNTER REF_S12 and REF_S11 */
363 c
.ctl_dat
[0].ctrl
.size
= BITS_8
;
364 c
.ctl_dat
[0].data
= 0x80 | bc
;
366 /* Control DATA pin, 1stosc REFERENCE COUNTER REF_S10 to REF_S3 */
367 c
.ctl_dat
[1].ctrl
.size
= BITS_8
;
368 c
.ctl_dat
[1].data
= 4;
370 /* set CONTROL BIT 1 to 1, 1stosc REFERENCE COUNTER REF_S2 to REF_S1 */
371 c
.ctl_dat
[2].ctrl
.size
= BITS_3
;
372 c
.ctl_dat
[2].data
= 0x20;
374 /* control CS0 pin, pulse byte ? */
375 c
.ctl_dat
[3].ctrl
.size
= BITS_3
;
376 c
.ctl_dat
[3].ctrl
.clk_off
= 1;
377 c
.ctl_dat
[3].ctrl
.cs0
= 1;
378 c
.ctl_dat
[3].data
= 0x40;
380 /* PGM_S18 to PGM_S11 */
381 c
.ctl_dat
[4].ctrl
.size
= BITS_8
;
382 c
.ctl_dat
[4].data
= n
>> 3;
384 /* PGM_S10 to PGM_S8, SWL_S7 to SWL_S3 */
385 c
.ctl_dat
[5].ctrl
.size
= BITS_8
;
386 c
.ctl_dat
[5].data
= ((n
& 0x7) << 5) | (a
>> 2);
388 /* SWL_S2 and SWL_S1, set CONTROL BIT 2 to 0 */
389 c
.ctl_dat
[6].ctrl
.size
= BITS_3
;
390 c
.ctl_dat
[6].data
= (a
<< 6) & 0xdf;
392 /* control CS0 pin, pulse byte ? */
393 c
.ctl_dat
[7].ctrl
.size
= BITS_3
;
394 c
.ctl_dat
[7].ctrl
.clk_off
= 1;
395 c
.ctl_dat
[7].ctrl
.cs0
= 1;
396 c
.ctl_dat
[7].data
= 0x40;
398 /* PRESCALER DEVIDE RATIO, 2ndosc REFERENCE COUNTER REF_S12 and REF_S11 */
399 c
.ctl_dat
[8].ctrl
.size
= BITS_8
;
400 c
.ctl_dat
[8].data
= 0x80;
402 /* 2ndosc REFERENCE COUNTER REF_S10 to REF_S3 */
403 c
.ctl_dat
[9].ctrl
.size
= BITS_8
;
404 c
.ctl_dat
[9].data
= 0x10;
406 /* set CONTROL BIT 1 to 1, 2ndosc REFERENCE COUNTER REF_S2 to REF_S1 */
407 c
.ctl_dat
[10].ctrl
.size
= BITS_3
;
408 c
.ctl_dat
[10].data
= 0x20;
411 c
.ctl_dat
[11].ctrl
.size
= BITS_3
;
412 c
.ctl_dat
[11].ctrl
.clk_off
= 1;
413 c
.ctl_dat
[11].ctrl
.cs1
= 1;
414 c
.ctl_dat
[11].data
= 0x40;
416 /* PGM_S18 to PGM_S11 */
417 c
.ctl_dat
[12].ctrl
.size
= BITS_8
;
418 c
.ctl_dat
[12].data
= 0x2a;
420 /* PGM_S10 to PGM_S8 and SWL_S7 to SWL_S3 */
421 c
.ctl_dat
[13].ctrl
.size
= BITS_8
;
422 c
.ctl_dat
[13].data
= 0x8e;
424 /* SWL_S2 and SWL_S1 and set CONTROL BIT 2 to 0 */
425 c
.ctl_dat
[14].ctrl
.size
= BITS_3
;
426 c
.ctl_dat
[14].data
= 0;
429 c
.ctl_dat
[15].ctrl
.size
= BITS_3
;
430 c
.ctl_dat
[15].ctrl
.clk_off
= 1;
431 c
.ctl_dat
[15].ctrl
.cs1
= 1;
432 c
.ctl_dat
[15].data
= 0x40;
434 return bcm3510_do_hab_cmd(st
,CMD_TUNE
, MSGID_TUNE
,(u8
*) &c
,sizeof(c
), NULL
, 0);
437 static int bcm3510_set_freq(struct bcm3510_state
* st
,u32 freq
)
441 s32 YIntercept
,Tfvco1
;
445 deb_info("%dkHz:",freq
);
446 /* set Band Switch */
449 else if (freq
<= 378000)
454 if (freq
>= 470000) {
457 } else if (freq
>= 90000) {
460 } else if (freq
>= 76000){
468 Tfvco1
= (((freq
/6000)*60 + YIntercept
)*4)/10;
473 deb_info(" BC1_2_3_4: %x, N: %x A: %x\n", bc
, n
, a
);
474 if (n
>= 16 && n
<= 2047)
475 return bcm3510_tuner_cmd(st
,bc
,n
,a
);
480 static int bcm3510_set_frontend(struct dvb_frontend
* fe
,
481 struct dvb_frontend_parameters
*p
)
483 struct bcm3510_state
* st
= fe
->demodulator_priv
;
484 struct bcm3510_hab_cmd_ext_acquire cmd
;
485 struct bcm3510_hab_cmd_bert_control bert
;
488 memset(&cmd
,0,sizeof(cmd
));
489 switch (p
->u
.vsb
.modulation
) {
491 cmd
.ACQUIRE0
.MODE
= 0x1;
492 cmd
.ACQUIRE1
.SYM_RATE
= 0x1;
493 cmd
.ACQUIRE1
.IF_FREQ
= 0x1;
496 cmd
.ACQUIRE0
.MODE
= 0x2;
497 cmd
.ACQUIRE1
.SYM_RATE
= 0x2;
498 cmd
.ACQUIRE1
.IF_FREQ
= 0x1;
501 cmd.ACQUIRE0.MODE = 0x3;
504 cmd.ACQUIRE0.MODE = 0x4;
507 cmd.ACQUIRE0.MODE = 0x5;
510 cmd.ACQUIRE0.MODE = 0x6;
513 cmd.ACQUIRE0.MODE = 0x7;
516 cmd
.ACQUIRE0
.MODE
= 0x8;
517 cmd
.ACQUIRE1
.SYM_RATE
= 0x0;
518 cmd
.ACQUIRE1
.IF_FREQ
= 0x0;
521 cmd
.ACQUIRE0
.MODE
= 0x9;
522 cmd
.ACQUIRE1
.SYM_RATE
= 0x0;
523 cmd
.ACQUIRE1
.IF_FREQ
= 0x0;
527 cmd
.ACQUIRE0
.OFFSET
= 0;
528 cmd
.ACQUIRE0
.NTSCSWEEP
= 1;
532 /* if (enableOffset) {
536 cmd.SYM_OFFSET0 = xx;
537 cmd.SYM_OFFSET1 = xx;
538 if (enableNtscSweep) {
543 bcm3510_do_hab_cmd(st
, CMD_ACQUIRE
, MSGID_EXT_TUNER_ACQUIRE
, (u8
*) &cmd
, sizeof(cmd
), NULL
, 0);
545 /* doing it with different MSGIDs, data book and source differs */
548 bcm3510_do_hab_cmd(st
, CMD_STATE_CONTROL
, MSGID_BERT_CONTROL
, (u8
*) &bert
, sizeof(bert
), NULL
, 0);
549 bcm3510_do_hab_cmd(st
, CMD_STATE_CONTROL
, MSGID_BERT_SET
, (u8
*) &bert
, sizeof(bert
), NULL
, 0);
551 bcm3510_bert_reset(st
);
553 if ((ret
= bcm3510_set_freq(st
,p
->frequency
)) < 0)
556 memset(&st
->status1
,0,sizeof(st
->status1
));
557 memset(&st
->status2
,0,sizeof(st
->status2
));
558 st
->status_check_interval
= 500;
560 /* Give the AP some time */
566 static int bcm3510_sleep(struct dvb_frontend
* fe
)
571 static int bcm3510_get_tune_settings(struct dvb_frontend
*fe
, struct dvb_frontend_tune_settings
*s
)
573 s
->min_delay_ms
= 1000;
579 static void bcm3510_release(struct dvb_frontend
* fe
)
581 struct bcm3510_state
* state
= fe
->demodulator_priv
;
585 /* firmware download:
586 * firmware file is build up like this:
587 * 16bit addr, 16bit length, 8byte of length
589 #define BCM3510_DEFAULT_FIRMWARE "dvb-fe-bcm3510-01.fw"
591 static int bcm3510_write_ram(struct bcm3510_state
*st
, u16 addr
, u8
*b
, u16 len
)
594 bcm3510_register_value vH
, vL
,vD
;
596 vH
.MADRH_a9
= addr
>> 8;
598 if ((ret
= bcm3510_writeB(st
,0xa9,vH
)) < 0) return ret
;
599 if ((ret
= bcm3510_writeB(st
,0xaa,vL
)) < 0) return ret
;
601 for (i
= 0; i
< len
; i
++) {
603 if ((ret
= bcm3510_writeB(st
,0xab,vD
)) < 0)
610 static int bcm3510_download_firmware(struct dvb_frontend
* fe
)
612 struct bcm3510_state
* st
= fe
->demodulator_priv
;
613 const struct firmware
*fw
;
618 deb_info("requesting firmware\n");
619 if ((ret
= st
->config
->request_firmware(fe
, &fw
, BCM3510_DEFAULT_FIRMWARE
)) < 0) {
620 err("could not load firmware (%s): %d",BCM3510_DEFAULT_FIRMWARE
,ret
);
623 deb_info("got firmware: %d\n",fw
->size
);
626 for (i
= 0; i
< fw
->size
;) {
627 addr
= le16_to_cpu( *( (u16
*)&b
[i
] ) );
628 len
= le16_to_cpu( *( (u16
*)&b
[i
+2] ) );
629 deb_info("firmware chunk, addr: 0x%04x, len: 0x%04x, total length: 0x%04x\n",addr
,len
,fw
->size
);
630 if ((ret
= bcm3510_write_ram(st
,addr
,&b
[i
+4],len
)) < 0) {
631 err("firmware download failed: %d\n",ret
);
636 release_firmware(fw
);
637 deb_info("firmware download successfully completed\n");
641 static int bcm3510_check_firmware_version(struct bcm3510_state
*st
)
643 struct bcm3510_hab_cmd_get_version_info ver
;
644 bcm3510_do_hab_cmd(st
,CMD_GET_VERSION_INFO
,MSGID_GET_VERSION_INFO
,NULL
,0,(u8
*)&ver
,sizeof(ver
));
646 deb_info("Version information: 0x%02x 0x%02x 0x%02x 0x%02x\n",
647 ver
.microcode_version
, ver
.script_version
, ver
.config_version
, ver
.demod_version
);
649 if (ver
.script_version
== BCM3510_DEF_SCRIPT_VERSION
&&
650 ver
.config_version
== BCM3510_DEF_CONFIG_VERSION
&&
651 ver
.demod_version
== BCM3510_DEF_DEMOD_VERSION
)
654 deb_info("version check failed\n");
658 /* (un)resetting the AP */
659 static int bcm3510_reset(struct bcm3510_state
*st
)
663 bcm3510_register_value v
;
665 bcm3510_readB(st
,0xa0,&v
); v
.HCTL1_a0
.RESET
= 1;
666 if ((ret
= bcm3510_writeB(st
,0xa0,v
)) < 0)
670 while (time_before(jiffies
, t
)) {
672 if ((ret
= bcm3510_readB(st
,0xa2,&v
)) < 0)
675 if (v
.APSTAT1_a2
.RESET
)
678 deb_info("reset timed out\n");
682 static int bcm3510_clear_reset(struct bcm3510_state
*st
)
684 bcm3510_register_value v
;
689 if ((ret
= bcm3510_writeB(st
,0xa0,v
)) < 0)
693 while (time_before(jiffies
, t
)) {
695 if ((ret
= bcm3510_readB(st
,0xa2,&v
)) < 0)
698 /* verify that reset is cleared */
699 if (!v
.APSTAT1_a2
.RESET
)
702 deb_info("reset clear timed out\n");
706 static int bcm3510_init_cold(struct bcm3510_state
*st
)
709 bcm3510_register_value v
;
711 /* read Acquisation Processor status register and check it is not in RUN mode */
712 if ((ret
= bcm3510_readB(st
,0xa2,&v
)) < 0)
714 if (v
.APSTAT1_a2
.RUN
) {
715 deb_info("AP is already running - firmware already loaded.\n");
719 deb_info("reset?\n");
720 if ((ret
= bcm3510_reset(st
)) < 0)
723 deb_info("tristate?\n");
726 if ((ret
= bcm3510_writeB(st
,0x2e,v
)) < 0)
729 deb_info("firmware?\n");
730 if ((ret
= bcm3510_download_firmware(&st
->frontend
)) < 0 ||
731 (ret
= bcm3510_clear_reset(st
)) < 0)
734 /* anything left here to Let the acquisition processor begin execution at program counter 0000 ??? */
739 static int bcm3510_init(struct dvb_frontend
* fe
)
741 struct bcm3510_state
* st
= fe
->demodulator_priv
;
742 bcm3510_register_value j
;
743 struct bcm3510_hab_cmd_set_agc c
;
746 if ((ret
= bcm3510_readB(st
,0xca,&j
)) < 0)
749 deb_info("JDEC: %02x\n",j
.raw
);
751 switch (j
.JDEC_ca
.JDEC
) {
752 case JDEC_WAIT_AT_RAM
:
753 deb_info("attempting to download firmware\n");
754 if ((ret
= bcm3510_init_cold(st
)) < 0)
756 case JDEC_EEPROM_LOAD_WAIT
: /* fall-through is wanted */
757 deb_info("firmware is loaded\n");
758 bcm3510_check_firmware_version(st
);
766 bcm3510_do_hab_cmd(st
,CMD_AUTO_PARAM
,MSGID_SET_RF_AGC_SEL
,(u8
*)&c
,sizeof(c
),NULL
,0);
772 static struct dvb_frontend_ops bcm3510_ops
;
774 struct dvb_frontend
* bcm3510_attach(const struct bcm3510_config
*config
,
775 struct i2c_adapter
*i2c
)
777 struct bcm3510_state
* state
= NULL
;
779 bcm3510_register_value v
;
781 /* allocate memory for the internal state */
782 state
= kmalloc(sizeof(struct bcm3510_state
), GFP_KERNEL
);
785 memset(state
,0,sizeof(struct bcm3510_state
));
787 /* setup the state */
789 state
->config
= config
;
791 memcpy(&state
->ops
, &bcm3510_ops
, sizeof(struct dvb_frontend_ops
));
793 /* create dvb_frontend */
794 state
->frontend
.ops
= &state
->ops
;
795 state
->frontend
.demodulator_priv
= state
;
797 sema_init(&state
->hab_sem
, 1);
799 if ((ret
= bcm3510_readB(state
,0xe0,&v
)) < 0)
802 deb_info("Revision: 0x%1x, Layer: 0x%1x.\n",v
.REVID_e0
.REV
,v
.REVID_e0
.LAYER
);
804 if ((v
.REVID_e0
.REV
!= 0x1 && v
.REVID_e0
.LAYER
!= 0xb) && /* cold */
805 (v
.REVID_e0
.REV
!= 0x8 && v
.REVID_e0
.LAYER
!= 0x0)) /* warm */
808 info("Revision: 0x%1x, Layer: 0x%1x.",v
.REVID_e0
.REV
,v
.REVID_e0
.LAYER
);
810 bcm3510_reset(state
);
812 return &state
->frontend
;
818 EXPORT_SYMBOL(bcm3510_attach
);
820 static struct dvb_frontend_ops bcm3510_ops
= {
823 .name
= "Broadcom BCM3510 VSB/QAM frontend",
825 .frequency_min
= 54000000,
826 .frequency_max
= 803000000,
827 /* stepsize is just a guess */
828 .frequency_stepsize
= 0,
830 FE_CAN_FEC_1_2
| FE_CAN_FEC_2_3
| FE_CAN_FEC_3_4
|
831 FE_CAN_FEC_5_6
| FE_CAN_FEC_7_8
| FE_CAN_FEC_AUTO
|
832 FE_CAN_8VSB
| FE_CAN_16VSB
|
833 FE_CAN_QAM_16
| FE_CAN_QAM_64
| FE_CAN_QAM_128
| FE_CAN_QAM_256
836 .release
= bcm3510_release
,
838 .init
= bcm3510_init
,
839 .sleep
= bcm3510_sleep
,
841 .set_frontend
= bcm3510_set_frontend
,
842 .get_tune_settings
= bcm3510_get_tune_settings
,
844 .read_status
= bcm3510_read_status
,
845 .read_ber
= bcm3510_read_ber
,
846 .read_signal_strength
= bcm3510_read_signal_strength
,
847 .read_snr
= bcm3510_read_snr
,
848 .read_ucblocks
= bcm3510_read_unc
,
851 MODULE_DESCRIPTION("Broadcom BCM3510 ATSC (8VSB/16VSB & ITU J83 AnnexB FEC QAM64/256) demodulator driver");
852 MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@desy.de>");
853 MODULE_LICENSE("GPL");