2 # This file is subject to the terms and conditions of the GNU General Public
3 # License. See the file "COPYING" in the main directory of this archive
6 # Copyright (C) 1994, 95, 96, 2003 by Ralf Baechle
7 # DECStation modifications by Paul M. Antoine, 1996
8 # Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki
10 # This file is included by the global makefile so that you can add your own
11 # architecture-specific flags and dependencies. Remember to do have actions
12 # for "archclean" cleaning up for this architecture.
15 as-option
= $(shell if
$(CC
) $(CFLAGS
) $(1) -Wa
,-Z
-c
-o
/dev
/null \
16 -xassembler
/dev
/null
> /dev
/null
2>&1; then echo
"$(1)"; \
17 else echo
"$(2)"; fi
;)
22 # Select the object file format to substitute into the linker script.
24 ifdef CONFIG_CPU_LITTLE_ENDIAN
25 32bit-tool-prefix
= mipsel-linux-
26 64bit-tool-prefix
= mips64el-linux-
27 32bit-bfd
= elf32-tradlittlemips
28 64bit-bfd
= elf64-tradlittlemips
29 32bit-emul
= elf32ltsmip
30 64bit-emul
= elf64ltsmip
32 32bit-tool-prefix
= mips-linux-
33 64bit-tool-prefix
= mips64-linux-
34 32bit-bfd
= elf32-tradbigmips
35 64bit-bfd
= elf64-tradbigmips
36 32bit-emul
= elf32btsmip
37 64bit-emul
= elf64btsmip
42 tool-prefix
= $(32bit-tool-prefix
)
47 tool-prefix
= $(64bit-tool-prefix
)
51 ifdef CONFIG_CROSSCOMPILE
52 CROSS_COMPILE
:= $(tool-prefix
)
55 CHECKFLAGS-y
+= -D__linux__
-D__mips__ \
59 CHECKFLAGS-
$(CONFIG_32BIT
) += -D_MIPS_SIM
=_ABIO32 \
61 -D__PTRDIFF_TYPE__
=int
62 CHECKFLAGS-
$(CONFIG_64BIT
) += -m64
-D_MIPS_SIM
=_ABI64 \
64 -D__PTRDIFF_TYPE__
="long int"
65 CHECKFLAGS-
$(CONFIG_CPU_BIG_ENDIAN
) += -D__MIPSEB__
66 CHECKFLAGS-
$(CONFIG_CPU_LITTLE_ENDIAN
) += -D__MIPSEL__
68 CHECKFLAGS
= $(CHECKFLAGS-y
)
70 ifdef CONFIG_BUILD_ELF64
72 ld-emul
= $(64bit-emul
)
73 vmlinux-32
= vmlinux
.32
77 ld-emul
= $(32bit-emul
)
79 vmlinux-64
= vmlinux
.64
81 cflags-
$(CONFIG_64BIT
) += $(call cc-option
,-mno-explicit-relocs
)
85 # GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel
86 # code since it only slows down the whole thing. At some point we might make
87 # use of global pointer optimizations but their use of $28 conflicts with
88 # the current pointer optimization.
90 # The DECStation requires an ECOFF kernel for remote booting, other MIPS
91 # machines may also. Since BFD is incredibly buggy with respect to
92 # crossformat linking we rely on the elf2ecoff tool for format conversion.
94 cflags-y
+= -I
$(TOPDIR
)/include/asm
/gcc
95 cflags-y
+= -G
0 -mno-abicalls
-fno-pic
-pipe
96 cflags-y
+= $(call cc-option
, -finline-limit
=100000)
97 LDFLAGS_vmlinux
+= -G
0 -static
-n
-nostdlib
98 MODFLAGS
+= -mlong-calls
101 # We explicitly add the endianness specifier if needed, this allows
102 # to compile kernels with a toolchain for the other endianness. We
103 # carefully avoid to add it redundantly because gcc 3.3/3.4 complains
104 # when fed the toolchain default!
106 cflags-
$(CONFIG_CPU_BIG_ENDIAN
) += $(shell $(CC
) -dumpmachine |grep
-q
'mips.*el-.*' && echo
-EB
)
107 cflags-
$(CONFIG_CPU_LITTLE_ENDIAN
) += $(shell $(CC
) -dumpmachine |grep
-q
'mips.*el-.*' || echo
-EL
)
109 cflags-
$(CONFIG_SB1XXX_CORELIS
) += -mno-sched-prolog
-fno-omit-frame-pointer
112 # Use: $(call set_gccflags,<cpu0>,<isa0>,<cpu1>,<isa1>,<isa2>)
114 # <cpu0>,<isa0> -- preferred CPU and ISA designations (may require
116 # <cpu1>,<isa1> -- fallback CPU and ISA designations (have to work
117 # with up to the oldest supported tools)
118 # <isa2> -- an ISA designation used as an ABI selector for
119 # gcc versions that do not support "-mabi=32"
120 # (depending on the CPU type, either "mips1" or
123 set_gccflags
= $(shell \
125 cpu
=$(1); isa
=-$(2); \
126 for gcc_opt in
-march
= -mcpu
=; do \
127 $(CC
) $$gcc_opt$$cpu $$isa -S
-o
/dev
/null \
128 -xc
/dev
/null
> /dev
/null
2>&1 && \
131 cpu
=$(3); isa
=-$(4); \
132 for gcc_opt in
-march
= -mcpu
=; do \
133 $(CC
) $$gcc_opt$$cpu $$isa -S
-o
/dev
/null \
134 -xc
/dev
/null
> /dev
/null
2>&1 && \
139 gcc_abi
=-mabi
=$(gcc-abi
); gcc_cpu
=$$cpu; \
140 if
$(CC
) $$gcc_abi -S
-o
/dev
/null
-xc
/dev
/null
> /dev
/null
2>&1; then \
143 gcc_abi
=; gcc_isa
=-$(5); \
145 gas_abi
=-Wa
,-$(gcc-abi
); gas_cpu
=$$cpu; gas_isa
=-Wa
,$$isa; \
147 for gas_opt in
-Wa
,-march
= -Wa
,-mcpu
=; do \
148 $(CC
) $$gas_abi $$gas_opt$$cpu $$gas_isa -Wa
,-Z
-c \
149 -o
/dev
/null
-xassembler
/dev
/null
> /dev
/null
2>&1 && \
152 gas_abi
=; gas_opt
=; gas_cpu
=; gas_isa
=; \
155 if
test "$(gcc-abi)" != "$(gas-abi)"; then \
156 gas_abi
="-Wa,-$(gas-abi) -Wa,-mgp$(gcc-abi)"; \
158 if
test "$$gcc_opt" = -march
= && test -n
"$$gcc_abi"; then \
159 $(CC
) $$gcc_abi $$gcc_opt$$gcc_cpu -S
-o
/dev
/null \
160 -xc
/dev
/null
> /dev
/null
2>&1 && \
163 echo
$$gcc_abi $$gcc_opt$$gcc_cpu $$gcc_isa $$gas_abi $$gas_opt$$gas_cpu $$gas_isa)
166 # CPU-dependent compiler/assembler options for optimization.
168 cflags-
$(CONFIG_CPU_R3000
) += \
169 $(call set_gccflags
,r3000
,mips1
,r3000
,mips1
,mips1
)
171 cflags-
$(CONFIG_CPU_TX39XX
) += \
172 $(call set_gccflags
,r3900
,mips1
,r3000
,mips1
,mips1
)
174 cflags-
$(CONFIG_CPU_R6000
) += \
175 $(call set_gccflags
,r6000
,mips2
,r6000
,mips2
,mips2
) \
178 cflags-
$(CONFIG_CPU_R4300
) += \
179 $(call set_gccflags
,r4300
,mips3
,r4300
,mips3
,mips2
) \
182 cflags-
$(CONFIG_CPU_VR41XX
) += \
183 $(call set_gccflags
,r4100
,mips3
,r4600
,mips3
,mips2
) \
186 cflags-
$(CONFIG_CPU_R4X00
) += \
187 $(call set_gccflags
,r4600
,mips3
,r4600
,mips3
,mips2
) \
190 cflags-
$(CONFIG_CPU_TX49XX
) += \
191 $(call set_gccflags
,r4600
,mips3
,r4600
,mips3
,mips2
) \
194 cflags-
$(CONFIG_CPU_MIPS32_R1
) += \
195 $(call set_gccflags
,mips32
,mips32
,r4600
,mips3
,mips2
) \
198 cflags-
$(CONFIG_CPU_MIPS32_R2
) += \
199 $(call set_gccflags
,mips32r2
,mips32r2
,r4600
,mips3
,mips2
) \
202 cflags-
$(CONFIG_CPU_MIPS64_R1
) += \
203 $(call set_gccflags
,mips64
,mips64
,r4600
,mips3
,mips2
) \
206 cflags-
$(CONFIG_CPU_MIPS64_R2
) += \
207 $(call set_gccflags
,mips64r2
,mips64r2
,r4600
,mips3
,mips2
) \
210 cflags-
$(CONFIG_CPU_R5000
) += \
211 $(call set_gccflags
,r5000
,mips4
,r5000
,mips4
,mips2
) \
214 cflags-
$(CONFIG_CPU_R5432
) += \
215 $(call set_gccflags
,r5400
,mips4
,r5000
,mips4
,mips2
) \
218 cflags-
$(CONFIG_CPU_NEVADA
) += \
219 $(call set_gccflags
,rm5200
,mips4
,r5000
,mips4
,mips2
) \
221 # $(call cc-option,-mmad)
223 cflags-
$(CONFIG_CPU_RM7000
) += \
224 $(call set_gccflags
,rm7000
,mips4
,r5000
,mips4
,mips2
) \
227 cflags-
$(CONFIG_CPU_RM9000
) += \
228 $(call set_gccflags
,rm9000
,mips4
,r5000
,mips4
,mips2
) \
232 cflags-
$(CONFIG_CPU_SB1
) += \
233 $(call set_gccflags
,sb1
,mips64
,r5000
,mips4
,mips2
) \
236 cflags-
$(CONFIG_CPU_R8000
) += \
237 $(call set_gccflags
,r8000
,mips4
,r8000
,mips4
,mips2
) \
240 cflags-
$(CONFIG_CPU_R10000
) += \
241 $(call set_gccflags
,r10000
,mips4
,r8000
,mips4
,mips2
) \
245 ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
246 MODFLAGS
+= -msb1-pass1-workarounds
253 libs-
$(CONFIG_ARC
) += arch
/mips
/arc
/
254 libs-
$(CONFIG_SIBYTE_CFE
) += arch
/mips
/sibyte
/cfe
/
257 # Board-dependent options and extra files
261 # Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
263 core-
$(CONFIG_MACH_JAZZ
) += arch
/mips
/jazz
/
264 cflags-
$(CONFIG_MACH_JAZZ
) += -Iinclude
/asm-mips
/mach-jazz
265 load-
$(CONFIG_MACH_JAZZ
) += 0xffffffff80080000
268 # Common Alchemy Au1x00 stuff
270 core-
$(CONFIG_SOC_AU1X00
) += arch
/mips
/au1000
/common
/
271 cflags-
$(CONFIG_SOC_AU1X00
) += -Iinclude
/asm-mips
/mach-au1x00
274 # AMD Alchemy Pb1000 eval board
276 libs-
$(CONFIG_MIPS_PB1000
) += arch
/mips
/au1000
/pb1000
/
277 cflags-
$(CONFIG_MIPS_PB1000
) += -Iinclude
/asm-mips
/mach-pb1x00
278 load-
$(CONFIG_MIPS_PB1000
) += 0xffffffff80100000
281 # AMD Alchemy Pb1100 eval board
283 libs-
$(CONFIG_MIPS_PB1100
) += arch
/mips
/au1000
/pb1100
/
284 cflags-
$(CONFIG_MIPS_PB1100
) += -Iinclude
/asm-mips
/mach-pb1x00
285 load-
$(CONFIG_MIPS_PB1100
) += 0xffffffff80100000
288 # AMD Alchemy Pb1500 eval board
290 libs-
$(CONFIG_MIPS_PB1500
) += arch
/mips
/au1000
/pb1500
/
291 cflags-
$(CONFIG_MIPS_PB1500
) += -Iinclude
/asm-mips
/mach-pb1x00
292 load-
$(CONFIG_MIPS_PB1500
) += 0xffffffff80100000
295 # AMD Alchemy Pb1550 eval board
297 libs-
$(CONFIG_MIPS_PB1550
) += arch
/mips
/au1000
/pb1550
/
298 cflags-
$(CONFIG_MIPS_PB1550
) += -Iinclude
/asm-mips
/mach-pb1x00
299 load-
$(CONFIG_MIPS_PB1550
) += 0xffffffff80100000
302 # AMD Alchemy Pb1200 eval board
304 libs-
$(CONFIG_MIPS_PB1200
) += arch
/mips
/au1000
/pb1200
/
305 cflags-
$(CONFIG_MIPS_PB1200
) += -Iinclude
/asm-mips
/mach-pb1x00
306 load-
$(CONFIG_MIPS_PB1200
) += 0xffffffff80100000
309 # AMD Alchemy Db1000 eval board
311 libs-
$(CONFIG_MIPS_DB1000
) += arch
/mips
/au1000
/db1x00
/
312 cflags-
$(CONFIG_MIPS_DB1000
) += -Iinclude
/asm-mips
/mach-db1x00
313 load-
$(CONFIG_MIPS_DB1000
) += 0xffffffff80100000
316 # AMD Alchemy Db1100 eval board
318 libs-
$(CONFIG_MIPS_DB1100
) += arch
/mips
/au1000
/db1x00
/
319 cflags-
$(CONFIG_MIPS_DB1100
) += -Iinclude
/asm-mips
/mach-db1x00
320 load-
$(CONFIG_MIPS_DB1100
) += 0xffffffff80100000
323 # AMD Alchemy Db1500 eval board
325 libs-
$(CONFIG_MIPS_DB1500
) += arch
/mips
/au1000
/db1x00
/
326 cflags-
$(CONFIG_MIPS_DB1500
) += -Iinclude
/asm-mips
/mach-db1x00
327 load-
$(CONFIG_MIPS_DB1500
) += 0xffffffff80100000
330 # AMD Alchemy Db1550 eval board
332 libs-
$(CONFIG_MIPS_DB1550
) += arch
/mips
/au1000
/db1x00
/
333 cflags-
$(CONFIG_MIPS_DB1550
) += -Iinclude
/asm-mips
/mach-db1x00
334 load-
$(CONFIG_MIPS_DB1550
) += 0xffffffff80100000
337 # AMD Alchemy Db1200 eval board
339 libs-
$(CONFIG_MIPS_DB1200
) += arch
/mips
/au1000
/pb1200
/
340 cflags-
$(CONFIG_MIPS_DB1200
) += -Iinclude
/asm-mips
/mach-db1x00
341 load-
$(CONFIG_MIPS_DB1200
) += 0xffffffff80100000
344 # AMD Alchemy Bosporus eval board
346 libs-
$(CONFIG_MIPS_BOSPORUS
) += arch
/mips
/au1000
/db1x00
/
347 cflags-
$(CONFIG_MIPS_BOSPORUS
) += -Iinclude
/asm-mips
/mach-db1x00
348 load-
$(CONFIG_MIPS_BOSPORUS
) += 0xffffffff80100000
351 # AMD Alchemy Mirage eval board
353 libs-
$(CONFIG_MIPS_MIRAGE
) += arch
/mips
/au1000
/db1x00
/
354 cflags-
$(CONFIG_MIPS_MIRAGE
) += -Iinclude
/asm-mips
/mach-db1x00
355 load-
$(CONFIG_MIPS_MIRAGE
) += 0xffffffff80100000
358 # 4G-Systems eval board
360 libs-
$(CONFIG_MIPS_MTX1
) += arch
/mips
/au1000
/mtx-1
/
361 load-
$(CONFIG_MIPS_MTX1
) += 0xffffffff80100000
366 libs-
$(CONFIG_MIPS_XXS1500
) += arch
/mips
/au1000
/xxs1500
/
367 load-
$(CONFIG_MIPS_XXS1500
) += 0xffffffff80100000
372 core-
$(CONFIG_MIPS_COBALT
) += arch
/mips
/cobalt
/
373 cflags-
$(CONFIG_MIPS_COBALT
) += -Iinclude
/asm-mips
/cobalt
374 load-
$(CONFIG_MIPS_COBALT
) += 0xffffffff80080000
379 core-
$(CONFIG_MACH_DECSTATION
) += arch
/mips
/dec
/
380 cflags-
$(CONFIG_MACH_DECSTATION
)+= -Iinclude
/asm-mips
/mach-dec
381 libs-
$(CONFIG_MACH_DECSTATION
) += arch
/mips
/dec
/prom
/
382 load-
$(CONFIG_MACH_DECSTATION
) += 0xffffffff80040000
383 CLEAN_FILES
+= drivers
/tc
/lk201-map.c
386 # Galileo EV64120 Board
388 core-
$(CONFIG_MIPS_EV64120
) += arch
/mips
/gt64120
/ev64120
/
389 core-
$(CONFIG_MIPS_EV64120
) += arch
/mips
/gt64120
/common
/
390 cflags-
$(CONFIG_MIPS_EV64120
) += -Iinclude
/asm-mips
/mach-ev64120
391 load-
$(CONFIG_MIPS_EV64120
) += 0xffffffff80100000
394 # Galileo EV96100 Board
396 core-
$(CONFIG_MIPS_EV96100
) += arch
/mips
/galileo-boards
/ev96100
/
397 cflags-
$(CONFIG_MIPS_EV96100
) += -Iinclude
/asm-mips
/mach-ev96100
398 load-
$(CONFIG_MIPS_EV96100
) += 0xffffffff80100000
401 # Globespan IVR eval board with QED 5231 CPU
403 core-
$(CONFIG_ITE_BOARD_GEN
) += arch
/mips
/ite-boards
/generic
/
404 core-
$(CONFIG_MIPS_IVR
) += arch
/mips
/ite-boards
/ivr
/
405 load-
$(CONFIG_MIPS_IVR
) += 0xffffffff80100000
408 # ITE 8172 eval board with QED 5231 CPU
410 core-
$(CONFIG_MIPS_ITE8172
) += arch
/mips
/ite-boards
/qed-4n-s01b
/
411 load-
$(CONFIG_MIPS_ITE8172
) += 0xffffffff80100000
414 # For all MIPS, Inc. eval boards
416 core-
$(CONFIG_MIPS_BOARDS_GEN
) += arch
/mips
/mips-boards
/generic
/
421 core-
$(CONFIG_MIPS_ATLAS
) += arch
/mips
/mips-boards
/atlas
/
422 cflags-
$(CONFIG_MIPS_ATLAS
) += -Iinclude
/asm-mips
/mach-atlas
423 cflags-
$(CONFIG_MIPS_ATLAS
) += -Iinclude
/asm-mips
/mach-mips
424 load-
$(CONFIG_MIPS_ATLAS
) += 0xffffffff80100000
429 core-
$(CONFIG_MIPS_MALTA
) += arch
/mips
/mips-boards
/malta
/
430 cflags-
$(CONFIG_MIPS_MALTA
) += -Iinclude
/asm-mips
/mach-mips
431 load-
$(CONFIG_MIPS_MALTA
) += 0xffffffff80100000
436 core-
$(CONFIG_MIPS_SEAD
) += arch
/mips
/mips-boards
/sead
/
437 load-
$(CONFIG_MIPS_SEAD
) += 0xffffffff80100000
442 core-
$(CONFIG_MIPS_SIM
) += arch
/mips
/mips-boards
/sim
/
443 cflags-
$(CONFIG_MIPS_SIM
) += -Iinclude
/asm-mips
/mach-sim
444 load-
$(CONFIG_MIPS_SIM
) += 0x80100000
447 # Momentum Ocelot board
449 # The Ocelot setup.o must be linked early - it does the ioremap() for the
452 core-
$(CONFIG_MOMENCO_OCELOT
) += arch
/mips
/gt64120
/common
/ \
453 arch
/mips
/gt64120
/momenco_ocelot
/
454 cflags-
$(CONFIG_MOMENCO_OCELOT
) += -Iinclude
/asm-mips
/mach-ocelot
455 load-
$(CONFIG_MOMENCO_OCELOT
) += 0xffffffff80100000
458 # Momentum Ocelot-G board
460 # The Ocelot-G setup.o must be linked early - it does the ioremap() for the
463 core-
$(CONFIG_MOMENCO_OCELOT_G
) += arch
/mips
/momentum
/ocelot_g
/
464 load-
$(CONFIG_MOMENCO_OCELOT_G
) += 0xffffffff80100000
467 # Momentum Ocelot-C and -CS boards
469 # The Ocelot-C[S] setup.o must be linked early - it does the ioremap() for the
471 core-
$(CONFIG_MOMENCO_OCELOT_C
) += arch
/mips
/momentum
/ocelot_c
/
472 load-
$(CONFIG_MOMENCO_OCELOT_C
) += 0xffffffff80100000
475 # PMC-Sierra Yosemite
477 core-
$(CONFIG_PMC_YOSEMITE
) += arch
/mips
/pmc-sierra
/yosemite
/
478 cflags-
$(CONFIG_PMC_YOSEMITE
) += -Iinclude
/asm-mips
/mach-yosemite
479 load-
$(CONFIG_PMC_YOSEMITE
) += 0xffffffff80100000
481 # Qemu simulating MIPS32 4Kc
483 core-
$(CONFIG_QEMU
) += arch
/mips
/qemu
/
484 cflags-
$(CONFIG_QEMU
) += -Iinclude
/asm-mips
/mach-qemu
485 load-
$(CONFIG_QEMU
) += 0xffffffff80010000
490 core-
$(CONFIG_MOMENCO_OCELOT_3
) += arch
/mips
/momentum
/ocelot_3
/
491 cflags-
$(CONFIG_MOMENCO_OCELOT_3
) += -Iinclude
/asm-mips
/mach-ocelot3
492 load-
$(CONFIG_MOMENCO_OCELOT_3
) += 0xffffffff80100000
495 # Momentum Jaguar ATX
497 core-
$(CONFIG_MOMENCO_JAGUAR_ATX
) += arch
/mips
/momentum
/jaguar_atx
/
498 cflags-
$(CONFIG_MOMENCO_JAGUAR_ATX
) += -Iinclude
/asm-mips
/mach-ja
499 #ifdef CONFIG_JAGUAR_DMALOW
500 #load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff88000000
502 load-
$(CONFIG_MOMENCO_JAGUAR_ATX
) += 0xffffffff80100000
508 core-
$(CONFIG_DDB5XXX_COMMON
) += arch
/mips
/ddb5xxx
/common
/
513 core-
$(CONFIG_DDB5074
) += arch
/mips
/ddb5xxx
/ddb5074
/
514 load-
$(CONFIG_DDB5074
) += 0xffffffff80080000
519 core-
$(CONFIG_DDB5476
) += arch
/mips
/ddb5xxx
/ddb5476
/
520 load-
$(CONFIG_DDB5476
) += 0xffffffff80080000
525 core-
$(CONFIG_DDB5477
) += arch
/mips
/ddb5xxx
/ddb5477
/
526 load-
$(CONFIG_DDB5477
) += 0xffffffff80100000
528 core-
$(CONFIG_LASAT
) += arch
/mips
/lasat
/
529 cflags-
$(CONFIG_LASAT
) += -Iinclude
/asm-mips
/mach-lasat
530 load-
$(CONFIG_LASAT
) += 0xffffffff80000000
535 core-
$(CONFIG_MACH_VR41XX
) += arch
/mips
/vr41xx
/common
/
536 cflags-
$(CONFIG_MACH_VR41XX
) += -Iinclude
/asm-mips
/mach-vr41xx
541 core-
$(CONFIG_NEC_CMBVR4133
) += arch
/mips
/vr41xx
/nec-cmbvr4133
/
542 load-
$(CONFIG_NEC_CMBVR4133
) += 0xffffffff80100000
545 # ZAO Networks Capcella (VR4131)
547 load-
$(CONFIG_ZAO_CAPCELLA
) += 0xffffffff80000000
550 # Victor MP-C303/304 (VR4122)
552 load-
$(CONFIG_VICTOR_MPC30X
) += 0xffffffff80001000
555 # IBM WorkPad z50 (VR4121)
557 core-
$(CONFIG_IBM_WORKPAD
) += arch
/mips
/vr41xx
/ibm-workpad
/
558 load-
$(CONFIG_IBM_WORKPAD
) += 0xffffffff80004000
561 # CASIO CASSIPEIA E-55/65 (VR4111)
563 core-
$(CONFIG_CASIO_E55
) += arch
/mips
/vr41xx
/casio-e55
/
564 load-
$(CONFIG_CASIO_E55
) += 0xffffffff80004000
567 # TANBAC VR4131 multichip module(TB0225) and TANBAC VR4131DIMM(TB0229) (VR4131)
569 load-
$(CONFIG_TANBAC_TB022X
) += 0xffffffff80000000
572 # Common Philips PNX8550
574 core-
$(CONFIG_SOC_PNX8550
) += arch
/mips
/philips
/pnx8550
/common
/
575 cflags-
$(CONFIG_SOC_PNX8550
) += -Iinclude
/asm-mips
/mach-pnx8550
578 # Philips PNX8550 JBS board
580 libs-
$(CONFIG_PNX8550_JBS
) += arch
/mips
/philips
/pnx8550
/jbs
/
581 #cflags-$(CONFIG_PNX8550_JBS) += -Iinclude/asm-mips/mach-pnx8550
582 load-
$(CONFIG_PNX8550_JBS
) += 0xffffffff80060000
585 # SGI IP22 (Indy/Indigo2)
587 # Set the load address to >= 0xffffffff88069000 if you want to leave space for
588 # symmon, 0xffffffff80002000 for production kernels. Note that the value must
589 # be aligned to a multiple of the kernel stack size or the handling of the
590 # current variable will break so for 64-bit kernels we have to raise the start
593 core-
$(CONFIG_SGI_IP22
) += arch
/mips
/sgi-ip22
/
594 cflags-
$(CONFIG_SGI_IP22
) += -Iinclude
/asm-mips
/mach-ip22
596 load-
$(CONFIG_SGI_IP22
) += 0xffffffff88002000
599 load-
$(CONFIG_SGI_IP22
) += 0xffffffff88004000
603 # SGI-IP27 (Origin200/2000)
605 # Set the load address to >= 0xc000000000300000 if you want to leave space for
606 # symmon, 0xc00000000001c000 for production kernels. Note that the value must
607 # be 16kb aligned or the handling of the current variable will break.
609 ifdef CONFIG_SGI_IP27
610 core-
$(CONFIG_SGI_IP27
) += arch
/mips
/sgi-ip27
/
611 cflags-
$(CONFIG_SGI_IP27
) += -Iinclude
/asm-mips
/mach-ip27
612 ifdef CONFIG_BUILD_ELF64
613 ifdef CONFIG_MAPPED_KERNEL
614 load-
$(CONFIG_SGI_IP27
) += 0xc00000004001c000
615 OBJCOPYFLAGS
:= --change-addresses
=0x3fffffff80000000
616 dataoffset-
$(CONFIG_SGI_IP27
) += 0x01000000
618 load-
$(CONFIG_SGI_IP27
) += 0xa80000000001c000
619 OBJCOPYFLAGS
:= --change-addresses
=0x57ffffff80000000
622 ifdef CONFIG_MAPPED_KERNEL
623 load-
$(CONFIG_SGI_IP27
) += 0xffffffffc001c000
624 OBJCOPYFLAGS
:= --change-addresses
=0xc000000080000000
625 dataoffset-
$(CONFIG_SGI_IP27
) += 0x01000000
627 load-
$(CONFIG_SGI_IP27
) += 0xffffffff8001c000
628 OBJCOPYFLAGS
:= --change-addresses
=0xa800000080000000
636 # Set the load address to >= 80069000 if you want to leave space for symmon,
637 # 0xffffffff80004000 for production kernels. Note that the value must be aligned to
638 # a multiple of the kernel stack size or the handling of the current variable
641 core-
$(CONFIG_SGI_IP32
) += arch
/mips
/sgi-ip32
/
642 cflags-
$(CONFIG_SGI_IP32
) += -Iinclude
/asm-mips
/mach-ip32
643 load-
$(CONFIG_SGI_IP32
) += 0xffffffff80004000
648 # This is a LIB so that it links at the end, and initcalls are later
649 # the sequence; but it is built as an object so that modules don't get
650 # removed (as happens, even if they have __initcall/module_init)
652 core-
$(CONFIG_SIBYTE_BCM112X
) += arch
/mips
/sibyte
/sb1250
/
653 cflags-
$(CONFIG_SIBYTE_BCM112X
) += -Iinclude
/asm-mips
/mach-sibyte \
654 -DSIBYTE_HDR_FEATURES
=SIBYTE_HDR_FMASK_1250_112x_ALL
656 core-
$(CONFIG_SIBYTE_SB1250
) += arch
/mips
/sibyte
/sb1250
/
657 cflags-
$(CONFIG_SIBYTE_SB1250
) += -Iinclude
/asm-mips
/mach-sibyte \
658 -DSIBYTE_HDR_FEATURES
=SIBYTE_HDR_FMASK_1250_112x_ALL
660 core-
$(CONFIG_SIBYTE_BCM1x55
) += arch
/mips
/sibyte
/bcm1480
/
661 cflags-
$(CONFIG_SIBYTE_BCM1x55
) += -Iinclude
/asm-mips
/mach-sibyte \
662 -DSIBYTE_HDR_FEATURES
=SIBYTE_HDR_FMASK_1480_ALL
664 core-
$(CONFIG_SIBYTE_BCM1x80
) += arch
/mips
/sibyte
/bcm1480
/
665 cflags-
$(CONFIG_SIBYTE_BCM1x80
) += -Iinclude
/asm-mips
/mach-sibyte \
666 -DSIBYTE_HDR_FEATURES
=SIBYTE_HDR_FMASK_1480_ALL
669 # Sibyte BCM91120x (Carmel) board
670 # Sibyte BCM91120C (CRhine) board
671 # Sibyte BCM91125C (CRhone) board
672 # Sibyte BCM91125E (Rhone) board
674 # Sibyte BCM91x80 (BigSur) board
676 libs-
$(CONFIG_SIBYTE_CARMEL
) += arch
/mips
/sibyte
/swarm
/
677 load-
$(CONFIG_SIBYTE_CARMEL
) := 0xffffffff80100000
678 libs-
$(CONFIG_SIBYTE_CRHINE
) += arch
/mips
/sibyte
/swarm
/
679 load-
$(CONFIG_SIBYTE_CRHINE
) := 0xffffffff80100000
680 libs-
$(CONFIG_SIBYTE_CRHONE
) += arch
/mips
/sibyte
/swarm
/
681 load-
$(CONFIG_SIBYTE_CRHONE
) := 0xffffffff80100000
682 libs-
$(CONFIG_SIBYTE_RHONE
) += arch
/mips
/sibyte
/swarm
/
683 load-
$(CONFIG_SIBYTE_RHONE
) := 0xffffffff80100000
684 libs-
$(CONFIG_SIBYTE_SENTOSA
) += arch
/mips
/sibyte
/swarm
/
685 load-
$(CONFIG_SIBYTE_SENTOSA
) := 0xffffffff80100000
686 libs-
$(CONFIG_SIBYTE_SWARM
) += arch
/mips
/sibyte
/swarm
/
687 load-
$(CONFIG_SIBYTE_SWARM
) := 0xffffffff80100000
688 libs-
$(CONFIG_SIBYTE_BIGSUR
) += arch
/mips
/sibyte
/swarm
/
689 load-
$(CONFIG_SIBYTE_BIGSUR
) := 0xffffffff80100000
694 core-
$(CONFIG_SNI_RM200_PCI
) += arch
/mips
/sni
/
695 cflags-
$(CONFIG_SNI_RM200_PCI
) += -Iinclude
/asm-mips
/mach-rm200
696 load-
$(CONFIG_SNI_RM200_PCI
) += 0xffffffff80600000
699 # Toshiba JMR-TX3927 board
701 core-
$(CONFIG_TOSHIBA_JMR3927
) += arch
/mips
/jmr3927
/rbhma3100
/ \
702 arch
/mips
/jmr3927
/common
/
703 cflags-
$(CONFIG_TOSHIBA_JMR3927
) += -Iinclude
/asm-mips
/mach-jmr3927
704 load-
$(CONFIG_TOSHIBA_JMR3927
) += 0xffffffff80050000
707 # Toshiba RBTX4927 board or
708 # Toshiba RBTX4937 board
710 core-
$(CONFIG_TOSHIBA_RBTX4927
) += arch
/mips
/tx4927
/toshiba_rbtx4927
/
711 core-
$(CONFIG_TOSHIBA_RBTX4927
) += arch
/mips
/tx4927
/common
/
712 load-
$(CONFIG_TOSHIBA_RBTX4927
) += 0xffffffff80020000
715 # Toshiba RBTX4938 board
717 core-
$(CONFIG_TOSHIBA_RBTX4938
) += arch
/mips
/tx4938
/toshiba_rbtx4938
/
718 core-
$(CONFIG_TOSHIBA_RBTX4938
) += arch
/mips
/tx4938
/common
/
719 load-
$(CONFIG_TOSHIBA_RBTX4938
) += 0xffffffff80100000
721 cflags-y
+= -Iinclude
/asm-mips
/mach-generic
722 drivers-
$(CONFIG_PCI
) += arch
/mips
/pci
/
725 ifdef CONFIG_CPU_LITTLE_ENDIAN
728 JIFFIES
= jiffies_64
+ 4
734 AFLAGS
+= $(cflags-y
)
735 CFLAGS
+= $(cflags-y
)
737 LDFLAGS
+= -m
$(ld-emul
)
739 OBJCOPYFLAGS
+= --remove-section
=.reginfo
742 # Choosing incompatible machines durings configuration will result in
743 # error messages during linking. Select a default linkscript if
744 # none has been choosen above.
747 CPPFLAGS_vmlinux.lds
:= \
749 -D
"LOADADDR=$(load-y)" \
750 -D
"JIFFIES=$(JIFFIES)" \
751 -D
"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)"
753 head-y
:= arch
/mips
/kernel
/head.o arch
/mips
/kernel
/init_task.o
755 libs-y
+= arch
/mips
/lib
/
756 libs-
$(CONFIG_32BIT
) += arch
/mips
/lib-32
/
757 libs-
$(CONFIG_64BIT
) += arch
/mips
/lib-64
/
759 core-y
+= arch
/mips
/kernel
/ arch
/mips
/mm
/ arch
/mips
/math-emu
/
761 drivers-
$(CONFIG_OPROFILE
) += arch
/mips
/oprofile
/
764 rom.bin rom.sw
: vmlinux
765 $(Q
)$(MAKE
) $(build
)=arch
/mips
/lasat
/image
$@
769 # Some machines like the Indy need 32-bit ELF binaries for booting purposes.
770 # Other need ECOFF, so we build a 32-bit ELF binary for them which we then
771 # convert to ECOFF using elf2ecoff.
774 $(OBJCOPY
) -O
$(32bit-bfd
) $(OBJCOPYFLAGS
) $< $@
777 # The 64-bit ELF tools are pretty broken so at this time we generate 64-bit
778 # ELF files from 32-bit files by conversion.
781 $(OBJCOPY
) -O
$(64bit-bfd
) $(OBJCOPYFLAGS
) $< $@
783 makeboot
=$(Q
)$(MAKE
) $(build
)=arch
/mips
/boot VMLINUX
=$(vmlinux-32
) $(1)
785 ifdef CONFIG_BOOT_ELF32
789 ifdef CONFIG_BOOT_ELF64
793 ifdef CONFIG_MIPS_ATLAS
797 ifdef CONFIG_MIPS_MALTA
801 ifdef CONFIG_MIPS_SEAD
809 ifdef CONFIG_SNI_RM200_PCI
813 vmlinux.bin
: $(vmlinux-32
)
814 +@
$(call makeboot
,$@
)
816 vmlinux.ecoff vmlinux.rm200
: $(vmlinux-32
)
817 +@
$(call makeboot
,$@
)
819 vmlinux.srec
: $(vmlinux-32
)
820 +@
$(call makeboot
,$@
)
822 CLEAN_FILES
+= vmlinux.ecoff \
828 @
$(MAKE
) $(clean)=arch
/mips
/boot
829 @
$(MAKE
) $(clean)=arch
/mips
/lasat
831 CLEAN_FILES
+= vmlinux
.32 \