arch/powerpc/platforms/52xx/mpc52xx_pm.c

   1 #include <linux/init.h>
   2 #include <linux/suspend.h>
   3 #include <linux/io.h>
   4 #include <asm/time.h>
   5 #include <asm/cacheflush.h>
   6 #include <asm/mpc52xx.h>
   7
   8 #include "mpc52xx_pic.h"
   9
  10
  11 /* these are defined in mpc52xx_sleep.S, and only used here */
  12 extern void mpc52xx_deep_sleep(void __iomem *sram, void __iomem *sdram_regs,
  13                 struct mpc52xx_cdm __iomem *, struct mpc52xx_intr __iomem*);
  14 extern void mpc52xx_ds_sram(void);
  15 extern const long mpc52xx_ds_sram_size;
  16 extern void mpc52xx_ds_cached(void);
  17 extern const long mpc52xx_ds_cached_size;
  18
  19 static void __iomem *mbar;
  20 static void __iomem *sdram;
  21 static struct mpc52xx_cdm __iomem *cdm;
  22 static struct mpc52xx_intr __iomem *intr;
  23 static struct mpc52xx_gpio_wkup __iomem *gpiow;
  24 static void __iomem *sram;
  25 static int sram_size;
  26
  27 struct mpc52xx_suspend mpc52xx_suspend;
  28
  29 static int mpc52xx_pm_valid(suspend_state_t state)
  30 {
  31         switch (state) {
  32         case PM_SUSPEND_STANDBY:
  33                 return 1;
  34         default:
  35                 return 0;
  36         }
  37 }
  38
  39 int mpc52xx_set_wakeup_gpio(u8 pin, u8 level)
  40 {
  41         u16 tmp;
  42
  43         /* enable gpio */
  44         out_8(&gpiow->wkup_gpioe, in_8(&gpiow->wkup_gpioe) | (1 << pin));
  45         /* set as input */
  46         out_8(&gpiow->wkup_ddr, in_8(&gpiow->wkup_ddr) & ~(1 << pin));
  47         /* enable deep sleep interrupt */
  48         out_8(&gpiow->wkup_inten, in_8(&gpiow->wkup_inten) | (1 << pin));
  49         /* low/high level creates wakeup interrupt */
  50         tmp = in_be16(&gpiow->wkup_itype);
  51         tmp &= ~(0x3 << (pin * 2));
  52         tmp |= (!level + 1) << (pin * 2);
  53         out_be16(&gpiow->wkup_itype, tmp);
  54         /* master enable */
  55         out_8(&gpiow->wkup_maste, 1);
  56
  57         return 0;
  58 }
  59
  60 int mpc52xx_pm_prepare(void)
  61 {
  62         /* map the whole register space */
  63         mbar = mpc52xx_find_and_map("mpc5200");
  64         if (!mbar) {
  65                 printk(KERN_ERR "%s:%i Error mapping registers\n", __func__, __LINE__);
  66                 return -ENOSYS;
  67         }
  68         /* these offsets are from mpc5200 users manual */
  69         sdram   = mbar + 0x100;
  70         cdm     = mbar + 0x200;
  71         intr    = mbar + 0x500;
  72         gpiow   = mbar + 0xc00;
  73         sram    = mbar + 0x8000;        /* Those will be handled by the */
  74         sram_size = 0x4000;             /* bestcomm driver soon */
  75
  76         /* call board suspend code, if applicable */
  77         if (mpc52xx_suspend.board_suspend_prepare)
  78                 mpc52xx_suspend.board_suspend_prepare(mbar);
  79         else {
  80                 printk(KERN_ALERT "%s: %i don't know how to wake up the board\n",
  81                                 __func__, __LINE__);
  82                 goto out_unmap;
  83         }
  84
  85         return 0;
  86
  87  out_unmap:
  88         iounmap(mbar);
  89         return -ENOSYS;
  90 }
  91
  92
  93 char saved_sram[0x4000];
  94
  95 int mpc52xx_pm_enter(suspend_state_t state)
  96 {
  97         u32 clk_enables;
  98         u32 msr, hid0;
  99         u32 intr_main_mask;
 100         void __iomem * irq_0x500 = (void __iomem *)CONFIG_KERNEL_START + 0x500;
 101         unsigned long irq_0x500_stop = (unsigned long)irq_0x500 + mpc52xx_ds_cached_size;
 102         char saved_0x500[mpc52xx_ds_cached_size];
 103
 104         /* disable all interrupts in PIC */
 105         intr_main_mask = in_be32(&intr->main_mask);
 106         out_be32(&intr->main_mask, intr_main_mask | 0x1ffff);
 107
 108         /* don't let DEC expire any time soon */
 109         mtspr(SPRN_DEC, 0x7fffffff);
 110
 111         /* save SRAM */
 112         memcpy(saved_sram, sram, sram_size);
 113
 114         /* copy low level suspend code to sram */
 115         memcpy(sram, mpc52xx_ds_sram, mpc52xx_ds_sram_size);
 116
 117         out_8(&cdm->ccs_sleep_enable, 1);
 118         out_8(&cdm->osc_sleep_enable, 1);
 119         out_8(&cdm->ccs_qreq_test, 1);
 120
 121         /* disable all but SDRAM and bestcomm (SRAM) clocks */
 122         clk_enables = in_be32(&cdm->clk_enables);
 123         out_be32(&cdm->clk_enables, clk_enables & 0x00088000);
 124
 125         /* disable power management */
 126         msr = mfmsr();
 127         mtmsr(msr & ~MSR_POW);
 128
 129         /* enable sleep mode, disable others */
 130         hid0 = mfspr(SPRN_HID0);
 131         mtspr(SPRN_HID0, (hid0 & ~(HID0_DOZE | HID0_NAP | HID0_DPM)) | HID0_SLEEP);
 132
 133         /* save original, copy our irq handler, flush from dcache and invalidate icache */
 134         memcpy(saved_0x500, irq_0x500, mpc52xx_ds_cached_size);
 135         memcpy(irq_0x500, mpc52xx_ds_cached, mpc52xx_ds_cached_size);
 136         flush_icache_range((unsigned long)irq_0x500, irq_0x500_stop);
 137
 138         /* call low-level sleep code */
 139         mpc52xx_deep_sleep(sram, sdram, cdm, intr);
 140
 141         /* restore original irq handler */
 142         memcpy(irq_0x500, saved_0x500, mpc52xx_ds_cached_size);
 143         flush_icache_range((unsigned long)irq_0x500, irq_0x500_stop);
 144
 145         /* restore old power mode */
 146         mtmsr(msr & ~MSR_POW);
 147         mtspr(SPRN_HID0, hid0);
 148         mtmsr(msr);
 149
 150         out_be32(&cdm->clk_enables, clk_enables);
 151         out_8(&cdm->ccs_sleep_enable, 0);
 152         out_8(&cdm->osc_sleep_enable, 0);
 153
 154         /* restore SRAM */
 155         memcpy(sram, saved_sram, sram_size);
 156
 157         /* restart jiffies */
 158         wakeup_decrementer();
 159
 160         /* reenable interrupts in PIC */
 161         out_be32(&intr->main_mask, intr_main_mask);
 162
 163         return 0;
 164 }
 165
 166 void mpc52xx_pm_finish(void)
 167 {
 168         /* call board resume code */
 169         if (mpc52xx_suspend.board_resume_finish)
 170                 mpc52xx_suspend.board_resume_finish(mbar);
 171
 172         iounmap(mbar);
 173 }
 174
 175 static struct platform_suspend_ops mpc52xx_pm_ops = {
 176         .valid          = mpc52xx_pm_valid,
 177         .prepare        = mpc52xx_pm_prepare,
 178         .enter          = mpc52xx_pm_enter,
 179         .finish         = mpc52xx_pm_finish,
 180 };
 181
 182 int __init mpc52xx_pm_init(void)
 183 {
 184         suspend_set_ops(&mpc52xx_pm_ops);
 185         return 0;
 186 }