arch/powerpc/platforms/83xx/mpc832x_rdb.c

   1 /*
   2  * arch/powerpc/platforms/83xx/mpc832x_rdb.c
   3  *
   4  * Copyright (C) Freescale Semiconductor, Inc. 2007. All rights reserved.
   5  *
   6  * Description:
   7  * MPC832x RDB board specific routines.
   8  * This file is based on mpc832x_mds.c and mpc8313_rdb.c
   9  * Author: Michael Barkowski <michael.barkowski@freescale.com>
  10  *
  11  * This program is free software; you can redistribute  it and/or modify it
  12  * under  the terms of  the GNU General  Public License as published by the
  13  * Free Software Foundation;  either version 2 of the  License, or (at your
  14  * option) any later version.
  15  */
  16
  17 #include <linux/pci.h>
  18 #include <linux/spi/spi.h>
  19
  20 #include <asm/of_platform.h>
  21 #include <asm/time.h>
  22 #include <asm/ipic.h>
  23 #include <asm/udbg.h>
  24 #include <asm/qe.h>
  25 #include <asm/qe_ic.h>
  26 #include <sysdev/fsl_soc.h>
  27
  28 #include "mpc83xx.h"
  29
  30 #undef DEBUG
  31 #ifdef DEBUG
  32 #define DBG(fmt...) udbg_printf(fmt)
  33 #else
  34 #define DBG(fmt...)
  35 #endif
  36
  37 static void mpc83xx_spi_activate_cs(u8 cs, u8 polarity)
  38 {
  39         pr_debug("%s %d %d\n", __func__, cs, polarity);
  40         par_io_data_set(3, 13, polarity);
  41 }
  42
  43 static void mpc83xx_spi_deactivate_cs(u8 cs, u8 polarity)
  44 {
  45         pr_debug("%s %d %d\n", __func__, cs, polarity);
  46         par_io_data_set(3, 13, !polarity);
  47 }
  48
  49 static struct spi_board_info mpc832x_spi_boardinfo = {
  50         .bus_num = 0x4c0,
  51         .chip_select = 0,
  52         .max_speed_hz = 50000000,
  53         /*
  54          * XXX: This is spidev (spi in userspace) stub, should
  55          * be replaced by "mmc_spi" when mmc_spi will hit mainline.
  56          */
  57         .modalias = "spidev",
  58 };
  59
  60 static int __init mpc832x_spi_init(void)
  61 {
  62         if (!machine_is(mpc832x_rdb))
  63                 return 0;
  64
  65         par_io_config_pin(3,  0, 3, 0, 1, 0); /* SPI1 MOSI, I/O */
  66         par_io_config_pin(3,  1, 3, 0, 1, 0); /* SPI1 MISO, I/O */
  67         par_io_config_pin(3,  2, 3, 0, 1, 0); /* SPI1 CLK,  I/O */
  68         par_io_config_pin(3,  3, 2, 0, 1, 0); /* SPI1 SEL,  I   */
  69
  70         par_io_config_pin(3, 13, 1, 0, 0, 0); /* !SD_CS,    O */
  71         par_io_config_pin(3, 14, 2, 0, 0, 0); /* SD_INSERT, I */
  72         par_io_config_pin(3, 15, 2, 0, 0, 0); /* SD_PROTECT,I */
  73
  74         return fsl_spi_init(&mpc832x_spi_boardinfo, 1,
  75                             mpc83xx_spi_activate_cs,
  76                             mpc83xx_spi_deactivate_cs);
  77 }
  78
  79 device_initcall(mpc832x_spi_init);
  80
  81 /* ************************************************************************
  82  *
  83  * Setup the architecture
  84  *
  85  */
  86 static void __init mpc832x_rdb_setup_arch(void)
  87 {
  88 #if defined(CONFIG_PCI) || defined(CONFIG_QUICC_ENGINE)
  89         struct device_node *np;
  90 #endif
  91
  92         if (ppc_md.progress)
  93                 ppc_md.progress("mpc832x_rdb_setup_arch()", 0);
  94
  95 #ifdef CONFIG_PCI
  96         for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
  97                 mpc83xx_add_bridge(np);
  98 #endif
  99
 100 #ifdef CONFIG_QUICC_ENGINE
 101         qe_reset();
 102
 103         if ((np = of_find_node_by_name(np, "par_io")) != NULL) {
 104                 par_io_init(np);
 105                 of_node_put(np);
 106
 107                 for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;)
 108                         par_io_of_config(np);
 109         }
 110 #endif                          /* CONFIG_QUICC_ENGINE */
 111 }
 112
 113 static struct of_device_id mpc832x_ids[] = {
 114         { .type = "soc", },
 115         { .compatible = "soc", },
 116         { .type = "qe", },
 117         {},
 118 };
 119
 120 static int __init mpc832x_declare_of_platform_devices(void)
 121 {
 122         if (!machine_is(mpc832x_rdb))
 123                 return 0;
 124
 125         /* Publish the QE devices */
 126         of_platform_bus_probe(NULL, mpc832x_ids, NULL);
 127
 128         return 0;
 129 }
 130 device_initcall(mpc832x_declare_of_platform_devices);
 131
 132 void __init mpc832x_rdb_init_IRQ(void)
 133 {
 134
 135         struct device_node *np;
 136
 137         np = of_find_node_by_type(NULL, "ipic");
 138         if (!np)
 139                 return;
 140
 141         ipic_init(np, 0);
 142
 143         /* Initialize the default interrupt mapping priorities,
 144          * in case the boot rom changed something on us.
 145          */
 146         ipic_set_default_priority();
 147         of_node_put(np);
 148
 149 #ifdef CONFIG_QUICC_ENGINE
 150         np = of_find_node_by_type(NULL, "qeic");
 151         if (!np)
 152                 return;
 153
 154         qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic);
 155         of_node_put(np);
 156 #endif                          /* CONFIG_QUICC_ENGINE */
 157 }
 158
 159 /*
 160  * Called very early, MMU is off, device-tree isn't unflattened
 161  */
 162 static int __init mpc832x_rdb_probe(void)
 163 {
 164         unsigned long root = of_get_flat_dt_root();
 165
 166         return of_flat_dt_is_compatible(root, "MPC832xRDB");
 167 }
 168
 169 define_machine(mpc832x_rdb) {
 170         .name           = "MPC832x RDB",
 171         .probe          = mpc832x_rdb_probe,
 172         .setup_arch     = mpc832x_rdb_setup_arch,
 173         .init_IRQ       = mpc832x_rdb_init_IRQ,
 174         .get_irq        = ipic_get_irq,
 175         .restart        = mpc83xx_restart,
 176         .time_init      = mpc83xx_time_init,
 177         .calibrate_decr = generic_calibrate_decr,
 178         .progress       = udbg_progress,
 179 };