arch/powerpc/platforms/pseries/smp.c

   1 /*
   2  * SMP support for pSeries machines.
   3  *
   4  * Dave Engebretsen, Peter Bergner, and
   5  * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com
   6  *
   7  * Plus various changes from other IBM teams...
   8  *
   9  *      This program is free software; you can redistribute it and/or
  10  *      modify it under the terms of the GNU General Public License
  11  *      as published by the Free Software Foundation; either version
  12  *      2 of the License, or (at your option) any later version.
  13  */
  14
  15 #undef DEBUG
  16
  17 #include <linux/kernel.h>
  18 #include <linux/module.h>
  19 #include <linux/sched.h>
  20 #include <linux/smp.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/delay.h>
  23 #include <linux/init.h>
  24 #include <linux/spinlock.h>
  25 #include <linux/cache.h>
  26 #include <linux/err.h>
  27 #include <linux/sysdev.h>
  28 #include <linux/cpu.h>
  29
  30 #include <asm/ptrace.h>
  31 #include <asm/atomic.h>
  32 #include <asm/irq.h>
  33 #include <asm/page.h>
  34 #include <asm/pgtable.h>
  35 #include <asm/io.h>
  36 #include <asm/prom.h>
  37 #include <asm/smp.h>
  38 #include <asm/paca.h>
  39 #include <asm/time.h>
  40 #include <asm/machdep.h>
  41 #include "xics.h"
  42 #include <asm/cputable.h>
  43 #include <asm/firmware.h>
  44 #include <asm/system.h>
  45 #include <asm/rtas.h>
  46 #include <asm/pSeries_reconfig.h>
  47 #include <asm/mpic.h>
  48 #include <asm/vdso_datapage.h>
  49
  50 #include "plpar_wrappers.h"
  51 #include "pseries.h"
  52
  53 #ifdef DEBUG
  54 #include <asm/udbg.h>
  55 #define DBG(fmt...) udbg_printf(fmt)
  56 #else
  57 #define DBG(fmt...)
  58 #endif
  59
  60 /*
  61  * The primary thread of each non-boot processor is recorded here before
  62  * smp init.
  63  */
  64 static cpumask_t of_spin_map;
  65
  66 extern void generic_secondary_smp_init(unsigned long);
  67
  68 /**
  69  * smp_startup_cpu() - start the given cpu
  70  *
  71  * At boot time, there is nothing to do for primary threads which were
  72  * started from Open Firmware.  For anything else, call RTAS with the
  73  * appropriate start location.
  74  *
  75  * Returns:
  76  *      0       - failure
  77  *      1       - success
  78  */
  79 static inline int __devinit smp_startup_cpu(unsigned int lcpu)
  80 {
  81         int status;
  82         unsigned long start_here = __pa((u32)*((unsigned long *)
  83                                                generic_secondary_smp_init));
  84         unsigned int pcpu;
  85         int start_cpu;
  86
  87         if (cpu_isset(lcpu, of_spin_map))
  88                 /* Already started by OF and sitting in spin loop */
  89                 return 1;
  90
  91         pcpu = get_hard_smp_processor_id(lcpu);
  92
  93         /* Fixup atomic count: it exited inside IRQ handler. */
  94         task_thread_info(paca[lcpu].__current)->preempt_count   = 0;
  95
  96         /*
  97          * If the RTAS start-cpu token does not exist then presume the
  98          * cpu is already spinning.
  99          */
 100         start_cpu = rtas_token("start-cpu");
 101         if (start_cpu == RTAS_UNKNOWN_SERVICE)
 102                 return 1;
 103
 104         status = rtas_call(start_cpu, 3, 1, NULL, pcpu, start_here, pcpu);
 105         if (status != 0) {
 106                 printk(KERN_ERR "start-cpu failed: %i\n", status);
 107                 return 0;
 108         }
 109
 110         return 1;
 111 }
 112
 113 #ifdef CONFIG_XICS
 114 static inline void smp_xics_do_message(int cpu, int msg)
 115 {
 116         set_bit(msg, &xics_ipi_message[cpu].value);
 117         mb();
 118         xics_cause_IPI(cpu);
 119 }
 120
 121 static void smp_xics_message_pass(int target, int msg)
 122 {
 123         unsigned int i;
 124
 125         if (target < NR_CPUS) {
 126                 smp_xics_do_message(target, msg);
 127         } else {
 128                 for_each_online_cpu(i) {
 129                         if (target == MSG_ALL_BUT_SELF
 130                             && i == smp_processor_id())
 131                                 continue;
 132                         smp_xics_do_message(i, msg);
 133                 }
 134         }
 135 }
 136
 137 static int __init smp_xics_probe(void)
 138 {
 139         xics_request_IPIs();
 140
 141         return cpus_weight(cpu_possible_map);
 142 }
 143
 144 static void __devinit smp_xics_setup_cpu(int cpu)
 145 {
 146         if (cpu != boot_cpuid)
 147                 xics_setup_cpu();
 148
 149         if (firmware_has_feature(FW_FEATURE_SPLPAR))
 150                 vpa_init(cpu);
 151
 152         cpu_clear(cpu, of_spin_map);
 153
 154 }
 155 #endif /* CONFIG_XICS */
 156
 157 static DEFINE_SPINLOCK(timebase_lock);
 158 static unsigned long timebase = 0;
 159
 160 static void __devinit pSeries_give_timebase(void)
 161 {
 162         spin_lock(&timebase_lock);
 163         rtas_call(rtas_token("freeze-time-base"), 0, 1, NULL);
 164         timebase = get_tb();
 165         spin_unlock(&timebase_lock);
 166
 167         while (timebase)
 168                 barrier();
 169         rtas_call(rtas_token("thaw-time-base"), 0, 1, NULL);
 170 }
 171
 172 static void __devinit pSeries_take_timebase(void)
 173 {
 174         while (!timebase)
 175                 barrier();
 176         spin_lock(&timebase_lock);
 177         set_tb(timebase >> 32, timebase & 0xffffffff);
 178         timebase = 0;
 179         spin_unlock(&timebase_lock);
 180 }
 181
 182 static void __devinit smp_pSeries_kick_cpu(int nr)
 183 {
 184         BUG_ON(nr < 0 || nr >= NR_CPUS);
 185
 186         if (!smp_startup_cpu(nr))
 187                 return;
 188
 189         /*
 190          * The processor is currently spinning, waiting for the
 191          * cpu_start field to become non-zero After we set cpu_start,
 192          * the processor will continue on to secondary_start
 193          */
 194         paca[nr].cpu_start = 1;
 195 }
 196
 197 static int smp_pSeries_cpu_bootable(unsigned int nr)
 198 {
 199         /* Special case - we inhibit secondary thread startup
 200          * during boot if the user requests it.  Odd-numbered
 201          * cpus are assumed to be secondary threads.
 202          */
 203         if (system_state < SYSTEM_RUNNING &&
 204             cpu_has_feature(CPU_FTR_SMT) &&
 205             !smt_enabled_at_boot && nr % 2 != 0)
 206                 return 0;
 207
 208         return 1;
 209 }
 210 #ifdef CONFIG_MPIC
 211 static struct smp_ops_t pSeries_mpic_smp_ops = {
 212         .message_pass   = smp_mpic_message_pass,
 213         .probe          = smp_mpic_probe,
 214         .kick_cpu       = smp_pSeries_kick_cpu,
 215         .setup_cpu      = smp_mpic_setup_cpu,
 216 };
 217 #endif
 218 #ifdef CONFIG_XICS
 219 static struct smp_ops_t pSeries_xics_smp_ops = {
 220         .message_pass   = smp_xics_message_pass,
 221         .probe          = smp_xics_probe,
 222         .kick_cpu       = smp_pSeries_kick_cpu,
 223         .setup_cpu      = smp_xics_setup_cpu,
 224         .cpu_bootable   = smp_pSeries_cpu_bootable,
 225 };
 226 #endif
 227
 228 /* This is called very early */
 229 static void __init smp_init_pseries(void)
 230 {
 231         int i;
 232
 233         DBG(" -> smp_init_pSeries()\n");
 234
 235         /* Mark threads which are still spinning in hold loops. */
 236         if (cpu_has_feature(CPU_FTR_SMT)) {
 237                 for_each_present_cpu(i) {
 238                         if (i % 2 == 0)
 239                                 /*
 240                                  * Even-numbered logical cpus correspond to
 241                                  * primary threads.
 242                                  */
 243                                 cpu_set(i, of_spin_map);
 244                 }
 245         } else {
 246                 of_spin_map = cpu_present_map;
 247         }
 248
 249         cpu_clear(boot_cpuid, of_spin_map);
 250
 251         /* Non-lpar has additional take/give timebase */
 252         if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) {
 253                 smp_ops->give_timebase = pSeries_give_timebase;
 254                 smp_ops->take_timebase = pSeries_take_timebase;
 255         }
 256
 257         DBG(" <- smp_init_pSeries()\n");
 258 }
 259
 260 #ifdef CONFIG_MPIC
 261 void __init smp_init_pseries_mpic(void)
 262 {
 263         smp_ops = &pSeries_mpic_smp_ops;
 264
 265         smp_init_pseries();
 266 }
 267 #endif
 268
 269 void __init smp_init_pseries_xics(void)
 270 {
 271         smp_ops = &pSeries_xics_smp_ops;
 272
 273         smp_init_pseries();
 274 }