include/asm-i386/mach-bigsmp/mach_apic.h

   1 #ifndef __ASM_MACH_APIC_H
   2 #define __ASM_MACH_APIC_H
   3 #include <asm/smp.h>
   4
   5 #define SEQUENTIAL_APICID
   6 #ifdef SEQUENTIAL_APICID
   7 #define xapic_phys_to_log_apicid(phys_apic) ( (1ul << ((phys_apic) & 0x3)) |\
   8                 ((phys_apic<<2) & (~0xf)) )
   9 #elif CLUSTERED_APICID
  10 #define xapic_phys_to_log_apicid(phys_apic) ( (1ul << ((phys_apic) & 0x3)) |\
  11                 ((phys_apic) & (~0xf)) )
  12 #endif
  13
  14 #define NO_BALANCE_IRQ (1)
  15 #define esr_disable (1)
  16
  17 static inline int apic_id_registered(void)
  18 {
  19         return (1);
  20 }
  21
  22 #define APIC_DFR_VALUE  (APIC_DFR_CLUSTER)
  23 /* Round robin the irqs amoung the online cpus */
  24 static inline cpumask_t target_cpus(void)
  25 {
  26         static unsigned long cpu = NR_CPUS;
  27         do {
  28                 if (cpu >= NR_CPUS)
  29                         cpu = first_cpu(cpu_online_map);
  30                 else
  31                         cpu = next_cpu(cpu, cpu_online_map);
  32         } while (cpu >= NR_CPUS);
  33         return cpumask_of_cpu(cpu);
  34 }
  35 #define TARGET_CPUS     (target_cpus())
  36
  37 #define INT_DELIVERY_MODE dest_Fixed
  38 #define INT_DEST_MODE 1     /* logical delivery broadcast to all procs */
  39
  40 static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
  41 {
  42         return 0;
  43 }
  44
  45 /* we don't use the phys_cpu_present_map to indicate apicid presence */
  46 static inline unsigned long check_apicid_present(int bit)
  47 {
  48         return 1;
  49 }
  50
  51 #define apicid_cluster(apicid) (apicid & 0xF0)
  52
  53 static inline unsigned long calculate_ldr(unsigned long old)
  54 {
  55         unsigned long id;
  56         id = xapic_phys_to_log_apicid(hard_smp_processor_id());
  57         return ((old & ~APIC_LDR_MASK) | SET_APIC_LOGICAL_ID(id));
  58 }
  59
  60 /*
  61  * Set up the logical destination ID.
  62  *
  63  * Intel recommends to set DFR, LDR and TPR before enabling
  64  * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
  65  * document number 292116).  So here it goes...
  66  */
  67 static inline void init_apic_ldr(void)
  68 {
  69         unsigned long val;
  70
  71         apic_write_around(APIC_DFR, APIC_DFR_VALUE);
  72         val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
  73         val = calculate_ldr(val);
  74         apic_write_around(APIC_LDR, val);
  75 }
  76
  77 static inline void clustered_apic_check(void)
  78 {
  79         printk("Enabling APIC mode:  %s.  Using %d I/O APICs\n",
  80                 "Cluster", nr_ioapics);
  81 }
  82
  83 static inline int multi_timer_check(int apic, int irq)
  84 {
  85         return 0;
  86 }
  87
  88 static inline int apicid_to_node(int logical_apicid)
  89 {
  90         return 0;
  91 }
  92
  93 extern u8 bios_cpu_apicid[];
  94
  95 static inline int cpu_present_to_apicid(int mps_cpu)
  96 {
  97         if (mps_cpu < NR_CPUS)
  98                 return (int)bios_cpu_apicid[mps_cpu];
  99         else
 100                 return BAD_APICID;
 101 }
 102
 103 static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
 104 {
 105         return physid_mask_of_physid(phys_apicid);
 106 }
 107
 108 extern u8 cpu_2_logical_apicid[];
 109 /* Mapping from cpu number to logical apicid */
 110 static inline int cpu_to_logical_apicid(int cpu)
 111 {
 112        if (cpu >= NR_CPUS)
 113                return BAD_APICID;
 114        return (int)cpu_2_logical_apicid[cpu];
 115  }
 116
 117 static inline int mpc_apic_id(struct mpc_config_processor *m,
 118                         struct mpc_config_translation *translation_record)
 119 {
 120         printk("Processor #%d %ld:%ld APIC version %d\n",
 121                 m->mpc_apicid,
 122                 (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8,
 123                 (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4,
 124                 m->mpc_apicver);
 125         return m->mpc_apicid;
 126 }
 127
 128 static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
 129 {
 130         /* For clustered we don't have a good way to do this yet - hack */
 131         return physids_promote(0xFUL);
 132 }
 133
 134 #define WAKE_SECONDARY_VIA_INIT
 135
 136 static inline void setup_portio_remap(void)
 137 {
 138 }
 139
 140 static inline void enable_apic_mode(void)
 141 {
 142 }
 143
 144 static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
 145 {
 146         return (1);
 147 }
 148
 149 /* As we are using single CPU as destination, pick only one CPU here */
 150 static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
 151 {
 152         int cpu;
 153         int apicid;
 154
 155         cpu = first_cpu(cpumask);
 156         apicid = cpu_to_logical_apicid(cpu);
 157         return apicid;
 158 }
 159
 160 static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
 161 {
 162         return cpuid_apic >> index_msb;
 163 }
 164
 165 #endif /* __ASM_MACH_APIC_H */