[POWERPC] spufs: fix mismerge, making context signal{1,2} files readable again
[linux-2.6/verdex.git] / drivers / serial / atmel_serial.c
blob4d6b3c56d20e7df9ea1262ae89cae2e24d18f901
1 /*
2 * linux/drivers/char/atmel_serial.c
4 * Driver for Atmel AT91 / AT32 Serial ports
5 * Copyright (C) 2003 Rick Bronson
7 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
8 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #include <linux/module.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/slab.h>
29 #include <linux/init.h>
30 #include <linux/serial.h>
31 #include <linux/clk.h>
32 #include <linux/console.h>
33 #include <linux/sysrq.h>
34 #include <linux/tty_flip.h>
35 #include <linux/platform_device.h>
36 #include <linux/atmel_pdc.h>
38 #include <asm/io.h>
40 #include <asm/mach/serial_at91.h>
41 #include <asm/arch/board.h>
43 #ifdef CONFIG_ARM
44 #include <asm/arch/cpu.h>
45 #include <asm/arch/gpio.h>
46 #endif
48 #include "atmel_serial.h"
50 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
51 #define SUPPORT_SYSRQ
52 #endif
54 #include <linux/serial_core.h>
56 #ifdef CONFIG_SERIAL_ATMEL_TTYAT
58 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
59 * should coexist with the 8250 driver, such as if we have an external 16C550
60 * UART. */
61 #define SERIAL_ATMEL_MAJOR 204
62 #define MINOR_START 154
63 #define ATMEL_DEVICENAME "ttyAT"
65 #else
67 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
68 * name, but it is legally reserved for the 8250 driver. */
69 #define SERIAL_ATMEL_MAJOR TTY_MAJOR
70 #define MINOR_START 64
71 #define ATMEL_DEVICENAME "ttyS"
73 #endif
75 #define ATMEL_ISR_PASS_LIMIT 256
77 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
78 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
79 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
80 #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
81 #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
82 #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
83 #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
84 #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
85 #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
86 #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
87 #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
88 #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
90 // #define UART_GET_CR(port) __raw_readl((port)->membase + ATMEL_US_CR) // is write-only
92 /* PDC registers */
93 #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
94 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
96 #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
97 #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
98 #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
99 #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
100 #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
102 #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
103 #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
104 //#define UART_PUT_TNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNPR)
105 //#define UART_PUT_TNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNCR)
107 static int (*atmel_open_hook)(struct uart_port *);
108 static void (*atmel_close_hook)(struct uart_port *);
111 * We wrap our port structure around the generic uart_port.
113 struct atmel_uart_port {
114 struct uart_port uart; /* uart */
115 struct clk *clk; /* uart clock */
116 unsigned short suspended; /* is port suspended? */
117 int break_active; /* break being received */
120 static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
122 #ifdef SUPPORT_SYSRQ
123 static struct console atmel_console;
124 #endif
127 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
129 static u_int atmel_tx_empty(struct uart_port *port)
131 return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
135 * Set state of the modem control output lines
137 static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
139 unsigned int control = 0;
140 unsigned int mode;
142 #ifdef CONFIG_ARCH_AT91RM9200
143 if (cpu_is_at91rm9200()) {
145 * AT91RM9200 Errata #39: RTS0 is not internally connected to PA21.
146 * We need to drive the pin manually.
148 if (port->mapbase == AT91RM9200_BASE_US0) {
149 if (mctrl & TIOCM_RTS)
150 at91_set_gpio_value(AT91_PIN_PA21, 0);
151 else
152 at91_set_gpio_value(AT91_PIN_PA21, 1);
155 #endif
157 if (mctrl & TIOCM_RTS)
158 control |= ATMEL_US_RTSEN;
159 else
160 control |= ATMEL_US_RTSDIS;
162 if (mctrl & TIOCM_DTR)
163 control |= ATMEL_US_DTREN;
164 else
165 control |= ATMEL_US_DTRDIS;
167 UART_PUT_CR(port, control);
169 /* Local loopback mode? */
170 mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
171 if (mctrl & TIOCM_LOOP)
172 mode |= ATMEL_US_CHMODE_LOC_LOOP;
173 else
174 mode |= ATMEL_US_CHMODE_NORMAL;
175 UART_PUT_MR(port, mode);
179 * Get state of the modem control input lines
181 static u_int atmel_get_mctrl(struct uart_port *port)
183 unsigned int status, ret = 0;
185 status = UART_GET_CSR(port);
188 * The control signals are active low.
190 if (!(status & ATMEL_US_DCD))
191 ret |= TIOCM_CD;
192 if (!(status & ATMEL_US_CTS))
193 ret |= TIOCM_CTS;
194 if (!(status & ATMEL_US_DSR))
195 ret |= TIOCM_DSR;
196 if (!(status & ATMEL_US_RI))
197 ret |= TIOCM_RI;
199 return ret;
203 * Stop transmitting.
205 static void atmel_stop_tx(struct uart_port *port)
207 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
209 UART_PUT_IDR(port, ATMEL_US_TXRDY);
213 * Start transmitting.
215 static void atmel_start_tx(struct uart_port *port)
217 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
219 UART_PUT_IER(port, ATMEL_US_TXRDY);
223 * Stop receiving - port is in process of being closed.
225 static void atmel_stop_rx(struct uart_port *port)
227 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
229 UART_PUT_IDR(port, ATMEL_US_RXRDY);
233 * Enable modem status interrupts
235 static void atmel_enable_ms(struct uart_port *port)
237 UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
241 * Control the transmission of a break signal
243 static void atmel_break_ctl(struct uart_port *port, int break_state)
245 if (break_state != 0)
246 UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
247 else
248 UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
252 * Characters received (called from interrupt handler)
254 static void atmel_rx_chars(struct uart_port *port)
256 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
257 struct tty_struct *tty = port->info->tty;
258 unsigned int status, ch, flg;
260 status = UART_GET_CSR(port);
261 while (status & ATMEL_US_RXRDY) {
262 ch = UART_GET_CHAR(port);
264 port->icount.rx++;
266 flg = TTY_NORMAL;
269 * note that the error handling code is
270 * out of the main execution path
272 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
273 | ATMEL_US_OVRE | ATMEL_US_RXBRK)
274 || atmel_port->break_active)) {
275 UART_PUT_CR(port, ATMEL_US_RSTSTA); /* clear error */
276 if (status & ATMEL_US_RXBRK
277 && !atmel_port->break_active) {
278 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); /* ignore side-effect */
279 port->icount.brk++;
280 atmel_port->break_active = 1;
281 UART_PUT_IER(port, ATMEL_US_RXBRK);
282 if (uart_handle_break(port))
283 goto ignore_char;
284 } else {
286 * This is either the end-of-break
287 * condition or we've received at
288 * least one character without RXBRK
289 * being set. In both cases, the next
290 * RXBRK will indicate start-of-break.
292 UART_PUT_IDR(port, ATMEL_US_RXBRK);
293 status &= ~ATMEL_US_RXBRK;
294 atmel_port->break_active = 0;
296 if (status & ATMEL_US_PARE)
297 port->icount.parity++;
298 if (status & ATMEL_US_FRAME)
299 port->icount.frame++;
300 if (status & ATMEL_US_OVRE)
301 port->icount.overrun++;
303 status &= port->read_status_mask;
305 if (status & ATMEL_US_RXBRK)
306 flg = TTY_BREAK;
307 else if (status & ATMEL_US_PARE)
308 flg = TTY_PARITY;
309 else if (status & ATMEL_US_FRAME)
310 flg = TTY_FRAME;
313 if (uart_handle_sysrq_char(port, ch))
314 goto ignore_char;
316 uart_insert_char(port, status, ATMEL_US_OVRE, ch, flg);
318 ignore_char:
319 status = UART_GET_CSR(port);
322 tty_flip_buffer_push(tty);
326 * Transmit characters (called from interrupt handler)
328 static void atmel_tx_chars(struct uart_port *port)
330 struct circ_buf *xmit = &port->info->xmit;
332 if (port->x_char) {
333 UART_PUT_CHAR(port, port->x_char);
334 port->icount.tx++;
335 port->x_char = 0;
336 return;
338 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
339 atmel_stop_tx(port);
340 return;
343 while (UART_GET_CSR(port) & ATMEL_US_TXRDY) {
344 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
345 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
346 port->icount.tx++;
347 if (uart_circ_empty(xmit))
348 break;
351 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
352 uart_write_wakeup(port);
354 if (uart_circ_empty(xmit))
355 atmel_stop_tx(port);
359 * Interrupt handler
361 static irqreturn_t atmel_interrupt(int irq, void *dev_id)
363 struct uart_port *port = dev_id;
364 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
365 unsigned int status, pending, pass_counter = 0;
367 status = UART_GET_CSR(port);
368 pending = status & UART_GET_IMR(port);
369 while (pending) {
370 /* Interrupt receive */
371 if (pending & ATMEL_US_RXRDY)
372 atmel_rx_chars(port);
373 else if (pending & ATMEL_US_RXBRK) {
375 * End of break detected. If it came along
376 * with a character, atmel_rx_chars will
377 * handle it.
379 UART_PUT_CR(port, ATMEL_US_RSTSTA);
380 UART_PUT_IDR(port, ATMEL_US_RXBRK);
381 atmel_port->break_active = 0;
384 // TODO: All reads to CSR will clear these interrupts!
385 if (pending & ATMEL_US_RIIC) port->icount.rng++;
386 if (pending & ATMEL_US_DSRIC) port->icount.dsr++;
387 if (pending & ATMEL_US_DCDIC)
388 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
389 if (pending & ATMEL_US_CTSIC)
390 uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
391 if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC))
392 wake_up_interruptible(&port->info->delta_msr_wait);
394 /* Interrupt transmit */
395 if (pending & ATMEL_US_TXRDY)
396 atmel_tx_chars(port);
398 if (pass_counter++ > ATMEL_ISR_PASS_LIMIT)
399 break;
401 status = UART_GET_CSR(port);
402 pending = status & UART_GET_IMR(port);
404 return IRQ_HANDLED;
408 * Perform initialization and enable port for reception
410 static int atmel_startup(struct uart_port *port)
412 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
413 int retval;
416 * Ensure that no interrupts are enabled otherwise when
417 * request_irq() is called we could get stuck trying to
418 * handle an unexpected interrupt
420 UART_PUT_IDR(port, -1);
423 * Allocate the IRQ
425 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED, "atmel_serial", port);
426 if (retval) {
427 printk("atmel_serial: atmel_startup - Can't get irq\n");
428 return retval;
432 * If there is a specific "open" function (to register
433 * control line interrupts)
435 if (atmel_open_hook) {
436 retval = atmel_open_hook(port);
437 if (retval) {
438 free_irq(port->irq, port);
439 return retval;
444 * Finally, enable the serial port
446 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
447 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); /* enable xmit & rcvr */
449 UART_PUT_IER(port, ATMEL_US_RXRDY); /* enable receive only */
451 return 0;
455 * Disable the port
457 static void atmel_shutdown(struct uart_port *port)
459 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
462 * Disable all interrupts, port and break condition.
464 UART_PUT_CR(port, ATMEL_US_RSTSTA);
465 UART_PUT_IDR(port, -1);
468 * Free the interrupt
470 free_irq(port->irq, port);
473 * If there is a specific "close" function (to unregister
474 * control line interrupts)
476 if (atmel_close_hook)
477 atmel_close_hook(port);
481 * Power / Clock management.
483 static void atmel_serial_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
485 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
487 switch (state) {
488 case 0:
490 * Enable the peripheral clock for this serial port.
491 * This is called on uart_open() or a resume event.
493 clk_enable(atmel_port->clk);
494 break;
495 case 3:
497 * Disable the peripheral clock for this serial port.
498 * This is called on uart_close() or a suspend event.
500 clk_disable(atmel_port->clk);
501 break;
502 default:
503 printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
508 * Change the port parameters
510 static void atmel_set_termios(struct uart_port *port, struct ktermios * termios, struct ktermios * old)
512 unsigned long flags;
513 unsigned int mode, imr, quot, baud;
515 /* Get current mode register */
516 mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL | ATMEL_US_NBSTOP | ATMEL_US_PAR);
518 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
519 quot = uart_get_divisor(port, baud);
521 if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
522 quot /= 8;
523 mode |= ATMEL_US_USCLKS_MCK_DIV8;
526 /* byte size */
527 switch (termios->c_cflag & CSIZE) {
528 case CS5:
529 mode |= ATMEL_US_CHRL_5;
530 break;
531 case CS6:
532 mode |= ATMEL_US_CHRL_6;
533 break;
534 case CS7:
535 mode |= ATMEL_US_CHRL_7;
536 break;
537 default:
538 mode |= ATMEL_US_CHRL_8;
539 break;
542 /* stop bits */
543 if (termios->c_cflag & CSTOPB)
544 mode |= ATMEL_US_NBSTOP_2;
546 /* parity */
547 if (termios->c_cflag & PARENB) {
548 if (termios->c_cflag & CMSPAR) { /* Mark or Space parity */
549 if (termios->c_cflag & PARODD)
550 mode |= ATMEL_US_PAR_MARK;
551 else
552 mode |= ATMEL_US_PAR_SPACE;
554 else if (termios->c_cflag & PARODD)
555 mode |= ATMEL_US_PAR_ODD;
556 else
557 mode |= ATMEL_US_PAR_EVEN;
559 else
560 mode |= ATMEL_US_PAR_NONE;
562 spin_lock_irqsave(&port->lock, flags);
564 port->read_status_mask = ATMEL_US_OVRE;
565 if (termios->c_iflag & INPCK)
566 port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
567 if (termios->c_iflag & (BRKINT | PARMRK))
568 port->read_status_mask |= ATMEL_US_RXBRK;
571 * Characters to ignore
573 port->ignore_status_mask = 0;
574 if (termios->c_iflag & IGNPAR)
575 port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
576 if (termios->c_iflag & IGNBRK) {
577 port->ignore_status_mask |= ATMEL_US_RXBRK;
579 * If we're ignoring parity and break indicators,
580 * ignore overruns too (for real raw support).
582 if (termios->c_iflag & IGNPAR)
583 port->ignore_status_mask |= ATMEL_US_OVRE;
586 // TODO: Ignore all characters if CREAD is set.
588 /* update the per-port timeout */
589 uart_update_timeout(port, termios->c_cflag, baud);
591 /* disable interrupts and drain transmitter */
592 imr = UART_GET_IMR(port); /* get interrupt mask */
593 UART_PUT_IDR(port, -1); /* disable all interrupts */
594 while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY)) { barrier(); }
596 /* disable receiver and transmitter */
597 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
599 /* set the parity, stop bits and data size */
600 UART_PUT_MR(port, mode);
602 /* set the baud rate */
603 UART_PUT_BRGR(port, quot);
604 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
605 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
607 /* restore interrupts */
608 UART_PUT_IER(port, imr);
610 /* CTS flow-control and modem-status interrupts */
611 if (UART_ENABLE_MS(port, termios->c_cflag))
612 port->ops->enable_ms(port);
614 spin_unlock_irqrestore(&port->lock, flags);
618 * Return string describing the specified port
620 static const char *atmel_type(struct uart_port *port)
622 return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
626 * Release the memory region(s) being used by 'port'.
628 static void atmel_release_port(struct uart_port *port)
630 struct platform_device *pdev = to_platform_device(port->dev);
631 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
633 release_mem_region(port->mapbase, size);
635 if (port->flags & UPF_IOREMAP) {
636 iounmap(port->membase);
637 port->membase = NULL;
642 * Request the memory region(s) being used by 'port'.
644 static int atmel_request_port(struct uart_port *port)
646 struct platform_device *pdev = to_platform_device(port->dev);
647 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
649 if (!request_mem_region(port->mapbase, size, "atmel_serial"))
650 return -EBUSY;
652 if (port->flags & UPF_IOREMAP) {
653 port->membase = ioremap(port->mapbase, size);
654 if (port->membase == NULL) {
655 release_mem_region(port->mapbase, size);
656 return -ENOMEM;
660 return 0;
664 * Configure/autoconfigure the port.
666 static void atmel_config_port(struct uart_port *port, int flags)
668 if (flags & UART_CONFIG_TYPE) {
669 port->type = PORT_ATMEL;
670 atmel_request_port(port);
675 * Verify the new serial_struct (for TIOCSSERIAL).
677 static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
679 int ret = 0;
680 if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
681 ret = -EINVAL;
682 if (port->irq != ser->irq)
683 ret = -EINVAL;
684 if (ser->io_type != SERIAL_IO_MEM)
685 ret = -EINVAL;
686 if (port->uartclk / 16 != ser->baud_base)
687 ret = -EINVAL;
688 if ((void *)port->mapbase != ser->iomem_base)
689 ret = -EINVAL;
690 if (port->iobase != ser->port)
691 ret = -EINVAL;
692 if (ser->hub6 != 0)
693 ret = -EINVAL;
694 return ret;
697 static struct uart_ops atmel_pops = {
698 .tx_empty = atmel_tx_empty,
699 .set_mctrl = atmel_set_mctrl,
700 .get_mctrl = atmel_get_mctrl,
701 .stop_tx = atmel_stop_tx,
702 .start_tx = atmel_start_tx,
703 .stop_rx = atmel_stop_rx,
704 .enable_ms = atmel_enable_ms,
705 .break_ctl = atmel_break_ctl,
706 .startup = atmel_startup,
707 .shutdown = atmel_shutdown,
708 .set_termios = atmel_set_termios,
709 .type = atmel_type,
710 .release_port = atmel_release_port,
711 .request_port = atmel_request_port,
712 .config_port = atmel_config_port,
713 .verify_port = atmel_verify_port,
714 .pm = atmel_serial_pm,
718 * Configure the port from the platform device resource info.
720 static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, struct platform_device *pdev)
722 struct uart_port *port = &atmel_port->uart;
723 struct atmel_uart_data *data = pdev->dev.platform_data;
725 port->iotype = UPIO_MEM;
726 port->flags = UPF_BOOT_AUTOCONF;
727 port->ops = &atmel_pops;
728 port->fifosize = 1;
729 port->line = pdev->id;
730 port->dev = &pdev->dev;
732 port->mapbase = pdev->resource[0].start;
733 port->irq = pdev->resource[1].start;
735 if (data->regs)
736 /* Already mapped by setup code */
737 port->membase = data->regs;
738 else {
739 port->flags |= UPF_IOREMAP;
740 port->membase = NULL;
743 if (!atmel_port->clk) { /* for console, the clock could already be configured */
744 atmel_port->clk = clk_get(&pdev->dev, "usart");
745 clk_enable(atmel_port->clk);
746 port->uartclk = clk_get_rate(atmel_port->clk);
751 * Register board-specific modem-control line handlers.
753 void __init atmel_register_uart_fns(struct atmel_port_fns *fns)
755 if (fns->enable_ms)
756 atmel_pops.enable_ms = fns->enable_ms;
757 if (fns->get_mctrl)
758 atmel_pops.get_mctrl = fns->get_mctrl;
759 if (fns->set_mctrl)
760 atmel_pops.set_mctrl = fns->set_mctrl;
761 atmel_open_hook = fns->open;
762 atmel_close_hook = fns->close;
763 atmel_pops.pm = fns->pm;
764 atmel_pops.set_wake = fns->set_wake;
768 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
769 static void atmel_console_putchar(struct uart_port *port, int ch)
771 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
772 barrier();
773 UART_PUT_CHAR(port, ch);
777 * Interrupts are disabled on entering
779 static void atmel_console_write(struct console *co, const char *s, u_int count)
781 struct uart_port *port = &atmel_ports[co->index].uart;
782 unsigned int status, imr;
785 * First, save IMR and then disable interrupts
787 imr = UART_GET_IMR(port); /* get interrupt mask */
788 UART_PUT_IDR(port, ATMEL_US_RXRDY | ATMEL_US_TXRDY);
790 uart_console_write(port, s, count, atmel_console_putchar);
793 * Finally, wait for transmitter to become empty
794 * and restore IMR
796 do {
797 status = UART_GET_CSR(port);
798 } while (!(status & ATMEL_US_TXRDY));
799 UART_PUT_IER(port, imr); /* set interrupts back the way they were */
803 * If the port was already initialised (eg, by a boot loader), try to determine
804 * the current setup.
806 static void __init atmel_console_get_options(struct uart_port *port, int *baud, int *parity, int *bits)
808 unsigned int mr, quot;
810 // TODO: CR is a write-only register
811 // unsigned int cr;
813 // cr = UART_GET_CR(port) & (ATMEL_US_RXEN | ATMEL_US_TXEN);
814 // if (cr == (ATMEL_US_RXEN | ATMEL_US_TXEN)) {
815 // /* ok, the port was enabled */
816 // }
818 mr = UART_GET_MR(port) & ATMEL_US_CHRL;
819 if (mr == ATMEL_US_CHRL_8)
820 *bits = 8;
821 else
822 *bits = 7;
824 mr = UART_GET_MR(port) & ATMEL_US_PAR;
825 if (mr == ATMEL_US_PAR_EVEN)
826 *parity = 'e';
827 else if (mr == ATMEL_US_PAR_ODD)
828 *parity = 'o';
831 * The serial core only rounds down when matching this to a
832 * supported baud rate. Make sure we don't end up slightly
833 * lower than one of those, as it would make us fall through
834 * to a much lower baud rate than we really want.
836 quot = UART_GET_BRGR(port);
837 *baud = port->uartclk / (16 * (quot - 1));
840 static int __init atmel_console_setup(struct console *co, char *options)
842 struct uart_port *port = &atmel_ports[co->index].uart;
843 int baud = 115200;
844 int bits = 8;
845 int parity = 'n';
846 int flow = 'n';
848 if (port->membase == 0) /* Port not initialized yet - delay setup */
849 return -ENODEV;
851 UART_PUT_IDR(port, -1); /* disable interrupts */
852 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
853 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
855 if (options)
856 uart_parse_options(options, &baud, &parity, &bits, &flow);
857 else
858 atmel_console_get_options(port, &baud, &parity, &bits);
860 return uart_set_options(port, co, baud, parity, bits, flow);
863 static struct uart_driver atmel_uart;
865 static struct console atmel_console = {
866 .name = ATMEL_DEVICENAME,
867 .write = atmel_console_write,
868 .device = uart_console_device,
869 .setup = atmel_console_setup,
870 .flags = CON_PRINTBUFFER,
871 .index = -1,
872 .data = &atmel_uart,
875 #define ATMEL_CONSOLE_DEVICE &atmel_console
878 * Early console initialization (before VM subsystem initialized).
880 static int __init atmel_console_init(void)
882 if (atmel_default_console_device) {
883 add_preferred_console(ATMEL_DEVICENAME, atmel_default_console_device->id, NULL);
884 atmel_init_port(&(atmel_ports[atmel_default_console_device->id]), atmel_default_console_device);
885 register_console(&atmel_console);
888 return 0;
890 console_initcall(atmel_console_init);
893 * Late console initialization.
895 static int __init atmel_late_console_init(void)
897 if (atmel_default_console_device && !(atmel_console.flags & CON_ENABLED))
898 register_console(&atmel_console);
900 return 0;
902 core_initcall(atmel_late_console_init);
904 #else
905 #define ATMEL_CONSOLE_DEVICE NULL
906 #endif
908 static struct uart_driver atmel_uart = {
909 .owner = THIS_MODULE,
910 .driver_name = "atmel_serial",
911 .dev_name = ATMEL_DEVICENAME,
912 .major = SERIAL_ATMEL_MAJOR,
913 .minor = MINOR_START,
914 .nr = ATMEL_MAX_UART,
915 .cons = ATMEL_CONSOLE_DEVICE,
918 #ifdef CONFIG_PM
919 static int atmel_serial_suspend(struct platform_device *pdev, pm_message_t state)
921 struct uart_port *port = platform_get_drvdata(pdev);
922 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
924 if (device_may_wakeup(&pdev->dev) && !at91_suspend_entering_slow_clock())
925 enable_irq_wake(port->irq);
926 else {
927 uart_suspend_port(&atmel_uart, port);
928 atmel_port->suspended = 1;
931 return 0;
934 static int atmel_serial_resume(struct platform_device *pdev)
936 struct uart_port *port = platform_get_drvdata(pdev);
937 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
939 if (atmel_port->suspended) {
940 uart_resume_port(&atmel_uart, port);
941 atmel_port->suspended = 0;
943 else
944 disable_irq_wake(port->irq);
946 return 0;
948 #else
949 #define atmel_serial_suspend NULL
950 #define atmel_serial_resume NULL
951 #endif
953 static int __devinit atmel_serial_probe(struct platform_device *pdev)
955 struct atmel_uart_port *port;
956 int ret;
958 port = &atmel_ports[pdev->id];
959 atmel_init_port(port, pdev);
961 ret = uart_add_one_port(&atmel_uart, &port->uart);
962 if (!ret) {
963 device_init_wakeup(&pdev->dev, 1);
964 platform_set_drvdata(pdev, port);
967 return ret;
970 static int __devexit atmel_serial_remove(struct platform_device *pdev)
972 struct uart_port *port = platform_get_drvdata(pdev);
973 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
974 int ret = 0;
976 clk_disable(atmel_port->clk);
977 clk_put(atmel_port->clk);
979 device_init_wakeup(&pdev->dev, 0);
980 platform_set_drvdata(pdev, NULL);
982 if (port) {
983 ret = uart_remove_one_port(&atmel_uart, port);
984 kfree(port);
987 return ret;
990 static struct platform_driver atmel_serial_driver = {
991 .probe = atmel_serial_probe,
992 .remove = __devexit_p(atmel_serial_remove),
993 .suspend = atmel_serial_suspend,
994 .resume = atmel_serial_resume,
995 .driver = {
996 .name = "atmel_usart",
997 .owner = THIS_MODULE,
1001 static int __init atmel_serial_init(void)
1003 int ret;
1005 ret = uart_register_driver(&atmel_uart);
1006 if (ret)
1007 return ret;
1009 ret = platform_driver_register(&atmel_serial_driver);
1010 if (ret)
1011 uart_unregister_driver(&atmel_uart);
1013 return ret;
1016 static void __exit atmel_serial_exit(void)
1018 platform_driver_unregister(&atmel_serial_driver);
1019 uart_unregister_driver(&atmel_uart);
1022 module_init(atmel_serial_init);
1023 module_exit(atmel_serial_exit);
1025 MODULE_AUTHOR("Rick Bronson");
1026 MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
1027 MODULE_LICENSE("GPL");