2 * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
4 * Copyright (C) 2009 by Valentin Longchamp <valentin.longchamp@epfl.ch>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
21 #include <linux/module.h>
22 #include <linux/spinlock.h>
24 #include <linux/gpio.h>
25 #include <linux/kernel.h>
26 #include <mach/hardware.h>
27 #include <mach/gpio.h>
28 #include <mach/iomux-mx3.h>
31 * IOMUX register (base) addresses
33 #define IOMUX_BASE IO_ADDRESS(IOMUXC_BASE_ADDR)
34 #define IOMUXINT_OBS1 (IOMUX_BASE + 0x000)
35 #define IOMUXINT_OBS2 (IOMUX_BASE + 0x004)
36 #define IOMUXGPR (IOMUX_BASE + 0x008)
37 #define IOMUXSW_MUX_CTL (IOMUX_BASE + 0x00C)
38 #define IOMUXSW_PAD_CTL (IOMUX_BASE + 0x154)
40 static DEFINE_SPINLOCK(gpio_mux_lock
);
42 #define IOMUX_REG_MASK (IOMUX_PADNUM_MASK & ~0x3)
44 unsigned long mxc_pin_alloc_map
[NB_PORTS
* 32 / BITS_PER_LONG
];
46 * set the mode for a IOMUX pin.
48 int mxc_iomux_mode(unsigned int pin_mode
)
50 u32 field
, l
, mode
, ret
= 0;
53 reg
= IOMUXSW_MUX_CTL
+ (pin_mode
& IOMUX_REG_MASK
);
54 field
= pin_mode
& 0x3;
55 mode
= (pin_mode
& IOMUX_MODE_MASK
) >> IOMUX_MODE_SHIFT
;
57 spin_lock(&gpio_mux_lock
);
60 l
&= ~(0xff << (field
* 8));
61 l
|= mode
<< (field
* 8);
64 spin_unlock(&gpio_mux_lock
);
68 EXPORT_SYMBOL(mxc_iomux_mode
);
71 * This function configures the pad value for a IOMUX pin.
73 void mxc_iomux_set_pad(enum iomux_pins pin
, u32 config
)
78 pin
&= IOMUX_PADNUM_MASK
;
79 reg
= IOMUXSW_PAD_CTL
+ (pin
+ 2) / 3 * 4;
80 field
= (pin
+ 2) % 3;
82 pr_debug("%s: reg offset = 0x%x, field = %d\n",
83 __func__
, (pin
+ 2) / 3, field
);
85 spin_lock(&gpio_mux_lock
);
88 l
&= ~(0x1ff << (field
* 10));
89 l
|= config
<< (field
* 10);
92 spin_unlock(&gpio_mux_lock
);
94 EXPORT_SYMBOL(mxc_iomux_set_pad
);
97 * setups a single pin:
98 * - reserves the pin so that it is not claimed by another driver
99 * - setups the iomux according to the configuration
100 * - if the pin is configured as a GPIO, we claim it through kernel gpiolib
102 int mxc_iomux_setup_pin(const unsigned int pin
, const char *label
)
104 unsigned pad
= pin
& IOMUX_PADNUM_MASK
;
107 if (pad
>= (PIN_MAX
+ 1)) {
108 printk(KERN_ERR
"mxc_iomux: Attempt to request nonexistant pin %u for \"%s\"\n",
109 pad
, label
? label
: "?");
113 if (test_and_set_bit(pad
, mxc_pin_alloc_map
)) {
114 printk(KERN_ERR
"mxc_iomux: pin %u already used. Allocation for \"%s\" failed\n",
115 pad
, label
? label
: "?");
120 /* if we have a gpio, we can allocate it */
121 gpio
= (pin
& IOMUX_GPIONUM_MASK
) >> IOMUX_GPIONUM_SHIFT
;
122 if (gpio
< (GPIO_PORT_MAX
+ 1) * 32)
123 if (gpio_request(gpio
, label
))
128 EXPORT_SYMBOL(mxc_iomux_setup_pin
);
130 int mxc_iomux_setup_multiple_pins(unsigned int *pin_list
, unsigned count
,
133 unsigned int *p
= pin_list
;
137 for (i
= 0; i
< count
; i
++) {
138 if (mxc_iomux_setup_pin(*p
, label
))
145 mxc_iomux_release_multiple_pins(pin_list
, i
);
148 EXPORT_SYMBOL(mxc_iomux_setup_multiple_pins
);
150 void mxc_iomux_release_pin(const unsigned int pin
)
152 unsigned pad
= pin
& IOMUX_PADNUM_MASK
;
155 if (pad
< (PIN_MAX
+ 1))
156 clear_bit(pad
, mxc_pin_alloc_map
);
158 gpio
= (pin
& IOMUX_GPIONUM_MASK
) >> IOMUX_GPIONUM_SHIFT
;
159 if (gpio
< (GPIO_PORT_MAX
+ 1) * 32)
162 EXPORT_SYMBOL(mxc_iomux_release_pin
);
164 void mxc_iomux_release_multiple_pins(unsigned int *pin_list
, int count
)
166 unsigned int *p
= pin_list
;
169 for (i
= 0; i
< count
; i
++) {
170 mxc_iomux_release_pin(*p
);
174 EXPORT_SYMBOL(mxc_iomux_release_multiple_pins
);
177 * This function enables/disables the general purpose function for a particular
180 void mxc_iomux_set_gpr(enum iomux_gp_func gp
, bool en
)
184 spin_lock(&gpio_mux_lock
);
185 l
= __raw_readl(IOMUXGPR
);
191 __raw_writel(l
, IOMUXGPR
);
192 spin_unlock(&gpio_mux_lock
);
194 EXPORT_SYMBOL(mxc_iomux_set_gpr
);