2 * Intel Multiprocessor Specification 1.1 and 1.4
3 * compliant MP-table parsing routines.
5 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
6 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
9 * Erich Boleyn : MP v1.4 and additional changes.
10 * Alan Cox : Added EBDA scanning
11 * Ingo Molnar : various cleanups and rewrites
12 * Maciej W. Rozycki: Bits for default MP configurations
13 * Paul Diefenbaugh: Added full ACPI support
17 #include <linux/irq.h>
18 #include <linux/init.h>
19 #include <linux/acpi.h>
20 #include <linux/delay.h>
21 #include <linux/config.h>
22 #include <linux/bootmem.h>
23 #include <linux/smp_lock.h>
24 #include <linux/kernel_stat.h>
25 #include <linux/mc146818rtc.h>
26 #include <linux/bitops.h>
31 #include <asm/mpspec.h>
32 #include <asm/io_apic.h>
34 #include <mach_apic.h>
35 #include <mach_mpparse.h>
36 #include <bios_ebda.h>
38 /* Have we found an MP table */
40 unsigned int __initdata maxcpus
= NR_CPUS
;
43 * Various Linux-internal data structures created from the
46 int apic_version
[MAX_APICS
];
47 int mp_bus_id_to_type
[MAX_MP_BUSSES
];
48 int mp_bus_id_to_node
[MAX_MP_BUSSES
];
49 int mp_bus_id_to_local
[MAX_MP_BUSSES
];
50 int quad_local_to_mp_bus_id
[NR_CPUS
/4][4];
51 int mp_bus_id_to_pci_bus
[MAX_MP_BUSSES
] = { [0 ... MAX_MP_BUSSES
-1] = -1 };
52 static int mp_current_pci_id
;
54 /* I/O APIC entries */
55 struct mpc_config_ioapic mp_ioapics
[MAX_IO_APICS
];
57 /* # of MP IRQ source entries */
58 struct mpc_config_intsrc mp_irqs
[MAX_IRQ_SOURCES
];
60 /* MP IRQ source entries */
66 unsigned long mp_lapic_addr
;
68 unsigned int def_to_bigsmp
= 0;
70 /* Processor that is doing the boot up */
71 unsigned int boot_cpu_physical_apicid
= -1U;
72 /* Internal processor count */
73 static unsigned int __initdata num_processors
;
75 /* Bitmask of physically existing CPUs */
76 physid_mask_t phys_cpu_present_map
;
78 u8 bios_cpu_apicid
[NR_CPUS
] = { [0 ... NR_CPUS
-1] = BAD_APICID
};
81 * Intel MP BIOS table parsing routines:
86 * Checksum an MP configuration block.
89 static int __init
mpf_checksum(unsigned char *mp
, int len
)
100 * Have to match translation table entries to main table entries by counter
101 * hence the mpc_record variable .... can't see a less disgusting way of
105 static int mpc_record
;
106 static struct mpc_config_translation
*translation_table
[MAX_MPC_ENTRY
] __initdata
;
108 #ifdef CONFIG_X86_NUMAQ
109 static int MP_valid_apicid(int apicid
, int version
)
111 return hweight_long(apicid
& 0xf) == 1 && (apicid
>> 4) != 0xf;
114 static int MP_valid_apicid(int apicid
, int version
)
117 return apicid
< 0xff;
123 static void __init
MP_processor_info (struct mpc_config_processor
*m
)
125 int ver
, apicid
, cpu
, found_bsp
= 0;
128 if (!(m
->mpc_cpuflag
& CPU_ENABLED
))
131 apicid
= mpc_apic_id(m
, translation_table
[mpc_record
]);
133 if (m
->mpc_featureflag
&(1<<0))
134 Dprintk(" Floating point unit present.\n");
135 if (m
->mpc_featureflag
&(1<<7))
136 Dprintk(" Machine Exception supported.\n");
137 if (m
->mpc_featureflag
&(1<<8))
138 Dprintk(" 64 bit compare & exchange supported.\n");
139 if (m
->mpc_featureflag
&(1<<9))
140 Dprintk(" Internal APIC present.\n");
141 if (m
->mpc_featureflag
&(1<<11))
142 Dprintk(" SEP present.\n");
143 if (m
->mpc_featureflag
&(1<<12))
144 Dprintk(" MTRR present.\n");
145 if (m
->mpc_featureflag
&(1<<13))
146 Dprintk(" PGE present.\n");
147 if (m
->mpc_featureflag
&(1<<14))
148 Dprintk(" MCA present.\n");
149 if (m
->mpc_featureflag
&(1<<15))
150 Dprintk(" CMOV present.\n");
151 if (m
->mpc_featureflag
&(1<<16))
152 Dprintk(" PAT present.\n");
153 if (m
->mpc_featureflag
&(1<<17))
154 Dprintk(" PSE present.\n");
155 if (m
->mpc_featureflag
&(1<<18))
156 Dprintk(" PSN present.\n");
157 if (m
->mpc_featureflag
&(1<<19))
158 Dprintk(" Cache Line Flush Instruction present.\n");
160 if (m
->mpc_featureflag
&(1<<21))
161 Dprintk(" Debug Trace and EMON Store present.\n");
162 if (m
->mpc_featureflag
&(1<<22))
163 Dprintk(" ACPI Thermal Throttle Registers present.\n");
164 if (m
->mpc_featureflag
&(1<<23))
165 Dprintk(" MMX present.\n");
166 if (m
->mpc_featureflag
&(1<<24))
167 Dprintk(" FXSR present.\n");
168 if (m
->mpc_featureflag
&(1<<25))
169 Dprintk(" XMM present.\n");
170 if (m
->mpc_featureflag
&(1<<26))
171 Dprintk(" Willamette New Instructions present.\n");
172 if (m
->mpc_featureflag
&(1<<27))
173 Dprintk(" Self Snoop present.\n");
174 if (m
->mpc_featureflag
&(1<<28))
175 Dprintk(" HT present.\n");
176 if (m
->mpc_featureflag
&(1<<29))
177 Dprintk(" Thermal Monitor present.\n");
178 /* 30, 31 Reserved */
181 if (m
->mpc_cpuflag
& CPU_BOOTPROCESSOR
) {
182 Dprintk(" Bootup CPU\n");
183 boot_cpu_physical_apicid
= m
->mpc_apicid
;
187 if (num_processors
>= NR_CPUS
) {
188 printk(KERN_WARNING
"WARNING: NR_CPUS limit of %i reached."
189 " Processor ignored.\n", NR_CPUS
);
193 if (num_processors
>= maxcpus
) {
194 printk(KERN_WARNING
"WARNING: maxcpus limit of %i reached."
195 " Processor ignored.\n", maxcpus
);
199 ver
= m
->mpc_apicver
;
201 if (!MP_valid_apicid(apicid
, ver
)) {
202 printk(KERN_WARNING
"Processor #%d INVALID. (Max ID: %d).\n",
203 m
->mpc_apicid
, MAX_APICS
);
211 cpu
= num_processors
- 1;
212 cpu_set(cpu
, cpu_possible_map
);
213 tmp
= apicid_to_cpu_present(apicid
);
214 physids_or(phys_cpu_present_map
, phys_cpu_present_map
, tmp
);
220 printk(KERN_WARNING
"BIOS bug, APIC version is 0 for CPU#%d! fixing up to 0x10. (tell your hw vendor)\n", m
->mpc_apicid
);
223 apic_version
[m
->mpc_apicid
] = ver
;
224 if ((num_processors
> 8) &&
226 (boot_cpu_data
.x86_vendor
== X86_VENDOR_INTEL
))
231 bios_cpu_apicid
[num_processors
- 1] = m
->mpc_apicid
;
234 static void __init
MP_bus_info (struct mpc_config_bus
*m
)
238 memcpy(str
, m
->mpc_bustype
, 6);
241 mpc_oem_bus_info(m
, str
, translation_table
[mpc_record
]);
243 if (strncmp(str
, BUSTYPE_ISA
, sizeof(BUSTYPE_ISA
)-1) == 0) {
244 mp_bus_id_to_type
[m
->mpc_busid
] = MP_BUS_ISA
;
245 } else if (strncmp(str
, BUSTYPE_EISA
, sizeof(BUSTYPE_EISA
)-1) == 0) {
246 mp_bus_id_to_type
[m
->mpc_busid
] = MP_BUS_EISA
;
247 } else if (strncmp(str
, BUSTYPE_PCI
, sizeof(BUSTYPE_PCI
)-1) == 0) {
248 mpc_oem_pci_bus(m
, translation_table
[mpc_record
]);
249 mp_bus_id_to_type
[m
->mpc_busid
] = MP_BUS_PCI
;
250 mp_bus_id_to_pci_bus
[m
->mpc_busid
] = mp_current_pci_id
;
252 } else if (strncmp(str
, BUSTYPE_MCA
, sizeof(BUSTYPE_MCA
)-1) == 0) {
253 mp_bus_id_to_type
[m
->mpc_busid
] = MP_BUS_MCA
;
254 } else if (strncmp(str
, BUSTYPE_NEC98
, sizeof(BUSTYPE_NEC98
)-1) == 0) {
255 mp_bus_id_to_type
[m
->mpc_busid
] = MP_BUS_NEC98
;
257 printk(KERN_WARNING
"Unknown bustype %s - ignoring\n", str
);
261 static void __init
MP_ioapic_info (struct mpc_config_ioapic
*m
)
263 if (!(m
->mpc_flags
& MPC_APIC_USABLE
))
266 printk(KERN_INFO
"I/O APIC #%d Version %d at 0x%lX.\n",
267 m
->mpc_apicid
, m
->mpc_apicver
, m
->mpc_apicaddr
);
268 if (nr_ioapics
>= MAX_IO_APICS
) {
269 printk(KERN_CRIT
"Max # of I/O APICs (%d) exceeded (found %d).\n",
270 MAX_IO_APICS
, nr_ioapics
);
271 panic("Recompile kernel with bigger MAX_IO_APICS!.\n");
273 if (!m
->mpc_apicaddr
) {
274 printk(KERN_ERR
"WARNING: bogus zero I/O APIC address"
275 " found in MP table, skipping!\n");
278 mp_ioapics
[nr_ioapics
] = *m
;
282 static void __init
MP_intsrc_info (struct mpc_config_intsrc
*m
)
284 mp_irqs
[mp_irq_entries
] = *m
;
285 Dprintk("Int: type %d, pol %d, trig %d, bus %d,"
286 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
287 m
->mpc_irqtype
, m
->mpc_irqflag
& 3,
288 (m
->mpc_irqflag
>> 2) & 3, m
->mpc_srcbus
,
289 m
->mpc_srcbusirq
, m
->mpc_dstapic
, m
->mpc_dstirq
);
290 if (++mp_irq_entries
== MAX_IRQ_SOURCES
)
291 panic("Max # of irq sources exceeded!!\n");
294 static void __init
MP_lintsrc_info (struct mpc_config_lintsrc
*m
)
296 Dprintk("Lint: type %d, pol %d, trig %d, bus %d,"
297 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
298 m
->mpc_irqtype
, m
->mpc_irqflag
& 3,
299 (m
->mpc_irqflag
>> 2) &3, m
->mpc_srcbusid
,
300 m
->mpc_srcbusirq
, m
->mpc_destapic
, m
->mpc_destapiclint
);
302 * Well it seems all SMP boards in existence
303 * use ExtINT/LVT1 == LINT0 and
304 * NMI/LVT2 == LINT1 - the following check
305 * will show us if this assumptions is false.
306 * Until then we do not have to add baggage.
308 if ((m
->mpc_irqtype
== mp_ExtINT
) &&
309 (m
->mpc_destapiclint
!= 0))
311 if ((m
->mpc_irqtype
== mp_NMI
) &&
312 (m
->mpc_destapiclint
!= 1))
316 #ifdef CONFIG_X86_NUMAQ
317 static void __init
MP_translation_info (struct mpc_config_translation
*m
)
319 printk(KERN_INFO
"Translation: record %d, type %d, quad %d, global %d, local %d\n", mpc_record
, m
->trans_type
, m
->trans_quad
, m
->trans_global
, m
->trans_local
);
321 if (mpc_record
>= MAX_MPC_ENTRY
)
322 printk(KERN_ERR
"MAX_MPC_ENTRY exceeded!\n");
324 translation_table
[mpc_record
] = m
; /* stash this for later */
325 if (m
->trans_quad
< MAX_NUMNODES
&& !node_online(m
->trans_quad
))
326 node_set_online(m
->trans_quad
);
330 * Read/parse the MPC oem tables
333 static void __init
smp_read_mpc_oem(struct mp_config_oemtable
*oemtable
, \
334 unsigned short oemsize
)
336 int count
= sizeof (*oemtable
); /* the header size */
337 unsigned char *oemptr
= ((unsigned char *)oemtable
)+count
;
340 printk(KERN_INFO
"Found an OEM MPC table at %8p - parsing it ... \n", oemtable
);
341 if (memcmp(oemtable
->oem_signature
,MPC_OEM_SIGNATURE
,4))
343 printk(KERN_WARNING
"SMP mpc oemtable: bad signature [%c%c%c%c]!\n",
344 oemtable
->oem_signature
[0],
345 oemtable
->oem_signature
[1],
346 oemtable
->oem_signature
[2],
347 oemtable
->oem_signature
[3]);
350 if (mpf_checksum((unsigned char *)oemtable
,oemtable
->oem_length
))
352 printk(KERN_WARNING
"SMP oem mptable: checksum error!\n");
355 while (count
< oemtable
->oem_length
) {
359 struct mpc_config_translation
*m
=
360 (struct mpc_config_translation
*)oemptr
;
361 MP_translation_info(m
);
362 oemptr
+= sizeof(*m
);
369 printk(KERN_WARNING
"Unrecognised OEM table entry type! - %d\n", (int) *oemptr
);
376 static inline void mps_oem_check(struct mp_config_table
*mpc
, char *oem
,
379 if (strncmp(oem
, "IBM NUMA", 8))
380 printk("Warning! May not be a NUMA-Q system!\n");
382 smp_read_mpc_oem((struct mp_config_oemtable
*) mpc
->mpc_oemptr
,
385 #endif /* CONFIG_X86_NUMAQ */
391 static int __init
smp_read_mpc(struct mp_config_table
*mpc
)
395 int count
=sizeof(*mpc
);
396 unsigned char *mpt
=((unsigned char *)mpc
)+count
;
398 if (memcmp(mpc
->mpc_signature
,MPC_SIGNATURE
,4)) {
399 printk(KERN_ERR
"SMP mptable: bad signature [0x%x]!\n",
400 *(u32
*)mpc
->mpc_signature
);
403 if (mpf_checksum((unsigned char *)mpc
,mpc
->mpc_length
)) {
404 printk(KERN_ERR
"SMP mptable: checksum error!\n");
407 if (mpc
->mpc_spec
!=0x01 && mpc
->mpc_spec
!=0x04) {
408 printk(KERN_ERR
"SMP mptable: bad table version (%d)!!\n",
412 if (!mpc
->mpc_lapic
) {
413 printk(KERN_ERR
"SMP mptable: null local APIC address!\n");
416 memcpy(oem
,mpc
->mpc_oem
,8);
418 printk(KERN_INFO
"OEM ID: %s ",oem
);
420 memcpy(str
,mpc
->mpc_productid
,12);
422 printk("Product ID: %s ",str
);
424 mps_oem_check(mpc
, oem
, str
);
426 printk("APIC at: 0x%lX\n",mpc
->mpc_lapic
);
429 * Save the local APIC address (it might be non-default) -- but only
430 * if we're not using ACPI.
433 mp_lapic_addr
= mpc
->mpc_lapic
;
436 * Now process the configuration blocks.
439 while (count
< mpc
->mpc_length
) {
443 struct mpc_config_processor
*m
=
444 (struct mpc_config_processor
*)mpt
;
445 /* ACPI may have already provided this data */
447 MP_processor_info(m
);
454 struct mpc_config_bus
*m
=
455 (struct mpc_config_bus
*)mpt
;
463 struct mpc_config_ioapic
*m
=
464 (struct mpc_config_ioapic
*)mpt
;
472 struct mpc_config_intsrc
*m
=
473 (struct mpc_config_intsrc
*)mpt
;
482 struct mpc_config_lintsrc
*m
=
483 (struct mpc_config_lintsrc
*)mpt
;
491 count
= mpc
->mpc_length
;
497 clustered_apic_check();
499 printk(KERN_ERR
"SMP mptable: no processors registered!\n");
500 return num_processors
;
503 static int __init
ELCR_trigger(unsigned int irq
)
507 port
= 0x4d0 + (irq
>> 3);
508 return (inb(port
) >> (irq
& 7)) & 1;
511 static void __init
construct_default_ioirq_mptable(int mpc_default_type
)
513 struct mpc_config_intsrc intsrc
;
515 int ELCR_fallback
= 0;
517 intsrc
.mpc_type
= MP_INTSRC
;
518 intsrc
.mpc_irqflag
= 0; /* conforming */
519 intsrc
.mpc_srcbus
= 0;
520 intsrc
.mpc_dstapic
= mp_ioapics
[0].mpc_apicid
;
522 intsrc
.mpc_irqtype
= mp_INT
;
525 * If true, we have an ISA/PCI system with no IRQ entries
526 * in the MP table. To prevent the PCI interrupts from being set up
527 * incorrectly, we try to use the ELCR. The sanity check to see if
528 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
529 * never be level sensitive, so we simply see if the ELCR agrees.
530 * If it does, we assume it's valid.
532 if (mpc_default_type
== 5) {
533 printk(KERN_INFO
"ISA/PCI bus type with no IRQ information... falling back to ELCR\n");
535 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) || ELCR_trigger(13))
536 printk(KERN_WARNING
"ELCR contains invalid data... not using ELCR\n");
538 printk(KERN_INFO
"Using ELCR to identify PCI interrupts\n");
543 for (i
= 0; i
< 16; i
++) {
544 switch (mpc_default_type
) {
546 if (i
== 0 || i
== 13)
547 continue; /* IRQ0 & IRQ13 not connected */
551 continue; /* IRQ2 is never connected */
556 * If the ELCR indicates a level-sensitive interrupt, we
557 * copy that information over to the MP table in the
558 * irqflag field (level sensitive, active high polarity).
561 intsrc
.mpc_irqflag
= 13;
563 intsrc
.mpc_irqflag
= 0;
566 intsrc
.mpc_srcbusirq
= i
;
567 intsrc
.mpc_dstirq
= i
? i
: 2; /* IRQ0 to INTIN2 */
568 MP_intsrc_info(&intsrc
);
571 intsrc
.mpc_irqtype
= mp_ExtINT
;
572 intsrc
.mpc_srcbusirq
= 0;
573 intsrc
.mpc_dstirq
= 0; /* 8259A to INTIN0 */
574 MP_intsrc_info(&intsrc
);
577 static inline void __init
construct_default_ISA_mptable(int mpc_default_type
)
579 struct mpc_config_processor processor
;
580 struct mpc_config_bus bus
;
581 struct mpc_config_ioapic ioapic
;
582 struct mpc_config_lintsrc lintsrc
;
583 int linttypes
[2] = { mp_ExtINT
, mp_NMI
};
587 * local APIC has default address
589 mp_lapic_addr
= APIC_DEFAULT_PHYS_BASE
;
592 * 2 CPUs, numbered 0 & 1.
594 processor
.mpc_type
= MP_PROCESSOR
;
595 /* Either an integrated APIC or a discrete 82489DX. */
596 processor
.mpc_apicver
= mpc_default_type
> 4 ? 0x10 : 0x01;
597 processor
.mpc_cpuflag
= CPU_ENABLED
;
598 processor
.mpc_cpufeature
= (boot_cpu_data
.x86
<< 8) |
599 (boot_cpu_data
.x86_model
<< 4) |
600 boot_cpu_data
.x86_mask
;
601 processor
.mpc_featureflag
= boot_cpu_data
.x86_capability
[0];
602 processor
.mpc_reserved
[0] = 0;
603 processor
.mpc_reserved
[1] = 0;
604 for (i
= 0; i
< 2; i
++) {
605 processor
.mpc_apicid
= i
;
606 MP_processor_info(&processor
);
609 bus
.mpc_type
= MP_BUS
;
611 switch (mpc_default_type
) {
614 printk(KERN_ERR
"Unknown standard configuration %d\n",
619 memcpy(bus
.mpc_bustype
, "ISA ", 6);
624 memcpy(bus
.mpc_bustype
, "EISA ", 6);
628 memcpy(bus
.mpc_bustype
, "MCA ", 6);
631 if (mpc_default_type
> 4) {
633 memcpy(bus
.mpc_bustype
, "PCI ", 6);
637 ioapic
.mpc_type
= MP_IOAPIC
;
638 ioapic
.mpc_apicid
= 2;
639 ioapic
.mpc_apicver
= mpc_default_type
> 4 ? 0x10 : 0x01;
640 ioapic
.mpc_flags
= MPC_APIC_USABLE
;
641 ioapic
.mpc_apicaddr
= 0xFEC00000;
642 MP_ioapic_info(&ioapic
);
645 * We set up most of the low 16 IO-APIC pins according to MPS rules.
647 construct_default_ioirq_mptable(mpc_default_type
);
649 lintsrc
.mpc_type
= MP_LINTSRC
;
650 lintsrc
.mpc_irqflag
= 0; /* conforming */
651 lintsrc
.mpc_srcbusid
= 0;
652 lintsrc
.mpc_srcbusirq
= 0;
653 lintsrc
.mpc_destapic
= MP_APIC_ALL
;
654 for (i
= 0; i
< 2; i
++) {
655 lintsrc
.mpc_irqtype
= linttypes
[i
];
656 lintsrc
.mpc_destapiclint
= i
;
657 MP_lintsrc_info(&lintsrc
);
661 static struct intel_mp_floating
*mpf_found
;
664 * Scan the memory blocks for an SMP configuration block.
666 void __init
get_smp_config (void)
668 struct intel_mp_floating
*mpf
= mpf_found
;
671 * ACPI supports both logical (e.g. Hyper-Threading) and physical
672 * processors, where MPS only supports physical.
674 if (acpi_lapic
&& acpi_ioapic
) {
675 printk(KERN_INFO
"Using ACPI (MADT) for SMP configuration information\n");
679 printk(KERN_INFO
"Using ACPI for processor (LAPIC) configuration information\n");
681 printk(KERN_INFO
"Intel MultiProcessor Specification v1.%d\n", mpf
->mpf_specification
);
682 if (mpf
->mpf_feature2
& (1<<7)) {
683 printk(KERN_INFO
" IMCR and PIC compatibility mode.\n");
686 printk(KERN_INFO
" Virtual Wire compatibility mode.\n");
691 * Now see if we need to read further.
693 if (mpf
->mpf_feature1
!= 0) {
695 printk(KERN_INFO
"Default MP configuration #%d\n", mpf
->mpf_feature1
);
696 construct_default_ISA_mptable(mpf
->mpf_feature1
);
698 } else if (mpf
->mpf_physptr
) {
701 * Read the physical hardware table. Anything here will
702 * override the defaults.
704 if (!smp_read_mpc((void *)mpf
->mpf_physptr
)) {
705 smp_found_config
= 0;
706 printk(KERN_ERR
"BIOS bug, MP table errors detected!...\n");
707 printk(KERN_ERR
"... disabling SMP support. (tell your hw vendor)\n");
711 * If there are no explicit MP IRQ entries, then we are
712 * broken. We set up most of the low 16 IO-APIC pins to
713 * ISA defaults and hope it will work.
715 if (!mp_irq_entries
) {
716 struct mpc_config_bus bus
;
718 printk(KERN_ERR
"BIOS bug, no explicit IRQ entries, using default mptable. (tell your hw vendor)\n");
720 bus
.mpc_type
= MP_BUS
;
722 memcpy(bus
.mpc_bustype
, "ISA ", 6);
725 construct_default_ioirq_mptable(0);
731 printk(KERN_INFO
"Processors: %d\n", num_processors
);
733 * Only use the first configuration found.
737 static int __init
smp_scan_config (unsigned long base
, unsigned long length
)
739 unsigned long *bp
= phys_to_virt(base
);
740 struct intel_mp_floating
*mpf
;
742 Dprintk("Scan SMP from %p for %ld bytes.\n", bp
,length
);
743 if (sizeof(*mpf
) != 16)
744 printk("Error: MPF size\n");
747 mpf
= (struct intel_mp_floating
*)bp
;
748 if ((*bp
== SMP_MAGIC_IDENT
) &&
749 (mpf
->mpf_length
== 1) &&
750 !mpf_checksum((unsigned char *)bp
, 16) &&
751 ((mpf
->mpf_specification
== 1)
752 || (mpf
->mpf_specification
== 4)) ) {
754 smp_found_config
= 1;
755 printk(KERN_INFO
"found SMP MP-table at %08lx\n",
757 reserve_bootmem(virt_to_phys(mpf
), PAGE_SIZE
);
758 if (mpf
->mpf_physptr
) {
760 * We cannot access to MPC table to compute
761 * table size yet, as only few megabytes from
762 * the bottom is mapped now.
763 * PC-9800's MPC table places on the very last
764 * of physical memory; so that simply reserving
765 * PAGE_SIZE from mpg->mpf_physptr yields BUG()
766 * in reserve_bootmem.
768 unsigned long size
= PAGE_SIZE
;
769 unsigned long end
= max_low_pfn
* PAGE_SIZE
;
770 if (mpf
->mpf_physptr
+ size
> end
)
771 size
= end
- mpf
->mpf_physptr
;
772 reserve_bootmem(mpf
->mpf_physptr
, size
);
784 void __init
find_smp_config (void)
786 unsigned int address
;
789 * FIXME: Linux assumes you have 640K of base ram..
790 * this continues the error...
792 * 1) Scan the bottom 1K for a signature
793 * 2) Scan the top 1K of base RAM
794 * 3) Scan the 64K of bios
796 if (smp_scan_config(0x0,0x400) ||
797 smp_scan_config(639*0x400,0x400) ||
798 smp_scan_config(0xF0000,0x10000))
801 * If it is an SMP machine we should know now, unless the
802 * configuration is in an EISA/MCA bus machine with an
803 * extended bios data area.
805 * there is a real-mode segmented pointer pointing to the
806 * 4K EBDA area at 0x40E, calculate and scan it here.
808 * NOTE! There are Linux loaders that will corrupt the EBDA
809 * area, and as such this kind of SMP config may be less
810 * trustworthy, simply because the SMP table may have been
811 * stomped on during early boot. These loaders are buggy and
814 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
817 address
= get_bios_ebda();
819 smp_scan_config(address
, 0x400);
822 /* --------------------------------------------------------------------------
823 ACPI-based MP Configuration
824 -------------------------------------------------------------------------- */
828 void __init
mp_register_lapic_address (
831 mp_lapic_addr
= (unsigned long) address
;
833 set_fixmap_nocache(FIX_APIC_BASE
, mp_lapic_addr
);
835 if (boot_cpu_physical_apicid
== -1U)
836 boot_cpu_physical_apicid
= GET_APIC_ID(apic_read(APIC_ID
));
838 Dprintk("Boot CPU = %d\n", boot_cpu_physical_apicid
);
842 void __init
mp_register_lapic (
846 struct mpc_config_processor processor
;
849 if (MAX_APICS
- id
<= 0) {
850 printk(KERN_WARNING
"Processor #%d invalid (max %d)\n",
855 if (id
== boot_cpu_physical_apicid
)
858 processor
.mpc_type
= MP_PROCESSOR
;
859 processor
.mpc_apicid
= id
;
860 processor
.mpc_apicver
= GET_APIC_VERSION(apic_read(APIC_LVR
));
861 processor
.mpc_cpuflag
= (enabled
? CPU_ENABLED
: 0);
862 processor
.mpc_cpuflag
|= (boot_cpu
? CPU_BOOTPROCESSOR
: 0);
863 processor
.mpc_cpufeature
= (boot_cpu_data
.x86
<< 8) |
864 (boot_cpu_data
.x86_model
<< 4) | boot_cpu_data
.x86_mask
;
865 processor
.mpc_featureflag
= boot_cpu_data
.x86_capability
[0];
866 processor
.mpc_reserved
[0] = 0;
867 processor
.mpc_reserved
[1] = 0;
869 MP_processor_info(&processor
);
872 #ifdef CONFIG_X86_IO_APIC
875 #define MP_MAX_IOAPIC_PIN 127
877 static struct mp_ioapic_routing
{
881 u32 pin_programmed
[4];
882 } mp_ioapic_routing
[MAX_IO_APICS
];
885 static int mp_find_ioapic (
890 /* Find the IOAPIC that manages this GSI. */
891 for (i
= 0; i
< nr_ioapics
; i
++) {
892 if ((gsi
>= mp_ioapic_routing
[i
].gsi_base
)
893 && (gsi
<= mp_ioapic_routing
[i
].gsi_end
))
897 printk(KERN_ERR
"ERROR: Unable to locate IOAPIC for GSI %d\n", gsi
);
903 void __init
mp_register_ioapic (
910 if (nr_ioapics
>= MAX_IO_APICS
) {
911 printk(KERN_ERR
"ERROR: Max # of I/O APICs (%d) exceeded "
912 "(found %d)\n", MAX_IO_APICS
, nr_ioapics
);
913 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
916 printk(KERN_ERR
"WARNING: Bogus (zero) I/O APIC address"
917 " found in MADT table, skipping!\n");
923 mp_ioapics
[idx
].mpc_type
= MP_IOAPIC
;
924 mp_ioapics
[idx
].mpc_flags
= MPC_APIC_USABLE
;
925 mp_ioapics
[idx
].mpc_apicaddr
= address
;
927 set_fixmap_nocache(FIX_IO_APIC_BASE_0
+ idx
, address
);
928 if ((boot_cpu_data
.x86_vendor
== X86_VENDOR_INTEL
) && (boot_cpu_data
.x86
< 15))
929 mp_ioapics
[idx
].mpc_apicid
= io_apic_get_unique_id(idx
, id
);
931 mp_ioapics
[idx
].mpc_apicid
= id
;
932 mp_ioapics
[idx
].mpc_apicver
= io_apic_get_version(idx
);
935 * Build basic GSI lookup table to facilitate gsi->io_apic lookups
936 * and to prevent reprogramming of IOAPIC pins (PCI GSIs).
938 mp_ioapic_routing
[idx
].apic_id
= mp_ioapics
[idx
].mpc_apicid
;
939 mp_ioapic_routing
[idx
].gsi_base
= gsi_base
;
940 mp_ioapic_routing
[idx
].gsi_end
= gsi_base
+
941 io_apic_get_redir_entries(idx
);
943 printk("IOAPIC[%d]: apic_id %d, version %d, address 0x%lx, "
944 "GSI %d-%d\n", idx
, mp_ioapics
[idx
].mpc_apicid
,
945 mp_ioapics
[idx
].mpc_apicver
, mp_ioapics
[idx
].mpc_apicaddr
,
946 mp_ioapic_routing
[idx
].gsi_base
,
947 mp_ioapic_routing
[idx
].gsi_end
);
953 void __init
mp_override_legacy_irq (
959 struct mpc_config_intsrc intsrc
;
964 * Convert 'gsi' to 'ioapic.pin'.
966 ioapic
= mp_find_ioapic(gsi
);
969 pin
= gsi
- mp_ioapic_routing
[ioapic
].gsi_base
;
972 * TBD: This check is for faulty timer entries, where the override
973 * erroneously sets the trigger to level, resulting in a HUGE
974 * increase of timer interrupts!
976 if ((bus_irq
== 0) && (trigger
== 3))
979 intsrc
.mpc_type
= MP_INTSRC
;
980 intsrc
.mpc_irqtype
= mp_INT
;
981 intsrc
.mpc_irqflag
= (trigger
<< 2) | polarity
;
982 intsrc
.mpc_srcbus
= MP_ISA_BUS
;
983 intsrc
.mpc_srcbusirq
= bus_irq
; /* IRQ */
984 intsrc
.mpc_dstapic
= mp_ioapics
[ioapic
].mpc_apicid
; /* APIC ID */
985 intsrc
.mpc_dstirq
= pin
; /* INTIN# */
987 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, %d-%d\n",
988 intsrc
.mpc_irqtype
, intsrc
.mpc_irqflag
& 3,
989 (intsrc
.mpc_irqflag
>> 2) & 3, intsrc
.mpc_srcbus
,
990 intsrc
.mpc_srcbusirq
, intsrc
.mpc_dstapic
, intsrc
.mpc_dstirq
);
992 mp_irqs
[mp_irq_entries
] = intsrc
;
993 if (++mp_irq_entries
== MAX_IRQ_SOURCES
)
994 panic("Max # of irq sources exceeded!\n");
1001 void __init
mp_config_acpi_legacy_irqs (void)
1003 struct mpc_config_intsrc intsrc
;
1008 * Fabricate the legacy ISA bus (bus #31).
1010 mp_bus_id_to_type
[MP_ISA_BUS
] = MP_BUS_ISA
;
1011 Dprintk("Bus #%d is ISA\n", MP_ISA_BUS
);
1014 * Older generations of ES7000 have no legacy identity mappings
1016 if (es7000_plat
== 1)
1020 * Locate the IOAPIC that manages the ISA IRQs (0-15).
1022 ioapic
= mp_find_ioapic(0);
1026 intsrc
.mpc_type
= MP_INTSRC
;
1027 intsrc
.mpc_irqflag
= 0; /* Conforming */
1028 intsrc
.mpc_srcbus
= MP_ISA_BUS
;
1029 intsrc
.mpc_dstapic
= mp_ioapics
[ioapic
].mpc_apicid
;
1032 * Use the default configuration for the IRQs 0-15. Unless
1033 * overriden by (MADT) interrupt source override entries.
1035 for (i
= 0; i
< 16; i
++) {
1038 for (idx
= 0; idx
< mp_irq_entries
; idx
++) {
1039 struct mpc_config_intsrc
*irq
= mp_irqs
+ idx
;
1041 /* Do we already have a mapping for this ISA IRQ? */
1042 if (irq
->mpc_srcbus
== MP_ISA_BUS
&& irq
->mpc_srcbusirq
== i
)
1045 /* Do we already have a mapping for this IOAPIC pin */
1046 if ((irq
->mpc_dstapic
== intsrc
.mpc_dstapic
) &&
1047 (irq
->mpc_dstirq
== i
))
1051 if (idx
!= mp_irq_entries
) {
1052 printk(KERN_DEBUG
"ACPI: IRQ%d used by override.\n", i
);
1053 continue; /* IRQ already used */
1056 intsrc
.mpc_irqtype
= mp_INT
;
1057 intsrc
.mpc_srcbusirq
= i
; /* Identity mapped */
1058 intsrc
.mpc_dstirq
= i
;
1060 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, "
1061 "%d-%d\n", intsrc
.mpc_irqtype
, intsrc
.mpc_irqflag
& 3,
1062 (intsrc
.mpc_irqflag
>> 2) & 3, intsrc
.mpc_srcbus
,
1063 intsrc
.mpc_srcbusirq
, intsrc
.mpc_dstapic
,
1066 mp_irqs
[mp_irq_entries
] = intsrc
;
1067 if (++mp_irq_entries
== MAX_IRQ_SOURCES
)
1068 panic("Max # of irq sources exceeded!\n");
1072 #define MAX_GSI_NUM 4096
1074 int mp_register_gsi (u32 gsi
, int edge_level
, int active_high_low
)
1079 static int pci_irq
= 16;
1081 * Mapping between Global System Interrups, which
1082 * represent all possible interrupts, and IRQs
1083 * assigned to actual devices.
1085 static int gsi_to_irq
[MAX_GSI_NUM
];
1087 /* Don't set up the ACPI SCI because it's already set up */
1088 if (acpi_fadt
.sci_int
== gsi
)
1091 ioapic
= mp_find_ioapic(gsi
);
1093 printk(KERN_WARNING
"No IOAPIC for GSI %u\n", gsi
);
1097 ioapic_pin
= gsi
- mp_ioapic_routing
[ioapic
].gsi_base
;
1099 if (ioapic_renumber_irq
)
1100 gsi
= ioapic_renumber_irq(ioapic
, gsi
);
1103 * Avoid pin reprogramming. PRTs typically include entries
1104 * with redundant pin->gsi mappings (but unique PCI devices);
1105 * we only program the IOAPIC on the first.
1107 bit
= ioapic_pin
% 32;
1108 idx
= (ioapic_pin
< 32) ? 0 : (ioapic_pin
/ 32);
1110 printk(KERN_ERR
"Invalid reference to IOAPIC pin "
1111 "%d-%d\n", mp_ioapic_routing
[ioapic
].apic_id
,
1115 if ((1<<bit
) & mp_ioapic_routing
[ioapic
].pin_programmed
[idx
]) {
1116 Dprintk(KERN_DEBUG
"Pin %d-%d already programmed\n",
1117 mp_ioapic_routing
[ioapic
].apic_id
, ioapic_pin
);
1118 return gsi_to_irq
[gsi
];
1121 mp_ioapic_routing
[ioapic
].pin_programmed
[idx
] |= (1<<bit
);
1125 * For PCI devices assign IRQs in order, avoiding gaps
1126 * due to unused I/O APIC pins.
1129 if (gsi
< MAX_GSI_NUM
) {
1133 * Don't assign IRQ used by ACPI SCI
1135 if (gsi
== acpi_fadt
.sci_int
)
1137 gsi_to_irq
[irq
] = gsi
;
1139 printk(KERN_ERR
"GSI %u is too high\n", gsi
);
1144 io_apic_set_pci_routing(ioapic
, ioapic_pin
, gsi
,
1145 edge_level
== ACPI_EDGE_SENSITIVE
? 0 : 1,
1146 active_high_low
== ACPI_ACTIVE_HIGH
? 0 : 1);
1150 #endif /* CONFIG_X86_IO_APIC */
1151 #endif /* CONFIG_ACPI */