2 * drivers/mtd/nand/sharpsl.c
4 * Copyright (C) 2004 Richard Purdie
6 * $Id: sharpsl.c,v 1.7 2005/11/07 11:14:31 gleixner Exp $
8 * Based on Sharp's NAND driver sharp_sl.c
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
16 #include <linux/genhd.h>
17 #include <linux/slab.h>
18 #include <linux/module.h>
19 #include <linux/delay.h>
20 #include <linux/mtd/mtd.h>
21 #include <linux/mtd/nand.h>
22 #include <linux/mtd/nand_ecc.h>
23 #include <linux/mtd/partitions.h>
24 #include <linux/interrupt.h>
26 #include <asm/hardware.h>
27 #include <asm/mach-types.h>
29 static void __iomem
*sharpsl_io_base
;
30 static int sharpsl_phys_base
= 0x0C000000;
33 #define ECCLPLB sharpsl_io_base+0x00 /* line parity 7 - 0 bit */
34 #define ECCLPUB sharpsl_io_base+0x04 /* line parity 15 - 8 bit */
35 #define ECCCP sharpsl_io_base+0x08 /* column parity 5 - 0 bit */
36 #define ECCCNTR sharpsl_io_base+0x0C /* ECC byte counter */
37 #define ECCCLRR sharpsl_io_base+0x10 /* cleare ECC */
38 #define FLASHIO sharpsl_io_base+0x14 /* Flash I/O */
39 #define FLASHCTL sharpsl_io_base+0x18 /* Flash Control */
41 /* Flash control bit */
42 #define FLRYBY (1 << 5)
43 #define FLCE1 (1 << 4)
45 #define FLALE (1 << 2)
46 #define FLCLE (1 << 1)
47 #define FLCE0 (1 << 0)
50 * MTD structure for SharpSL
52 static struct mtd_info
*sharpsl_mtd
= NULL
;
55 * Define partitions for flash device
57 #define DEFAULT_NUM_PARTITIONS 3
59 static int nr_partitions
;
60 static struct mtd_partition sharpsl_nand_default_partition_info
[] = {
62 .name
= "System Area",
64 .size
= 7 * 1024 * 1024,
67 .name
= "Root Filesystem",
68 .offset
= 7 * 1024 * 1024,
69 .size
= 30 * 1024 * 1024,
72 .name
= "Home Filesystem",
73 .offset
= MTDPART_OFS_APPEND
,
74 .size
= MTDPART_SIZ_FULL
,
79 * hardware specific access to control-lines
81 * NAND_CNE: bit 0 -> bit 0 & 4
82 * NAND_CLE: bit 1 -> bit 1
83 * NAND_ALE: bit 2 -> bit 2
86 static void sharpsl_nand_hwcontrol(struct mtd_info
*mtd
, int cmd
,
89 struct nand_chip
*chip
= mtd
->priv
;
91 if (ctrl
& NAND_CTRL_CHANGE
) {
92 unsigned char bits
= ctrl
& 0x07;
94 bits
|= (ctrl
& 0x01) << 4;
95 writeb((readb(FLASHCTL
) & 0x17) | bits
, FLASHCTL
);
98 if (cmd
!= NAND_CMD_NONE
)
99 writeb(cmd
, chip
->IO_ADDR_W
);
102 static uint8_t scan_ff_pattern
[] = { 0xff, 0xff };
104 static struct nand_bbt_descr sharpsl_bbt
= {
108 .pattern
= scan_ff_pattern
111 static struct nand_bbt_descr sharpsl_akita_bbt
= {
115 .pattern
= scan_ff_pattern
118 static struct nand_ecclayout akita_oobinfo
= {
121 0x5, 0x1, 0x2, 0x3, 0x6, 0x7, 0x15, 0x11,
122 0x12, 0x13, 0x16, 0x17, 0x25, 0x21, 0x22, 0x23,
123 0x26, 0x27, 0x35, 0x31, 0x32, 0x33, 0x36, 0x37},
124 .oobfree
= {{0x08, 0x09}}
127 static int sharpsl_nand_dev_ready(struct mtd_info
*mtd
)
129 return !((readb(FLASHCTL
) & FLRYBY
) == 0);
132 static void sharpsl_nand_enable_hwecc(struct mtd_info
*mtd
, int mode
)
137 static int sharpsl_nand_calculate_ecc(struct mtd_info
*mtd
, const u_char
* dat
, u_char
* ecc_code
)
139 ecc_code
[0] = ~readb(ECCLPUB
);
140 ecc_code
[1] = ~readb(ECCLPLB
);
141 ecc_code
[2] = (~readb(ECCCP
) << 2) | 0x03;
142 return readb(ECCCNTR
) != 0;
145 #ifdef CONFIG_MTD_PARTITIONS
146 const char *part_probes
[] = { "cmdlinepart", NULL
};
150 * Main initialization routine
152 static int __init
sharpsl_nand_init(void)
154 struct nand_chip
*this;
155 struct mtd_partition
*sharpsl_partition_info
;
158 /* Allocate memory for MTD device structure and private data */
159 sharpsl_mtd
= kmalloc(sizeof(struct mtd_info
) + sizeof(struct nand_chip
), GFP_KERNEL
);
161 printk("Unable to allocate SharpSL NAND MTD device structure.\n");
165 /* map physical adress */
166 sharpsl_io_base
= ioremap(sharpsl_phys_base
, 0x1000);
167 if (!sharpsl_io_base
) {
168 printk("ioremap to access Sharp SL NAND chip failed\n");
173 /* Get pointer to private data */
174 this = (struct nand_chip
*)(&sharpsl_mtd
[1]);
176 /* Initialize structures */
177 memset(sharpsl_mtd
, 0, sizeof(struct mtd_info
));
178 memset(this, 0, sizeof(struct nand_chip
));
180 /* Link the private data with the MTD structure */
181 sharpsl_mtd
->priv
= this;
182 sharpsl_mtd
->owner
= THIS_MODULE
;
187 writeb(readb(FLASHCTL
) | FLWP
, FLASHCTL
);
189 /* Set address of NAND IO lines */
190 this->IO_ADDR_R
= FLASHIO
;
191 this->IO_ADDR_W
= FLASHIO
;
192 /* Set address of hardware control function */
193 this->cmd_ctrl
= sharpsl_nand_hwcontrol
;
194 this->dev_ready
= sharpsl_nand_dev_ready
;
195 /* 15 us command delay time */
196 this->chip_delay
= 15;
197 /* set eccmode using hardware ECC */
198 this->ecc
.mode
= NAND_ECC_HW
;
199 this->ecc
.size
= 256;
201 this->badblock_pattern
= &sharpsl_bbt
;
202 if (machine_is_akita() || machine_is_borzoi()) {
203 this->badblock_pattern
= &sharpsl_akita_bbt
;
204 this->ecc
.layout
= &akita_oobinfo
;
206 this->ecc
.hwctl
= sharpsl_nand_enable_hwecc
;
207 this->ecc
.calculate
= sharpsl_nand_calculate_ecc
;
208 this->ecc
.correct
= nand_correct_data
;
210 /* Scan to find existence of the device */
211 err
= nand_scan(sharpsl_mtd
, 1);
213 iounmap(sharpsl_io_base
);
218 /* Register the partitions */
219 sharpsl_mtd
->name
= "sharpsl-nand";
220 nr_partitions
= parse_mtd_partitions(sharpsl_mtd
, part_probes
, &sharpsl_partition_info
, 0);
222 if (nr_partitions
<= 0) {
223 nr_partitions
= DEFAULT_NUM_PARTITIONS
;
224 sharpsl_partition_info
= sharpsl_nand_default_partition_info
;
225 if (machine_is_poodle()) {
226 sharpsl_partition_info
[1].size
= 22 * 1024 * 1024;
227 } else if (machine_is_corgi() || machine_is_shepherd()) {
228 sharpsl_partition_info
[1].size
= 25 * 1024 * 1024;
229 } else if (machine_is_husky()) {
230 sharpsl_partition_info
[1].size
= 53 * 1024 * 1024;
231 } else if (machine_is_spitz()) {
232 sharpsl_partition_info
[1].size
= 5 * 1024 * 1024;
233 } else if (machine_is_akita()) {
234 sharpsl_partition_info
[1].size
= 58 * 1024 * 1024;
235 } else if (machine_is_borzoi()) {
236 sharpsl_partition_info
[1].size
= 32 * 1024 * 1024;
240 if (machine_is_husky() || machine_is_borzoi() || machine_is_akita()) {
241 /* Need to use small eraseblock size for backward compatibility */
242 sharpsl_mtd
->flags
|= MTD_NO_VIRTBLOCKS
;
245 add_mtd_partitions(sharpsl_mtd
, sharpsl_partition_info
, nr_partitions
);
251 module_init(sharpsl_nand_init
);
256 static void __exit
sharpsl_nand_cleanup(void)
258 struct nand_chip
*this = (struct nand_chip
*)&sharpsl_mtd
[1];
260 /* Release resources, unregister device */
261 nand_release(sharpsl_mtd
);
263 iounmap(sharpsl_io_base
);
265 /* Free the MTD device structure */
269 module_exit(sharpsl_nand_cleanup
);
271 MODULE_LICENSE("GPL");
272 MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
273 MODULE_DESCRIPTION("Device specific logic for NAND flash on Sharp SL-C7xx Series");