drivers/media/video/cx88/cx88-tvaudio.c

   1 /*
   2
   3     cx88x-audio.c - Conexant CX23880/23881 audio downstream driver driver
   4
   5      (c) 2001 Michael Eskin, Tom Zakrajsek [Windows version]
   6      (c) 2002 Yurij Sysoev <yurij@naturesoft.net>
   7      (c) 2003 Gerd Knorr <kraxel@bytesex.org>
   8
   9     -----------------------------------------------------------------------
  10
  11     Lot of voodoo here.  Even the data sheet doesn't help to
  12     understand what is going on here, the documentation for the audio
  13     part of the cx2388x chip is *very* bad.
  14
  15     Some of this comes from party done linux driver sources I got from
  16     [undocumented].
  17
  18     Some comes from the dscaler sources, one of the dscaler driver guy works
  19     for Conexant ...
  20
  21     -----------------------------------------------------------------------
  22
  23     This program is free software; you can redistribute it and/or modify
  24     it under the terms of the GNU General Public License as published by
  25     the Free Software Foundation; either version 2 of the License, or
  26     (at your option) any later version.
  27
  28     This program is distributed in the hope that it will be useful,
  29     but WITHOUT ANY WARRANTY; without even the implied warranty of
  30     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  31     GNU General Public License for more details.
  32
  33     You should have received a copy of the GNU General Public License
  34     along with this program; if not, write to the Free Software
  35     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  36 */
  37
  38 #include <linux/module.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/errno.h>
  41 #include <linux/freezer.h>
  42 #include <linux/kernel.h>
  43 #include <linux/slab.h>
  44 #include <linux/mm.h>
  45 #include <linux/poll.h>
  46 #include <linux/signal.h>
  47 #include <linux/ioport.h>
  48 #include <linux/types.h>
  49 #include <linux/interrupt.h>
  50 #include <linux/vmalloc.h>
  51 #include <linux/init.h>
  52 #include <linux/delay.h>
  53 #include <linux/kthread.h>
  54
  55 #include "cx88.h"
  56
  57 static unsigned int audio_debug = 0;
  58 module_param(audio_debug, int, 0644);
  59 MODULE_PARM_DESC(audio_debug, "enable debug messages [audio]");
  60
  61 static unsigned int always_analog = 0;
  62 module_param(always_analog,int,0644);
  63 MODULE_PARM_DESC(always_analog,"force analog audio out");
  64
  65
  66 #define dprintk(fmt, arg...)    if (audio_debug) \
  67         printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
  68
  69 /* ----------------------------------------------------------- */
  70
  71 static char *aud_ctl_names[64] = {
  72         [EN_BTSC_FORCE_MONO] = "BTSC_FORCE_MONO",
  73         [EN_BTSC_FORCE_STEREO] = "BTSC_FORCE_STEREO",
  74         [EN_BTSC_FORCE_SAP] = "BTSC_FORCE_SAP",
  75         [EN_BTSC_AUTO_STEREO] = "BTSC_AUTO_STEREO",
  76         [EN_BTSC_AUTO_SAP] = "BTSC_AUTO_SAP",
  77         [EN_A2_FORCE_MONO1] = "A2_FORCE_MONO1",
  78         [EN_A2_FORCE_MONO2] = "A2_FORCE_MONO2",
  79         [EN_A2_FORCE_STEREO] = "A2_FORCE_STEREO",
  80         [EN_A2_AUTO_MONO2] = "A2_AUTO_MONO2",
  81         [EN_A2_AUTO_STEREO] = "A2_AUTO_STEREO",
  82         [EN_EIAJ_FORCE_MONO1] = "EIAJ_FORCE_MONO1",
  83         [EN_EIAJ_FORCE_MONO2] = "EIAJ_FORCE_MONO2",
  84         [EN_EIAJ_FORCE_STEREO] = "EIAJ_FORCE_STEREO",
  85         [EN_EIAJ_AUTO_MONO2] = "EIAJ_AUTO_MONO2",
  86         [EN_EIAJ_AUTO_STEREO] = "EIAJ_AUTO_STEREO",
  87         [EN_NICAM_FORCE_MONO1] = "NICAM_FORCE_MONO1",
  88         [EN_NICAM_FORCE_MONO2] = "NICAM_FORCE_MONO2",
  89         [EN_NICAM_FORCE_STEREO] = "NICAM_FORCE_STEREO",
  90         [EN_NICAM_AUTO_MONO2] = "NICAM_AUTO_MONO2",
  91         [EN_NICAM_AUTO_STEREO] = "NICAM_AUTO_STEREO",
  92         [EN_FMRADIO_FORCE_MONO] = "FMRADIO_FORCE_MONO",
  93         [EN_FMRADIO_FORCE_STEREO] = "FMRADIO_FORCE_STEREO",
  94         [EN_FMRADIO_AUTO_STEREO] = "FMRADIO_AUTO_STEREO",
  95 };
  96
  97 struct rlist {
  98         u32 reg;
  99         u32 val;
 100 };
 101
 102 static void set_audio_registers(struct cx88_core *core, const struct rlist *l)
 103 {
 104         int i;
 105
 106         for (i = 0; l[i].reg; i++) {
 107                 switch (l[i].reg) {
 108                 case AUD_PDF_DDS_CNST_BYTE2:
 109                 case AUD_PDF_DDS_CNST_BYTE1:
 110                 case AUD_PDF_DDS_CNST_BYTE0:
 111                 case AUD_QAM_MODE:
 112                 case AUD_PHACC_FREQ_8MSB:
 113                 case AUD_PHACC_FREQ_8LSB:
 114                         cx_writeb(l[i].reg, l[i].val);
 115                         break;
 116                 default:
 117                         cx_write(l[i].reg, l[i].val);
 118                         break;
 119                 }
 120         }
 121 }
 122
 123 static void set_audio_start(struct cx88_core *core, u32 mode)
 124 {
 125         /* mute */
 126         cx_write(AUD_VOL_CTL, (1 << 6));
 127
 128         /* start programming */
 129         cx_write(AUD_INIT, mode);
 130         cx_write(AUD_INIT_LD, 0x0001);
 131         cx_write(AUD_SOFT_RESET, 0x0001);
 132 }
 133
 134 static void set_audio_finish(struct cx88_core *core, u32 ctl)
 135 {
 136         u32 volume;
 137
 138         /* restart dma; This avoids buzz in NICAM and is good in others  */
 139         cx88_stop_audio_dma(core);
 140         cx_write(AUD_RATE_THRES_DMD, 0x000000C0);
 141         cx88_start_audio_dma(core);
 142
 143         if (core->board.mpeg & CX88_MPEG_BLACKBIRD) {
 144                 cx_write(AUD_I2SINPUTCNTL, 4);
 145                 cx_write(AUD_BAUDRATE, 1);
 146                 /* 'pass-thru mode': this enables the i2s output to the mpeg encoder */
 147                 cx_set(AUD_CTL, EN_I2SOUT_ENABLE);
 148                 cx_write(AUD_I2SOUTPUTCNTL, 1);
 149                 cx_write(AUD_I2SCNTL, 0);
 150                 /* cx_write(AUD_APB_IN_RATE_ADJ, 0); */
 151         }
 152         if ((always_analog) || (!(core->board.mpeg & CX88_MPEG_BLACKBIRD))) {
 153                 ctl |= EN_DAC_ENABLE;
 154                 cx_write(AUD_CTL, ctl);
 155         }
 156
 157         /* finish programming */
 158         cx_write(AUD_SOFT_RESET, 0x0000);
 159
 160         /* unmute */
 161         volume = cx_sread(SHADOW_AUD_VOL_CTL);
 162         cx_swrite(SHADOW_AUD_VOL_CTL, AUD_VOL_CTL, volume);
 163 }
 164
 165 /* ----------------------------------------------------------- */
 166
 167 static void set_audio_standard_BTSC(struct cx88_core *core, unsigned int sap,
 168                                     u32 mode)
 169 {
 170         static const struct rlist btsc[] = {
 171                 {AUD_AFE_12DB_EN, 0x00000001},
 172                 {AUD_OUT1_SEL, 0x00000013},
 173                 {AUD_OUT1_SHIFT, 0x00000000},
 174                 {AUD_POLY0_DDS_CONSTANT, 0x0012010c},
 175                 {AUD_DMD_RA_DDS, 0x00c3e7aa},
 176                 {AUD_DBX_IN_GAIN, 0x00004734},
 177                 {AUD_DBX_WBE_GAIN, 0x00004640},
 178                 {AUD_DBX_SE_GAIN, 0x00008d31},
 179                 {AUD_DCOC_0_SRC, 0x0000001a},
 180                 {AUD_IIR1_4_SEL, 0x00000021},
 181                 {AUD_DCOC_PASS_IN, 0x00000003},
 182                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
 183                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
 184                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
 185                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
 186                 {AUD_DN0_FREQ, 0x0000283b},
 187                 {AUD_DN2_SRC_SEL, 0x00000008},
 188                 {AUD_DN2_FREQ, 0x00003000},
 189                 {AUD_DN2_AFC, 0x00000002},
 190                 {AUD_DN2_SHFT, 0x00000000},
 191                 {AUD_IIR2_2_SEL, 0x00000020},
 192                 {AUD_IIR2_2_SHIFT, 0x00000000},
 193                 {AUD_IIR2_3_SEL, 0x0000001f},
 194                 {AUD_IIR2_3_SHIFT, 0x00000000},
 195                 {AUD_CRDC1_SRC_SEL, 0x000003ce},
 196                 {AUD_CRDC1_SHIFT, 0x00000000},
 197                 {AUD_CORDIC_SHIFT_1, 0x00000007},
 198                 {AUD_DCOC_1_SRC, 0x0000001b},
 199                 {AUD_DCOC1_SHIFT, 0x00000000},
 200                 {AUD_RDSI_SEL, 0x00000008},
 201                 {AUD_RDSQ_SEL, 0x00000008},
 202                 {AUD_RDSI_SHIFT, 0x00000000},
 203                 {AUD_RDSQ_SHIFT, 0x00000000},
 204                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 205                 { /* end of list */ },
 206         };
 207         static const struct rlist btsc_sap[] = {
 208                 {AUD_AFE_12DB_EN, 0x00000001},
 209                 {AUD_DBX_IN_GAIN, 0x00007200},
 210                 {AUD_DBX_WBE_GAIN, 0x00006200},
 211                 {AUD_DBX_SE_GAIN, 0x00006200},
 212                 {AUD_IIR1_1_SEL, 0x00000000},
 213                 {AUD_IIR1_3_SEL, 0x00000001},
 214                 {AUD_DN1_SRC_SEL, 0x00000007},
 215                 {AUD_IIR1_4_SHIFT, 0x00000006},
 216                 {AUD_IIR2_1_SHIFT, 0x00000000},
 217                 {AUD_IIR2_2_SHIFT, 0x00000000},
 218                 {AUD_IIR3_0_SHIFT, 0x00000000},
 219                 {AUD_IIR3_1_SHIFT, 0x00000000},
 220                 {AUD_IIR3_0_SEL, 0x0000000d},
 221                 {AUD_IIR3_1_SEL, 0x0000000e},
 222                 {AUD_DEEMPH1_SRC_SEL, 0x00000014},
 223                 {AUD_DEEMPH1_SHIFT, 0x00000000},
 224                 {AUD_DEEMPH1_G0, 0x00004000},
 225                 {AUD_DEEMPH1_A0, 0x00000000},
 226                 {AUD_DEEMPH1_B0, 0x00000000},
 227                 {AUD_DEEMPH1_A1, 0x00000000},
 228                 {AUD_DEEMPH1_B1, 0x00000000},
 229                 {AUD_OUT0_SEL, 0x0000003f},
 230                 {AUD_OUT1_SEL, 0x0000003f},
 231                 {AUD_DN1_AFC, 0x00000002},
 232                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
 233                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
 234                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
 235                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
 236                 {AUD_IIR1_0_SEL, 0x0000001d},
 237                 {AUD_IIR1_2_SEL, 0x0000001e},
 238                 {AUD_IIR2_1_SEL, 0x00000002},
 239                 {AUD_IIR2_2_SEL, 0x00000004},
 240                 {AUD_IIR3_2_SEL, 0x0000000f},
 241                 {AUD_DCOC2_SHIFT, 0x00000001},
 242                 {AUD_IIR3_2_SHIFT, 0x00000001},
 243                 {AUD_DEEMPH0_SRC_SEL, 0x00000014},
 244                 {AUD_CORDIC_SHIFT_1, 0x00000006},
 245                 {AUD_POLY0_DDS_CONSTANT, 0x000e4db2},
 246                 {AUD_DMD_RA_DDS, 0x00f696e6},
 247                 {AUD_IIR2_3_SEL, 0x00000025},
 248                 {AUD_IIR1_4_SEL, 0x00000021},
 249                 {AUD_DN1_FREQ, 0x0000c965},
 250                 {AUD_DCOC_PASS_IN, 0x00000003},
 251                 {AUD_DCOC_0_SRC, 0x0000001a},
 252                 {AUD_DCOC_1_SRC, 0x0000001b},
 253                 {AUD_DCOC1_SHIFT, 0x00000000},
 254                 {AUD_RDSI_SEL, 0x00000009},
 255                 {AUD_RDSQ_SEL, 0x00000009},
 256                 {AUD_RDSI_SHIFT, 0x00000000},
 257                 {AUD_RDSQ_SHIFT, 0x00000000},
 258                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 259                 { /* end of list */ },
 260         };
 261
 262         mode |= EN_FMRADIO_EN_RDS;
 263
 264         if (sap) {
 265                 dprintk("%s SAP (status: unknown)\n", __FUNCTION__);
 266                 set_audio_start(core, SEL_SAP);
 267                 set_audio_registers(core, btsc_sap);
 268                 set_audio_finish(core, mode);
 269         } else {
 270                 dprintk("%s (status: known-good)\n", __FUNCTION__);
 271                 set_audio_start(core, SEL_BTSC);
 272                 set_audio_registers(core, btsc);
 273                 set_audio_finish(core, mode);
 274         }
 275 }
 276
 277 static void set_audio_standard_NICAM(struct cx88_core *core, u32 mode)
 278 {
 279         static const struct rlist nicam_l[] = {
 280                 {AUD_AFE_12DB_EN, 0x00000001},
 281                 {AUD_RATE_ADJ1, 0x00000060},
 282                 {AUD_RATE_ADJ2, 0x000000F9},
 283                 {AUD_RATE_ADJ3, 0x000001CC},
 284                 {AUD_RATE_ADJ4, 0x000002B3},
 285                 {AUD_RATE_ADJ5, 0x00000726},
 286                 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
 287                 {AUD_DEEMPHDENOM2_R, 0x00000000},
 288                 {AUD_ERRLOGPERIOD_R, 0x00000064},
 289                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
 290                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
 291                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
 292                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 293                 {AUD_DMD_RA_DDS, 0x00C00000},
 294                 {AUD_PLL_INT, 0x0000001E},
 295                 {AUD_PLL_DDS, 0x00000000},
 296                 {AUD_PLL_FRAC, 0x0000E542},
 297                 {AUD_START_TIMER, 0x00000000},
 298                 {AUD_DEEMPHNUMER1_R, 0x000353DE},
 299                 {AUD_DEEMPHNUMER2_R, 0x000001B1},
 300                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
 301                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
 302                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
 303                 {AUD_QAM_MODE, 0x05},
 304                 {AUD_PHACC_FREQ_8MSB, 0x34},
 305                 {AUD_PHACC_FREQ_8LSB, 0x4C},
 306                 {AUD_DEEMPHGAIN_R, 0x00006680},
 307                 {AUD_RATE_THRES_DMD, 0x000000C0},
 308                 { /* end of list */ },
 309         };
 310
 311         static const struct rlist nicam_bgdki_common[] = {
 312                 {AUD_AFE_12DB_EN, 0x00000001},
 313                 {AUD_RATE_ADJ1, 0x00000010},
 314                 {AUD_RATE_ADJ2, 0x00000040},
 315                 {AUD_RATE_ADJ3, 0x00000100},
 316                 {AUD_RATE_ADJ4, 0x00000400},
 317                 {AUD_RATE_ADJ5, 0x00001000},
 318                 {AUD_ERRLOGPERIOD_R, 0x00000fff},
 319                 {AUD_ERRINTRPTTHSHLD1_R, 0x000003ff},
 320                 {AUD_ERRINTRPTTHSHLD2_R, 0x000000ff},
 321                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000003f},
 322                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 323                 {AUD_DEEMPHGAIN_R, 0x000023c2},
 324                 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
 325                 {AUD_DEEMPHNUMER2_R, 0x0003023e},
 326                 {AUD_DEEMPHDENOM1_R, 0x0000f3d0},
 327                 {AUD_DEEMPHDENOM2_R, 0x00000000},
 328                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
 329                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
 330                 {AUD_QAM_MODE, 0x05},
 331                 { /* end of list */ },
 332         };
 333
 334         static const struct rlist nicam_i[] = {
 335                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
 336                 {AUD_PHACC_FREQ_8MSB, 0x3a},
 337                 {AUD_PHACC_FREQ_8LSB, 0x93},
 338                 { /* end of list */ },
 339         };
 340
 341         static const struct rlist nicam_default[] = {
 342                 {AUD_PDF_DDS_CNST_BYTE0, 0x16},
 343                 {AUD_PHACC_FREQ_8MSB, 0x34},
 344                 {AUD_PHACC_FREQ_8LSB, 0x4c},
 345                 { /* end of list */ },
 346         };
 347
 348         set_audio_start(core,SEL_NICAM);
 349         switch (core->tvaudio) {
 350         case WW_L:
 351                 dprintk("%s SECAM-L NICAM (status: devel)\n", __FUNCTION__);
 352                 set_audio_registers(core, nicam_l);
 353                 break;
 354         case WW_I:
 355                 dprintk("%s PAL-I NICAM (status: known-good)\n", __FUNCTION__);
 356                 set_audio_registers(core, nicam_bgdki_common);
 357                 set_audio_registers(core, nicam_i);
 358                 break;
 359         default:
 360                 dprintk("%s PAL-BGDK NICAM (status: known-good)\n", __FUNCTION__);
 361                 set_audio_registers(core, nicam_bgdki_common);
 362                 set_audio_registers(core, nicam_default);
 363                 break;
 364         };
 365
 366         mode |= EN_DMTRX_LR | EN_DMTRX_BYPASS;
 367         set_audio_finish(core, mode);
 368 }
 369
 370 static void set_audio_standard_A2(struct cx88_core *core, u32 mode)
 371 {
 372         static const struct rlist a2_bgdk_common[] = {
 373                 {AUD_ERRLOGPERIOD_R, 0x00000064},
 374                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
 375                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
 376                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
 377                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
 378                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
 379                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
 380                 {AUD_QAM_MODE, 0x05},
 381                 {AUD_PHACC_FREQ_8MSB, 0x34},
 382                 {AUD_PHACC_FREQ_8LSB, 0x4c},
 383                 {AUD_RATE_ADJ1, 0x00000100},
 384                 {AUD_RATE_ADJ2, 0x00000200},
 385                 {AUD_RATE_ADJ3, 0x00000300},
 386                 {AUD_RATE_ADJ4, 0x00000400},
 387                 {AUD_RATE_ADJ5, 0x00000500},
 388                 {AUD_THR_FR, 0x00000000},
 389                 {AAGC_HYST, 0x0000001a},
 390                 {AUD_PILOT_BQD_1_K0, 0x0000755b},
 391                 {AUD_PILOT_BQD_1_K1, 0x00551340},
 392                 {AUD_PILOT_BQD_1_K2, 0x006d30be},
 393                 {AUD_PILOT_BQD_1_K3, 0xffd394af},
 394                 {AUD_PILOT_BQD_1_K4, 0x00400000},
 395                 {AUD_PILOT_BQD_2_K0, 0x00040000},
 396                 {AUD_PILOT_BQD_2_K1, 0x002a4841},
 397                 {AUD_PILOT_BQD_2_K2, 0x00400000},
 398                 {AUD_PILOT_BQD_2_K3, 0x00000000},
 399                 {AUD_PILOT_BQD_2_K4, 0x00000000},
 400                 {AUD_MODE_CHG_TIMER, 0x00000040},
 401                 {AUD_AFE_12DB_EN, 0x00000001},
 402                 {AUD_CORDIC_SHIFT_0, 0x00000007},
 403                 {AUD_CORDIC_SHIFT_1, 0x00000007},
 404                 {AUD_DEEMPH0_G0, 0x00000380},
 405                 {AUD_DEEMPH1_G0, 0x00000380},
 406                 {AUD_DCOC_0_SRC, 0x0000001a},
 407                 {AUD_DCOC0_SHIFT, 0x00000000},
 408                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
 409                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
 410                 {AUD_DCOC_PASS_IN, 0x00000003},
 411                 {AUD_IIR3_0_SEL, 0x00000021},
 412                 {AUD_DN2_AFC, 0x00000002},
 413                 {AUD_DCOC_1_SRC, 0x0000001b},
 414                 {AUD_DCOC1_SHIFT, 0x00000000},
 415                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
 416                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
 417                 {AUD_IIR3_1_SEL, 0x00000023},
 418                 {AUD_RDSI_SEL, 0x00000017},
 419                 {AUD_RDSI_SHIFT, 0x00000000},
 420                 {AUD_RDSQ_SEL, 0x00000017},
 421                 {AUD_RDSQ_SHIFT, 0x00000000},
 422                 {AUD_PLL_INT, 0x0000001e},
 423                 {AUD_PLL_DDS, 0x00000000},
 424                 {AUD_PLL_FRAC, 0x0000e542},
 425                 {AUD_POLYPH80SCALEFAC, 0x00000001},
 426                 {AUD_START_TIMER, 0x00000000},
 427                 { /* end of list */ },
 428         };
 429
 430         static const struct rlist a2_bg[] = {
 431                 {AUD_DMD_RA_DDS, 0x002a4f2f},
 432                 {AUD_C1_UP_THR, 0x00007000},
 433                 {AUD_C1_LO_THR, 0x00005400},
 434                 {AUD_C2_UP_THR, 0x00005400},
 435                 {AUD_C2_LO_THR, 0x00003000},
 436                 { /* end of list */ },
 437         };
 438
 439         static const struct rlist a2_dk[] = {
 440                 {AUD_DMD_RA_DDS, 0x002a4f2f},
 441                 {AUD_C1_UP_THR, 0x00007000},
 442                 {AUD_C1_LO_THR, 0x00005400},
 443                 {AUD_C2_UP_THR, 0x00005400},
 444                 {AUD_C2_LO_THR, 0x00003000},
 445                 {AUD_DN0_FREQ, 0x00003a1c},
 446                 {AUD_DN2_FREQ, 0x0000d2e0},
 447                 { /* end of list */ },
 448         };
 449
 450         static const struct rlist a1_i[] = {
 451                 {AUD_ERRLOGPERIOD_R, 0x00000064},
 452                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
 453                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
 454                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
 455                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
 456                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
 457                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
 458                 {AUD_QAM_MODE, 0x05},
 459                 {AUD_PHACC_FREQ_8MSB, 0x3a},
 460                 {AUD_PHACC_FREQ_8LSB, 0x93},
 461                 {AUD_DMD_RA_DDS, 0x002a4f2f},
 462                 {AUD_PLL_INT, 0x0000001e},
 463                 {AUD_PLL_DDS, 0x00000004},
 464                 {AUD_PLL_FRAC, 0x0000e542},
 465                 {AUD_RATE_ADJ1, 0x00000100},
 466                 {AUD_RATE_ADJ2, 0x00000200},
 467                 {AUD_RATE_ADJ3, 0x00000300},
 468                 {AUD_RATE_ADJ4, 0x00000400},
 469                 {AUD_RATE_ADJ5, 0x00000500},
 470                 {AUD_THR_FR, 0x00000000},
 471                 {AUD_PILOT_BQD_1_K0, 0x0000755b},
 472                 {AUD_PILOT_BQD_1_K1, 0x00551340},
 473                 {AUD_PILOT_BQD_1_K2, 0x006d30be},
 474                 {AUD_PILOT_BQD_1_K3, 0xffd394af},
 475                 {AUD_PILOT_BQD_1_K4, 0x00400000},
 476                 {AUD_PILOT_BQD_2_K0, 0x00040000},
 477                 {AUD_PILOT_BQD_2_K1, 0x002a4841},
 478                 {AUD_PILOT_BQD_2_K2, 0x00400000},
 479                 {AUD_PILOT_BQD_2_K3, 0x00000000},
 480                 {AUD_PILOT_BQD_2_K4, 0x00000000},
 481                 {AUD_MODE_CHG_TIMER, 0x00000060},
 482                 {AUD_AFE_12DB_EN, 0x00000001},
 483                 {AAGC_HYST, 0x0000000a},
 484                 {AUD_CORDIC_SHIFT_0, 0x00000007},
 485                 {AUD_CORDIC_SHIFT_1, 0x00000007},
 486                 {AUD_C1_UP_THR, 0x00007000},
 487                 {AUD_C1_LO_THR, 0x00005400},
 488                 {AUD_C2_UP_THR, 0x00005400},
 489                 {AUD_C2_LO_THR, 0x00003000},
 490                 {AUD_DCOC_0_SRC, 0x0000001a},
 491                 {AUD_DCOC0_SHIFT, 0x00000000},
 492                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
 493                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
 494                 {AUD_DCOC_PASS_IN, 0x00000003},
 495                 {AUD_IIR3_0_SEL, 0x00000021},
 496                 {AUD_DN2_AFC, 0x00000002},
 497                 {AUD_DCOC_1_SRC, 0x0000001b},
 498                 {AUD_DCOC1_SHIFT, 0x00000000},
 499                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
 500                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
 501                 {AUD_IIR3_1_SEL, 0x00000023},
 502                 {AUD_DN0_FREQ, 0x000035a3},
 503                 {AUD_DN2_FREQ, 0x000029c7},
 504                 {AUD_CRDC0_SRC_SEL, 0x00000511},
 505                 {AUD_IIR1_0_SEL, 0x00000001},
 506                 {AUD_IIR1_1_SEL, 0x00000000},
 507                 {AUD_IIR3_2_SEL, 0x00000003},
 508                 {AUD_IIR3_2_SHIFT, 0x00000000},
 509                 {AUD_IIR3_0_SEL, 0x00000002},
 510                 {AUD_IIR2_0_SEL, 0x00000021},
 511                 {AUD_IIR2_0_SHIFT, 0x00000002},
 512                 {AUD_DEEMPH0_SRC_SEL, 0x0000000b},
 513                 {AUD_DEEMPH1_SRC_SEL, 0x0000000b},
 514                 {AUD_POLYPH80SCALEFAC, 0x00000001},
 515                 {AUD_START_TIMER, 0x00000000},
 516                 { /* end of list */ },
 517         };
 518
 519         static const struct rlist am_l[] = {
 520                 {AUD_ERRLOGPERIOD_R, 0x00000064},
 521                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
 522                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
 523                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
 524                 {AUD_PDF_DDS_CNST_BYTE2, 0x48},
 525                 {AUD_PDF_DDS_CNST_BYTE1, 0x3D},
 526                 {AUD_QAM_MODE, 0x00},
 527                 {AUD_PDF_DDS_CNST_BYTE0, 0xf5},
 528                 {AUD_PHACC_FREQ_8MSB, 0x3a},
 529                 {AUD_PHACC_FREQ_8LSB, 0x4a},
 530                 {AUD_DEEMPHGAIN_R, 0x00006680},
 531                 {AUD_DEEMPHNUMER1_R, 0x000353DE},
 532                 {AUD_DEEMPHNUMER2_R, 0x000001B1},
 533                 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
 534                 {AUD_DEEMPHDENOM2_R, 0x00000000},
 535                 {AUD_FM_MODE_ENABLE, 0x00000007},
 536                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 537                 {AUD_AFE_12DB_EN, 0x00000001},
 538                 {AAGC_GAIN, 0x00000000},
 539                 {AAGC_HYST, 0x00000018},
 540                 {AAGC_DEF, 0x00000020},
 541                 {AUD_DN0_FREQ, 0x00000000},
 542                 {AUD_POLY0_DDS_CONSTANT, 0x000E4DB2},
 543                 {AUD_DCOC_0_SRC, 0x00000021},
 544                 {AUD_IIR1_0_SEL, 0x00000000},
 545                 {AUD_IIR1_0_SHIFT, 0x00000007},
 546                 {AUD_IIR1_1_SEL, 0x00000002},
 547                 {AUD_IIR1_1_SHIFT, 0x00000000},
 548                 {AUD_DCOC_1_SRC, 0x00000003},
 549                 {AUD_DCOC1_SHIFT, 0x00000000},
 550                 {AUD_DCOC_PASS_IN, 0x00000000},
 551                 {AUD_IIR1_2_SEL, 0x00000023},
 552                 {AUD_IIR1_2_SHIFT, 0x00000000},
 553                 {AUD_IIR1_3_SEL, 0x00000004},
 554                 {AUD_IIR1_3_SHIFT, 0x00000007},
 555                 {AUD_IIR1_4_SEL, 0x00000005},
 556                 {AUD_IIR1_4_SHIFT, 0x00000007},
 557                 {AUD_IIR3_0_SEL, 0x00000007},
 558                 {AUD_IIR3_0_SHIFT, 0x00000000},
 559                 {AUD_DEEMPH0_SRC_SEL, 0x00000011},
 560                 {AUD_DEEMPH0_SHIFT, 0x00000000},
 561                 {AUD_DEEMPH0_G0, 0x00007000},
 562                 {AUD_DEEMPH0_A0, 0x00000000},
 563                 {AUD_DEEMPH0_B0, 0x00000000},
 564                 {AUD_DEEMPH0_A1, 0x00000000},
 565                 {AUD_DEEMPH0_B1, 0x00000000},
 566                 {AUD_DEEMPH1_SRC_SEL, 0x00000011},
 567                 {AUD_DEEMPH1_SHIFT, 0x00000000},
 568                 {AUD_DEEMPH1_G0, 0x00007000},
 569                 {AUD_DEEMPH1_A0, 0x00000000},
 570                 {AUD_DEEMPH1_B0, 0x00000000},
 571                 {AUD_DEEMPH1_A1, 0x00000000},
 572                 {AUD_DEEMPH1_B1, 0x00000000},
 573                 {AUD_OUT0_SEL, 0x0000003F},
 574                 {AUD_OUT1_SEL, 0x0000003F},
 575                 {AUD_DMD_RA_DDS, 0x00F5C285},
 576                 {AUD_PLL_INT, 0x0000001E},
 577                 {AUD_PLL_DDS, 0x00000000},
 578                 {AUD_PLL_FRAC, 0x0000E542},
 579                 {AUD_RATE_ADJ1, 0x00000100},
 580                 {AUD_RATE_ADJ2, 0x00000200},
 581                 {AUD_RATE_ADJ3, 0x00000300},
 582                 {AUD_RATE_ADJ4, 0x00000400},
 583                 {AUD_RATE_ADJ5, 0x00000500},
 584                 {AUD_RATE_THRES_DMD, 0x000000C0},
 585                 { /* end of list */ },
 586         };
 587
 588         static const struct rlist a2_deemph50[] = {
 589                 {AUD_DEEMPH0_G0, 0x00000380},
 590                 {AUD_DEEMPH1_G0, 0x00000380},
 591                 {AUD_DEEMPHGAIN_R, 0x000011e1},
 592                 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
 593                 {AUD_DEEMPHNUMER2_R, 0x0003023c},
 594                 { /* end of list */ },
 595         };
 596
 597         set_audio_start(core, SEL_A2);
 598         switch (core->tvaudio) {
 599         case WW_BG:
 600                 dprintk("%s PAL-BG A1/2 (status: known-good)\n", __FUNCTION__);
 601                 set_audio_registers(core, a2_bgdk_common);
 602                 set_audio_registers(core, a2_bg);
 603                 set_audio_registers(core, a2_deemph50);
 604                 break;
 605         case WW_DK:
 606                 dprintk("%s PAL-DK A1/2 (status: known-good)\n", __FUNCTION__);
 607                 set_audio_registers(core, a2_bgdk_common);
 608                 set_audio_registers(core, a2_dk);
 609                 set_audio_registers(core, a2_deemph50);
 610                 break;
 611         case WW_I:
 612                 dprintk("%s PAL-I A1 (status: known-good)\n", __FUNCTION__);
 613                 set_audio_registers(core, a1_i);
 614                 set_audio_registers(core, a2_deemph50);
 615                 break;
 616         case WW_L:
 617                 dprintk("%s AM-L (status: devel)\n", __FUNCTION__);
 618                 set_audio_registers(core, am_l);
 619                 break;
 620         default:
 621                 dprintk("%s Warning: wrong value\n", __FUNCTION__);
 622                 return;
 623                 break;
 624         };
 625
 626         mode |= EN_FMRADIO_EN_RDS | EN_DMTRX_SUMDIFF;
 627         set_audio_finish(core, mode);
 628 }
 629
 630 static void set_audio_standard_EIAJ(struct cx88_core *core)
 631 {
 632         static const struct rlist eiaj[] = {
 633                 /* TODO: eiaj register settings are not there yet ... */
 634
 635                 { /* end of list */ },
 636         };
 637         dprintk("%s (status: unknown)\n", __FUNCTION__);
 638
 639         set_audio_start(core, SEL_EIAJ);
 640         set_audio_registers(core, eiaj);
 641         set_audio_finish(core, EN_EIAJ_AUTO_STEREO);
 642 }
 643
 644 static void set_audio_standard_FM(struct cx88_core *core,
 645                                   enum cx88_deemph_type deemph)
 646 {
 647         static const struct rlist fm_deemph_50[] = {
 648                 {AUD_DEEMPH0_G0, 0x0C45},
 649                 {AUD_DEEMPH0_A0, 0x6262},
 650                 {AUD_DEEMPH0_B0, 0x1C29},
 651                 {AUD_DEEMPH0_A1, 0x3FC66},
 652                 {AUD_DEEMPH0_B1, 0x399A},
 653
 654                 {AUD_DEEMPH1_G0, 0x0D80},
 655                 {AUD_DEEMPH1_A0, 0x6262},
 656                 {AUD_DEEMPH1_B0, 0x1C29},
 657                 {AUD_DEEMPH1_A1, 0x3FC66},
 658                 {AUD_DEEMPH1_B1, 0x399A},
 659
 660                 {AUD_POLYPH80SCALEFAC, 0x0003},
 661                 { /* end of list */ },
 662         };
 663         static const struct rlist fm_deemph_75[] = {
 664                 {AUD_DEEMPH0_G0, 0x091B},
 665                 {AUD_DEEMPH0_A0, 0x6B68},
 666                 {AUD_DEEMPH0_B0, 0x11EC},
 667                 {AUD_DEEMPH0_A1, 0x3FC66},
 668                 {AUD_DEEMPH0_B1, 0x399A},
 669
 670                 {AUD_DEEMPH1_G0, 0x0AA0},
 671                 {AUD_DEEMPH1_A0, 0x6B68},
 672                 {AUD_DEEMPH1_B0, 0x11EC},
 673                 {AUD_DEEMPH1_A1, 0x3FC66},
 674                 {AUD_DEEMPH1_B1, 0x399A},
 675
 676                 {AUD_POLYPH80SCALEFAC, 0x0003},
 677                 { /* end of list */ },
 678         };
 679
 680         /* It is enough to leave default values? */
 681         static const struct rlist fm_no_deemph[] = {
 682
 683                 {AUD_POLYPH80SCALEFAC, 0x0003},
 684                 { /* end of list */ },
 685         };
 686
 687         dprintk("%s (status: unknown)\n", __FUNCTION__);
 688         set_audio_start(core, SEL_FMRADIO);
 689
 690         switch (deemph) {
 691         case FM_NO_DEEMPH:
 692                 set_audio_registers(core, fm_no_deemph);
 693                 break;
 694
 695         case FM_DEEMPH_50:
 696                 set_audio_registers(core, fm_deemph_50);
 697                 break;
 698
 699         case FM_DEEMPH_75:
 700                 set_audio_registers(core, fm_deemph_75);
 701                 break;
 702         }
 703
 704         set_audio_finish(core, EN_FMRADIO_AUTO_STEREO);
 705 }
 706
 707 /* ----------------------------------------------------------- */
 708
 709 static int cx88_detect_nicam(struct cx88_core *core)
 710 {
 711         int i, j = 0;
 712
 713         dprintk("start nicam autodetect.\n");
 714
 715         for (i = 0; i < 6; i++) {
 716                 /* if bit1=1 then nicam is detected */
 717                 j += ((cx_read(AUD_NICAM_STATUS2) & 0x02) >> 1);
 718
 719                 if (j == 1) {
 720                         dprintk("nicam is detected.\n");
 721                         return 1;
 722                 }
 723
 724                 /* wait a little bit for next reading status */
 725                 msleep(10);
 726         }
 727
 728         dprintk("nicam is not detected.\n");
 729         return 0;
 730 }
 731
 732 void cx88_set_tvaudio(struct cx88_core *core)
 733 {
 734         switch (core->tvaudio) {
 735         case WW_BTSC:
 736                 set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
 737                 break;
 738         case WW_BG:
 739         case WW_DK:
 740         case WW_I:
 741         case WW_L:
 742                 /* prepare all dsp registers */
 743                 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
 744
 745                 /* set nicam mode - otherwise
 746                    AUD_NICAM_STATUS2 contains wrong values */
 747                 set_audio_standard_NICAM(core, EN_NICAM_AUTO_STEREO);
 748                 if (0 == cx88_detect_nicam(core)) {
 749                         /* fall back to fm / am mono */
 750                         set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
 751                         core->use_nicam = 0;
 752                 } else {
 753                         core->use_nicam = 1;
 754                 }
 755                 break;
 756         case WW_EIAJ:
 757                 set_audio_standard_EIAJ(core);
 758                 break;
 759         case WW_FM:
 760                 set_audio_standard_FM(core, FM_NO_DEEMPH);
 761                 break;
 762         case WW_NONE:
 763         default:
 764                 printk("%s/0: unknown tv audio mode [%d]\n",
 765                        core->name, core->tvaudio);
 766                 break;
 767         }
 768         return;
 769 }
 770
 771 void cx88_newstation(struct cx88_core *core)
 772 {
 773         core->audiomode_manual = UNSET;
 774 }
 775
 776 void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t)
 777 {
 778         static char *m[] = { "stereo", "dual mono", "mono", "sap" };
 779         static char *p[] = { "no pilot", "pilot c1", "pilot c2", "?" };
 780         u32 reg, mode, pilot;
 781
 782         reg = cx_read(AUD_STATUS);
 783         mode = reg & 0x03;
 784         pilot = (reg >> 2) & 0x03;
 785
 786         if (core->astat != reg)
 787                 dprintk("AUD_STATUS: 0x%x [%s/%s] ctl=%s\n",
 788                         reg, m[mode], p[pilot],
 789                         aud_ctl_names[cx_read(AUD_CTL) & 63]);
 790         core->astat = reg;
 791
 792 /* TODO
 793        Reading from AUD_STATUS is not enough
 794        for auto-detecting sap/dual-fm/nicam.
 795        Add some code here later.
 796 */
 797
 798         return;
 799 }
 800
 801 void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual)
 802 {
 803         u32 ctl = UNSET;
 804         u32 mask = UNSET;
 805
 806         if (manual) {
 807                 core->audiomode_manual = mode;
 808         } else {
 809                 if (UNSET != core->audiomode_manual)
 810                         return;
 811         }
 812         core->audiomode_current = mode;
 813
 814         switch (core->tvaudio) {
 815         case WW_BTSC:
 816                 switch (mode) {
 817                 case V4L2_TUNER_MODE_MONO:
 818                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_MONO);
 819                         break;
 820                 case V4L2_TUNER_MODE_LANG1:
 821                         set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
 822                         break;
 823                 case V4L2_TUNER_MODE_LANG2:
 824                         set_audio_standard_BTSC(core, 1, EN_BTSC_FORCE_SAP);
 825                         break;
 826                 case V4L2_TUNER_MODE_STEREO:
 827                 case V4L2_TUNER_MODE_LANG1_LANG2:
 828                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_STEREO);
 829                         break;
 830                 }
 831                 break;
 832         case WW_BG:
 833         case WW_DK:
 834         case WW_I:
 835         case WW_L:
 836                 if (1 == core->use_nicam) {
 837                         switch (mode) {
 838                         case V4L2_TUNER_MODE_MONO:
 839                         case V4L2_TUNER_MODE_LANG1:
 840                                 set_audio_standard_NICAM(core,
 841                                                          EN_NICAM_FORCE_MONO1);
 842                                 break;
 843                         case V4L2_TUNER_MODE_LANG2:
 844                                 set_audio_standard_NICAM(core,
 845                                                          EN_NICAM_FORCE_MONO2);
 846                                 break;
 847                         case V4L2_TUNER_MODE_STEREO:
 848                         case V4L2_TUNER_MODE_LANG1_LANG2:
 849                                 set_audio_standard_NICAM(core,
 850                                                          EN_NICAM_FORCE_STEREO);
 851                                 break;
 852                         }
 853                 } else {
 854                         if ((core->tvaudio == WW_I) || (core->tvaudio == WW_L)) {
 855                                 /* fall back to fm / am mono */
 856                                 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
 857                         } else {
 858                                 /* TODO: Add A2 autodection */
 859                                 switch (mode) {
 860                                 case V4L2_TUNER_MODE_MONO:
 861                                 case V4L2_TUNER_MODE_LANG1:
 862                                         set_audio_standard_A2(core,
 863                                                               EN_A2_FORCE_MONO1);
 864                                         break;
 865                                 case V4L2_TUNER_MODE_LANG2:
 866                                         set_audio_standard_A2(core,
 867                                                               EN_A2_FORCE_MONO2);
 868                                         break;
 869                                 case V4L2_TUNER_MODE_STEREO:
 870                                 case V4L2_TUNER_MODE_LANG1_LANG2:
 871                                         set_audio_standard_A2(core,
 872                                                               EN_A2_FORCE_STEREO);
 873                                         break;
 874                                 }
 875                         }
 876                 }
 877                 break;
 878         case WW_FM:
 879                 switch (mode) {
 880                 case V4L2_TUNER_MODE_MONO:
 881                         ctl = EN_FMRADIO_FORCE_MONO;
 882                         mask = 0x3f;
 883                         break;
 884                 case V4L2_TUNER_MODE_STEREO:
 885                         ctl = EN_FMRADIO_AUTO_STEREO;
 886                         mask = 0x3f;
 887                         break;
 888                 }
 889                 break;
 890         }
 891
 892         if (UNSET != ctl) {
 893                 dprintk("cx88_set_stereo: mask 0x%x, ctl 0x%x "
 894                         "[status=0x%x,ctl=0x%x,vol=0x%x]\n",
 895                         mask, ctl, cx_read(AUD_STATUS),
 896                         cx_read(AUD_CTL), cx_sread(SHADOW_AUD_VOL_CTL));
 897                 cx_andor(AUD_CTL, mask, ctl);
 898         }
 899         return;
 900 }
 901
 902 int cx88_audio_thread(void *data)
 903 {
 904         struct cx88_core *core = data;
 905         struct v4l2_tuner t;
 906         u32 mode = 0;
 907
 908         dprintk("cx88: tvaudio thread started\n");
 909         set_freezable();
 910         for (;;) {
 911                 msleep_interruptible(1000);
 912                 if (kthread_should_stop())
 913                         break;
 914                 try_to_freeze();
 915
 916                 /* just monitor the audio status for now ... */
 917                 memset(&t, 0, sizeof(t));
 918                 cx88_get_stereo(core, &t);
 919
 920                 if (UNSET != core->audiomode_manual)
 921                         /* manually set, don't do anything. */
 922                         continue;
 923
 924                 /* monitor signal */
 925                 if (t.rxsubchans & V4L2_TUNER_SUB_STEREO)
 926                         mode = V4L2_TUNER_MODE_STEREO;
 927                 else
 928                         mode = V4L2_TUNER_MODE_MONO;
 929                 if (mode == core->audiomode_current)
 930                         continue;
 931
 932                 /* automatically switch to best available mode */
 933                 cx88_set_stereo(core, mode, 0);
 934         }
 935
 936         dprintk("cx88: tvaudio thread exiting\n");
 937         return 0;
 938 }
 939
 940 /* ----------------------------------------------------------- */
 941
 942 EXPORT_SYMBOL(cx88_set_tvaudio);
 943 EXPORT_SYMBOL(cx88_newstation);
 944 EXPORT_SYMBOL(cx88_set_stereo);
 945 EXPORT_SYMBOL(cx88_get_stereo);
 946 EXPORT_SYMBOL(cx88_audio_thread);
 947
 948 /*
 949  * Local variables:
 950  * c-basic-offset: 8
 951  * End:
 952  * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
 953  */