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Remove obsolete #include <linux/config.h>
[linux-2.6/verdex.git] / drivers / ide / pci / pdc202xx_new.c
blob6c097e80b4dff9716b4ad0220fa520b101991389
1 /*
2 * Promise TX2/TX4/TX2000/133 IDE driver
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 *
9 * Split from:
10 * linux/drivers/ide/pdc202xx.c Version 0.35 Mar. 30, 2002
11 * Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org>
12 * Portions Copyright (C) 1999 Promise Technology, Inc.
13 * Author: Frank Tiernan (frankt@promise.com)
14 * Released under terms of General Public License
15 */
16
17 #include <linux/module.h>
18 #include <linux/types.h>
19 #include <linux/kernel.h>
20 #include <linux/delay.h>
21 #include <linux/timer.h>
22 #include <linux/mm.h>
23 #include <linux/ioport.h>
24 #include <linux/blkdev.h>
25 #include <linux/hdreg.h>
26 #include <linux/interrupt.h>
27 #include <linux/pci.h>
28 #include <linux/init.h>
29 #include <linux/ide.h>
30
31 #include <asm/io.h>
32 #include <asm/irq.h>
33
34 #ifdef CONFIG_PPC_PMAC
35 #include <asm/prom.h>
36 #include <asm/pci-bridge.h>
37 #endif
38
39 #define PDC202_DEBUG_CABLE 0
40
41 static const char *pdc_quirk_drives[] = {
42 "QUANTUM FIREBALLlct08 08",
43 "QUANTUM FIREBALLP KA6.4",
44 "QUANTUM FIREBALLP KA9.1",
45 "QUANTUM FIREBALLP LM20.4",
46 "QUANTUM FIREBALLP KX13.6",
47 "QUANTUM FIREBALLP KX20.5",
48 "QUANTUM FIREBALLP KX27.3",
49 "QUANTUM FIREBALLP LM20.5",
50 NULL
51 };
52
53 #define set_2regs(a, b) \
54 do { \
55 hwif->OUTB((a + adj), indexreg); \
56 hwif->OUTB(b, datareg); \
57 } while(0)
58
59 #define set_ultra(a, b, c) \
60 do { \
61 set_2regs(0x10,(a)); \
62 set_2regs(0x11,(b)); \
63 set_2regs(0x12,(c)); \
64 } while(0)
65
66 #define set_ata2(a, b) \
67 do { \
68 set_2regs(0x0e,(a)); \
69 set_2regs(0x0f,(b)); \
70 } while(0)
71
72 #define set_pio(a, b, c) \
73 do { \
74 set_2regs(0x0c,(a)); \
75 set_2regs(0x0d,(b)); \
76 set_2regs(0x13,(c)); \
77 } while(0)
78
79 static u8 pdcnew_ratemask (ide_drive_t *drive)
80 {
81 u8 mode;
82
83 switch(HWIF(drive)->pci_dev->device) {
84 case PCI_DEVICE_ID_PROMISE_20277:
85 case PCI_DEVICE_ID_PROMISE_20276:
86 case PCI_DEVICE_ID_PROMISE_20275:
87 case PCI_DEVICE_ID_PROMISE_20271:
88 case PCI_DEVICE_ID_PROMISE_20269:
89 mode = 4;
90 break;
91 case PCI_DEVICE_ID_PROMISE_20270:
92 case PCI_DEVICE_ID_PROMISE_20268:
93 mode = 3;
94 break;
95 default:
96 return 0;
97 }
98 if (!eighty_ninty_three(drive))
99 mode = min(mode, (u8)1);
100 return mode;
101 }
102
103 static int check_in_drive_lists (ide_drive_t *drive, const char **list)
104 {
105 struct hd_driveid *id = drive->id;
106
107 if (pdc_quirk_drives == list) {
108 while (*list) {
109 if (strstr(id->model, *list++)) {
110 return 2;
111 }
112 }
113 } else {
114 while (*list) {
115 if (!strcmp(*list++,id->model)) {
116 return 1;
117 }
118 }
119 }
120 return 0;
121 }
122
123 static int pdcnew_new_tune_chipset (ide_drive_t *drive, u8 xferspeed)
124 {
125 ide_hwif_t *hwif = HWIF(drive);
126 unsigned long indexreg = hwif->dma_vendor1;
127 unsigned long datareg = hwif->dma_vendor3;
128 u8 thold = 0x10;
129 u8 adj = (drive->dn%2) ? 0x08 : 0x00;
130 u8 speed = ide_rate_filter(pdcnew_ratemask(drive), xferspeed);
131
132 if (speed == XFER_UDMA_2) {
133 hwif->OUTB((thold + adj), indexreg);
134 hwif->OUTB((hwif->INB(datareg) & 0x7f), datareg);
135 }
136
137 switch (speed) {
138 case XFER_UDMA_7:
139 speed = XFER_UDMA_6;
140 case XFER_UDMA_6: set_ultra(0x1a, 0x01, 0xcb); break;
141 case XFER_UDMA_5: set_ultra(0x1a, 0x02, 0xcb); break;
142 case XFER_UDMA_4: set_ultra(0x1a, 0x03, 0xcd); break;
143 case XFER_UDMA_3: set_ultra(0x1a, 0x05, 0xcd); break;
144 case XFER_UDMA_2: set_ultra(0x2a, 0x07, 0xcd); break;
145 case XFER_UDMA_1: set_ultra(0x3a, 0x0a, 0xd0); break;
146 case XFER_UDMA_0: set_ultra(0x4a, 0x0f, 0xd5); break;
147 case XFER_MW_DMA_2: set_ata2(0x69, 0x25); break;
148 case XFER_MW_DMA_1: set_ata2(0x6b, 0x27); break;
149 case XFER_MW_DMA_0: set_ata2(0xdf, 0x5f); break;
150 case XFER_PIO_4: set_pio(0x23, 0x09, 0x25); break;
151 case XFER_PIO_3: set_pio(0x27, 0x0d, 0x35); break;
152 case XFER_PIO_2: set_pio(0x23, 0x26, 0x64); break;
153 case XFER_PIO_1: set_pio(0x46, 0x29, 0xa4); break;
154 case XFER_PIO_0: set_pio(0xfb, 0x2b, 0xac); break;
155 default:
156 ;
157 }
158
159 return (ide_config_drive_speed(drive, speed));
160 }
161
162 /* 0 1 2 3 4 5 6 7 8
163 * 960, 480, 390, 300, 240, 180, 120, 90, 60
164 * 180, 150, 120, 90, 60
165 * DMA_Speed
166 * 180, 120, 90, 90, 90, 60, 30
167 * 11, 5, 4, 3, 2, 1, 0
168 */
169 static void pdcnew_tune_drive(ide_drive_t *drive, u8 pio)
170 {
171 u8 speed;
172
173 if (pio == 5) pio = 4;
174 speed = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, pio, NULL);
175
176 (void)pdcnew_new_tune_chipset(drive, speed);
177 }
178
179 static u8 pdcnew_new_cable_detect (ide_hwif_t *hwif)
180 {
181 hwif->OUTB(0x0b, hwif->dma_vendor1);
182 return ((u8)((hwif->INB(hwif->dma_vendor3) & 0x04)));
183 }
184 static int config_chipset_for_dma (ide_drive_t *drive)
185 {
186 struct hd_driveid *id = drive->id;
187 ide_hwif_t *hwif = HWIF(drive);
188 u8 speed = -1;
189 u8 cable;
190
191 u8 ultra_66 = ((id->dma_ultra & 0x0010) ||
192 (id->dma_ultra & 0x0008)) ? 1 : 0;
193
194 cable = pdcnew_new_cable_detect(hwif);
195
196 if (ultra_66 && cable) {
197 printk(KERN_WARNING "Warning: %s channel requires an 80-pin cable for operation.\n", hwif->channel ? "Secondary":"Primary");
198 printk(KERN_WARNING "%s reduced to Ultra33 mode.\n", drive->name);
199 }
200
201 if (drive->media != ide_disk)
202 return 0;
203 if (id->capability & 4) { /* IORDY_EN & PREFETCH_EN */
204 hwif->OUTB((0x13 + ((drive->dn%2) ? 0x08 : 0x00)), hwif->dma_vendor1);
205 hwif->OUTB((hwif->INB(hwif->dma_vendor3)|0x03), hwif->dma_vendor3);
206 }
207
208 speed = ide_dma_speed(drive, pdcnew_ratemask(drive));
209
210 if (!(speed)) {
211 hwif->tuneproc(drive, 5);
212 return 0;
213 }
214
215 (void) hwif->speedproc(drive, speed);
216 return ide_dma_enable(drive);
217 }
218
219 static int pdcnew_config_drive_xfer_rate (ide_drive_t *drive)
220 {
221 ide_hwif_t *hwif = HWIF(drive);
222 struct hd_driveid *id = drive->id;
223
224 drive->init_speed = 0;
225
226 if (id && (id->capability & 1) && drive->autodma) {
227
228 if (ide_use_dma(drive)) {
229 if (config_chipset_for_dma(drive))
230 return hwif->ide_dma_on(drive);
231 }
232
233 goto fast_ata_pio;
234
235 } else if ((id->capability & 8) || (id->field_valid & 2)) {
236 fast_ata_pio:
237 hwif->tuneproc(drive, 5);
238 return hwif->ide_dma_off_quietly(drive);
239 }
240 /* IORDY not supported */
241 return 0;
242 }
243
244 static int pdcnew_quirkproc (ide_drive_t *drive)
245 {
246 return ((int) check_in_drive_lists(drive, pdc_quirk_drives));
247 }
248
249 static int pdcnew_ide_dma_lostirq(ide_drive_t *drive)
250 {
251 if (HWIF(drive)->resetproc != NULL)
252 HWIF(drive)->resetproc(drive);
253 return __ide_dma_lostirq(drive);
254 }
255
256 static int pdcnew_ide_dma_timeout(ide_drive_t *drive)
257 {
258 if (HWIF(drive)->resetproc != NULL)
259 HWIF(drive)->resetproc(drive);
260 return __ide_dma_timeout(drive);
261 }
262
263 static void pdcnew_new_reset (ide_drive_t *drive)
264 {
265 /*
266 * Deleted this because it is redundant from the caller.
267 */
268 printk(KERN_WARNING "PDC202XX: %s channel reset.\n",
269 HWIF(drive)->channel ? "Secondary" : "Primary");
270 }
271
272 #ifdef CONFIG_PPC_PMAC
273 static void __devinit apple_kiwi_init(struct pci_dev *pdev)
274 {
275 struct device_node *np = pci_device_to_OF_node(pdev);
276 unsigned int class_rev = 0;
277 void __iomem *mmio;
278 u8 conf;
279
280 if (np == NULL || !device_is_compatible(np, "kiwi-root"))
281 return;
282
283 pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev);
284 class_rev &= 0xff;
285
286 if (class_rev >= 0x03) {
287 /* Setup chip magic config stuff (from darwin) */
288 pci_read_config_byte(pdev, 0x40, &conf);
289 pci_write_config_byte(pdev, 0x40, conf | 0x01);
290 }
291 mmio = ioremap(pci_resource_start(pdev, 5),
292 pci_resource_len(pdev, 5));
293
294 /* Setup some PLL stuffs */
295 switch (pdev->device) {
296 case PCI_DEVICE_ID_PROMISE_20270:
297 writew(0x0d2b, mmio + 0x1202);
298 mdelay(30);
299 break;
300 case PCI_DEVICE_ID_PROMISE_20271:
301 writew(0x0826, mmio + 0x1202);
302 mdelay(30);
303 break;
304 }
305
306 iounmap(mmio);
307 }
308 #endif /* CONFIG_PPC_PMAC */
309
310 static unsigned int __devinit init_chipset_pdcnew(struct pci_dev *dev, const char *name)
311 {
312 if (dev->resource[PCI_ROM_RESOURCE].start) {
313 pci_write_config_dword(dev, PCI_ROM_ADDRESS,
314 dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
315 printk(KERN_INFO "%s: ROM enabled at 0x%08lx\n", name,
316 (unsigned long)dev->resource[PCI_ROM_RESOURCE].start);
317 }
318
319 #ifdef CONFIG_PPC_PMAC
320 apple_kiwi_init(dev);
321 #endif
322
323 return dev->irq;
324 }
325
326 static void __devinit init_hwif_pdc202new(ide_hwif_t *hwif)
327 {
328 hwif->autodma = 0;
329
330 hwif->tuneproc = &pdcnew_tune_drive;
331 hwif->quirkproc = &pdcnew_quirkproc;
332 hwif->speedproc = &pdcnew_new_tune_chipset;
333 hwif->resetproc = &pdcnew_new_reset;
334
335 hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
336
337 hwif->ultra_mask = 0x7f;
338 hwif->mwdma_mask = 0x07;
339
340 hwif->err_stops_fifo = 1;
341
342 hwif->ide_dma_check = &pdcnew_config_drive_xfer_rate;
343 hwif->ide_dma_lostirq = &pdcnew_ide_dma_lostirq;
344 hwif->ide_dma_timeout = &pdcnew_ide_dma_timeout;
345 if (!(hwif->udma_four))
346 hwif->udma_four = (pdcnew_new_cable_detect(hwif)) ? 0 : 1;
347 if (!noautodma)
348 hwif->autodma = 1;
349 hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma;
350 #if PDC202_DEBUG_CABLE
351 printk(KERN_DEBUG "%s: %s-pin cable\n",
352 hwif->name, hwif->udma_four ? "80" : "40");
353 #endif /* PDC202_DEBUG_CABLE */
354 }
355
356 static int __devinit init_setup_pdcnew(struct pci_dev *dev, ide_pci_device_t *d)
357 {
358 return ide_setup_pci_device(dev, d);
359 }
360
361 static int __devinit init_setup_pdc20270(struct pci_dev *dev,
362 ide_pci_device_t *d)
363 {
364 struct pci_dev *findev = NULL;
365
366 if ((dev->bus->self &&
367 dev->bus->self->vendor == PCI_VENDOR_ID_DEC) &&
368 (dev->bus->self->device == PCI_DEVICE_ID_DEC_21150)) {
369 if (PCI_SLOT(dev->devfn) & 2)
370 return -ENODEV;
371 d->extra = 0;
372 while ((findev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, findev)) != NULL) {
373 if ((findev->vendor == dev->vendor) &&
374 (findev->device == dev->device) &&
375 (PCI_SLOT(findev->devfn) & 2)) {
376 if (findev->irq != dev->irq) {
377 findev->irq = dev->irq;
378 }
379 return ide_setup_pci_devices(dev, findev, d);
380 }
381 }
382 }
383 return ide_setup_pci_device(dev, d);
384 }
385
386 static int __devinit init_setup_pdc20276(struct pci_dev *dev,
387 ide_pci_device_t *d)
388 {
389 if ((dev->bus->self) &&
390 (dev->bus->self->vendor == PCI_VENDOR_ID_INTEL) &&
391 ((dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960) ||
392 (dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960RM))) {
393 printk(KERN_INFO "ide: Skipping Promise PDC20276 "
394 "attached to I2O RAID controller.\n");
395 return -ENODEV;
396 }
397 return ide_setup_pci_device(dev, d);
398 }
399
400 static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
401 { /* 0 */
402 .name = "PDC20268",
403 .init_setup = init_setup_pdcnew,
404 .init_chipset = init_chipset_pdcnew,
405 .init_hwif = init_hwif_pdc202new,
406 .channels = 2,
407 .autodma = AUTODMA,
408 .bootable = OFF_BOARD,
409 },{ /* 1 */
410 .name = "PDC20269",
411 .init_setup = init_setup_pdcnew,
412 .init_chipset = init_chipset_pdcnew,
413 .init_hwif = init_hwif_pdc202new,
414 .channels = 2,
415 .autodma = AUTODMA,
416 .bootable = OFF_BOARD,
417 },{ /* 2 */
418 .name = "PDC20270",
419 .init_setup = init_setup_pdc20270,
420 .init_chipset = init_chipset_pdcnew,
421 .init_hwif = init_hwif_pdc202new,
422 .channels = 2,
423 .autodma = AUTODMA,
424 .bootable = OFF_BOARD,
425 },{ /* 3 */
426 .name = "PDC20271",
427 .init_setup = init_setup_pdcnew,
428 .init_chipset = init_chipset_pdcnew,
429 .init_hwif = init_hwif_pdc202new,
430 .channels = 2,
431 .autodma = AUTODMA,
432 .bootable = OFF_BOARD,
433 },{ /* 4 */
434 .name = "PDC20275",
435 .init_setup = init_setup_pdcnew,
436 .init_chipset = init_chipset_pdcnew,
437 .init_hwif = init_hwif_pdc202new,
438 .channels = 2,
439 .autodma = AUTODMA,
440 .bootable = OFF_BOARD,
441 },{ /* 5 */
442 .name = "PDC20276",
443 .init_setup = init_setup_pdc20276,
444 .init_chipset = init_chipset_pdcnew,
445 .init_hwif = init_hwif_pdc202new,
446 .channels = 2,
447 .autodma = AUTODMA,
448 .bootable = OFF_BOARD,
449 },{ /* 6 */
450 .name = "PDC20277",
451 .init_setup = init_setup_pdcnew,
452 .init_chipset = init_chipset_pdcnew,
453 .init_hwif = init_hwif_pdc202new,
454 .channels = 2,
455 .autodma = AUTODMA,
456 .bootable = OFF_BOARD,
457 }
458 };
459
460 /**
461 * pdc202new_init_one - called when a pdc202xx is found
462 * @dev: the pdc202new device
463 * @id: the matching pci id
464 *
465 * Called when the PCI registration layer (or the IDE initialization)
466 * finds a device matching our IDE device tables.
467 */
468
469 static int __devinit pdc202new_init_one(struct pci_dev *dev, const struct pci_device_id *id)
470 {
471 ide_pci_device_t *d = &pdcnew_chipsets[id->driver_data];
472
473 return d->init_setup(dev, d);
474 }
475
476 static struct pci_device_id pdc202new_pci_tbl[] = {
477 { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20268, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
478 { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20269, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
479 { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20270, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
480 { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20271, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3},
481 { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20275, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4},
482 { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20276, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5},
483 { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20277, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6},
484 { 0, },
485 };
486 MODULE_DEVICE_TABLE(pci, pdc202new_pci_tbl);
487
488 static struct pci_driver driver = {
489 .name = "Promise_IDE",
490 .id_table = pdc202new_pci_tbl,
491 .probe = pdc202new_init_one,
492 };
493
494 static int pdc202new_ide_init(void)
495 {
496 return ide_pci_register_driver(&driver);
497 }
498
499 module_init(pdc202new_ide_init);
500
501 MODULE_AUTHOR("Andre Hedrick, Frank Tiernan");
502 MODULE_DESCRIPTION("PCI driver module for Promise PDC20268 and higher");
503 MODULE_LICENSE("GPL");
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