2 * $Id: pmc551.c,v 1.32 2005/11/07 11:14:25 gleixner Exp $
4 * PMC551 PCI Mezzanine Ram Device
7 * Mark Ferrell <mferrell@mvista.com>
8 * Copyright 1999,2000 Nortel Networks
11 * As part of this driver was derived from the slram.c driver it
12 * falls under the same license, which is GNU General Public
16 * This driver is intended to support the PMC551 PCI Ram device
17 * from Ramix Inc. The PMC551 is a PMC Mezzanine module for
18 * cPCI embedded systems. The device contains a single SROM
19 * that initially programs the V370PDC chipset onboard the
20 * device, and various banks of DRAM/SDRAM onboard. This driver
21 * implements this PCI Ram device as an MTD (Memory Technology
22 * Device) so that it can be used to hold a file system, or for
23 * added swap space in embedded systems. Since the memory on
24 * this board isn't as fast as main memory we do not try to hook
25 * it into main memory as that would simply reduce performance
26 * on the system. Using it as a block device allows us to use
27 * it as high speed swap or for a high speed disk device of some
28 * sort. Which becomes very useful on diskless systems in the
29 * embedded market I might add.
32 * Due to what I assume is more buggy SROM, the 64M PMC551 I
33 * have available claims that all 4 of it's DRAM banks have 64M
34 * of ram configured (making a grand total of 256M onboard).
35 * This is slightly annoying since the BAR0 size reflects the
36 * aperture size, not the dram size, and the V370PDC supplies no
37 * other method for memory size discovery. This problem is
38 * mostly only relevant when compiled as a module, as the
39 * unloading of the module with an aperture size smaller then
40 * the ram will cause the driver to detect the onboard memory
41 * size to be equal to the aperture size when the module is
42 * reloaded. Soooo, to help, the module supports an msize
43 * option to allow the specification of the onboard memory, and
44 * an asize option, to allow the specification of the aperture
45 * size. The aperture must be equal to or less then the memory
46 * size, the driver will correct this if you screw it up. This
47 * problem is not relevant for compiled in drivers as compiled
48 * in drivers only init once.
51 * Saeed Karamooz <saeed@ramix.com> of Ramix INC. for the
52 * initial example code of how to initialize this device and for
53 * help with questions I had concerning operation of the device.
55 * Most of the MTD code for this driver was originally written
56 * for the slram.o module in the MTD drivers package which
57 * allows the mapping of system memory into an MTD device.
58 * Since the PMC551 memory module is accessed in the same
59 * fashion as system memory, the slram.c code became a very nice
60 * fit to the needs of this driver. All we added was PCI
61 * detection/initialization to the driver and automatically figure
62 * out the size via the PCI detection.o, later changes by Corey
63 * Minyard set up the card to utilize a 1M sliding apature.
65 * Corey Minyard <minyard@nortelnetworks.com>
66 * * Modified driver to utilize a sliding aperture instead of
67 * mapping all memory into kernel space which turned out to
69 * * Located a bug in the SROM's initialization sequence that
70 * made the memory unusable, added a fix to code to touch up
74 * * MUST fix the init function to not spin on a register
75 * waiting for it to set .. this does not safely handle busted
76 * devices that never reset the register correctly which will
77 * cause the system to hang w/ a reboot being the only chance at
78 * recover. [sort of fixed, could be better]
79 * * Add I2C handling of the SROM so we can read the SROM's information
80 * about the aperture size. This should always accurately reflect the
81 * onboard memory size.
82 * * Comb the init routine. It's still a bit cludgy on a few things.
85 #include <linux/kernel.h>
86 #include <linux/module.h>
87 #include <asm/uaccess.h>
88 #include <linux/types.h>
89 #include <linux/sched.h>
90 #include <linux/init.h>
91 #include <linux/ptrace.h>
92 #include <linux/slab.h>
93 #include <linux/string.h>
94 #include <linux/timer.h>
95 #include <linux/major.h>
97 #include <linux/ioctl.h>
99 #include <asm/system.h>
100 #include <linux/pci.h>
103 #error Enable PCI in your kernel config
106 #include <linux/mtd/mtd.h>
107 #include <linux/mtd/pmc551.h>
108 #include <linux/mtd/compatmac.h>
110 static struct mtd_info
*pmc551list
;
112 static int pmc551_erase (struct mtd_info
*mtd
, struct erase_info
*instr
)
114 struct mypriv
*priv
= mtd
->priv
;
115 u32 soff_hi
, soff_lo
; /* start address offset hi/lo */
116 u32 eoff_hi
, eoff_lo
; /* end address offset hi/lo */
121 #ifdef CONFIG_MTD_PMC551_DEBUG
122 printk(KERN_DEBUG
"pmc551_erase(pos:%ld, len:%ld)\n", (long)instr
->addr
, (long)instr
->len
);
125 end
= instr
->addr
+ instr
->len
- 1;
127 /* Is it past the end? */
128 if ( end
> mtd
->size
) {
129 #ifdef CONFIG_MTD_PMC551_DEBUG
130 printk(KERN_DEBUG
"pmc551_erase() out of bounds (%ld > %ld)\n", (long)end
, (long)mtd
->size
);
135 eoff_hi
= end
& ~(priv
->asize
- 1);
136 soff_hi
= instr
->addr
& ~(priv
->asize
- 1);
137 eoff_lo
= end
& (priv
->asize
- 1);
138 soff_lo
= instr
->addr
& (priv
->asize
- 1);
140 pmc551_point (mtd
, instr
->addr
, instr
->len
, &retlen
, &ptr
);
142 if ( soff_hi
== eoff_hi
|| mtd
->size
== priv
->asize
) {
143 /* The whole thing fits within one access, so just one shot
145 memset(ptr
, 0xff, instr
->len
);
147 /* We have to do multiple writes to get all the data
149 while (soff_hi
!= eoff_hi
) {
150 #ifdef CONFIG_MTD_PMC551_DEBUG
151 printk( KERN_DEBUG
"pmc551_erase() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi
, (long)eoff_hi
);
153 memset(ptr
, 0xff, priv
->asize
);
154 if (soff_hi
+ priv
->asize
>= mtd
->size
) {
157 soff_hi
+= priv
->asize
;
158 pmc551_point (mtd
,(priv
->base_map0
|soff_hi
),
159 priv
->asize
, &retlen
, &ptr
);
161 memset (ptr
, 0xff, eoff_lo
);
165 instr
->state
= MTD_ERASE_DONE
;
166 #ifdef CONFIG_MTD_PMC551_DEBUG
167 printk(KERN_DEBUG
"pmc551_erase() done\n");
170 mtd_erase_callback(instr
);
175 static int pmc551_point (struct mtd_info
*mtd
, loff_t from
, size_t len
, size_t *retlen
, u_char
**mtdbuf
)
177 struct mypriv
*priv
= mtd
->priv
;
181 #ifdef CONFIG_MTD_PMC551_DEBUG
182 printk(KERN_DEBUG
"pmc551_point(%ld, %ld)\n", (long)from
, (long)len
);
185 if (from
+ len
> mtd
->size
) {
186 #ifdef CONFIG_MTD_PMC551_DEBUG
187 printk(KERN_DEBUG
"pmc551_point() out of bounds (%ld > %ld)\n", (long)from
+len
, (long)mtd
->size
);
192 soff_hi
= from
& ~(priv
->asize
- 1);
193 soff_lo
= from
& (priv
->asize
- 1);
195 /* Cheap hack optimization */
196 if( priv
->curr_map0
!= from
) {
197 pci_write_config_dword ( priv
->dev
, PMC551_PCI_MEM_MAP0
,
198 (priv
->base_map0
| soff_hi
) );
199 priv
->curr_map0
= soff_hi
;
202 *mtdbuf
= priv
->start
+ soff_lo
;
208 static void pmc551_unpoint (struct mtd_info
*mtd
, u_char
*addr
, loff_t from
, size_t len
)
210 #ifdef CONFIG_MTD_PMC551_DEBUG
211 printk(KERN_DEBUG
"pmc551_unpoint()\n");
216 static int pmc551_read (struct mtd_info
*mtd
, loff_t from
, size_t len
, size_t *retlen
, u_char
*buf
)
218 struct mypriv
*priv
= mtd
->priv
;
219 u32 soff_hi
, soff_lo
; /* start address offset hi/lo */
220 u32 eoff_hi
, eoff_lo
; /* end address offset hi/lo */
223 u_char
*copyto
= buf
;
225 #ifdef CONFIG_MTD_PMC551_DEBUG
226 printk(KERN_DEBUG
"pmc551_read(pos:%ld, len:%ld) asize: %ld\n", (long)from
, (long)len
, (long)priv
->asize
);
229 end
= from
+ len
- 1;
231 /* Is it past the end? */
232 if (end
> mtd
->size
) {
233 #ifdef CONFIG_MTD_PMC551_DEBUG
234 printk(KERN_DEBUG
"pmc551_read() out of bounds (%ld > %ld)\n", (long) end
, (long)mtd
->size
);
239 soff_hi
= from
& ~(priv
->asize
- 1);
240 eoff_hi
= end
& ~(priv
->asize
- 1);
241 soff_lo
= from
& (priv
->asize
- 1);
242 eoff_lo
= end
& (priv
->asize
- 1);
244 pmc551_point (mtd
, from
, len
, retlen
, &ptr
);
246 if (soff_hi
== eoff_hi
) {
247 /* The whole thing fits within one access, so just one shot
249 memcpy(copyto
, ptr
, len
);
252 /* We have to do multiple writes to get all the data
254 while (soff_hi
!= eoff_hi
) {
255 #ifdef CONFIG_MTD_PMC551_DEBUG
256 printk( KERN_DEBUG
"pmc551_read() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi
, (long)eoff_hi
);
258 memcpy(copyto
, ptr
, priv
->asize
);
259 copyto
+= priv
->asize
;
260 if (soff_hi
+ priv
->asize
>= mtd
->size
) {
263 soff_hi
+= priv
->asize
;
264 pmc551_point (mtd
, soff_hi
, priv
->asize
, retlen
, &ptr
);
266 memcpy(copyto
, ptr
, eoff_lo
);
271 #ifdef CONFIG_MTD_PMC551_DEBUG
272 printk(KERN_DEBUG
"pmc551_read() done\n");
274 *retlen
= copyto
- buf
;
278 static int pmc551_write (struct mtd_info
*mtd
, loff_t to
, size_t len
, size_t *retlen
, const u_char
*buf
)
280 struct mypriv
*priv
= mtd
->priv
;
281 u32 soff_hi
, soff_lo
; /* start address offset hi/lo */
282 u32 eoff_hi
, eoff_lo
; /* end address offset hi/lo */
285 const u_char
*copyfrom
= buf
;
288 #ifdef CONFIG_MTD_PMC551_DEBUG
289 printk(KERN_DEBUG
"pmc551_write(pos:%ld, len:%ld) asize:%ld\n", (long)to
, (long)len
, (long)priv
->asize
);
293 /* Is it past the end? or did the u32 wrap? */
294 if (end
> mtd
->size
) {
295 #ifdef CONFIG_MTD_PMC551_DEBUG
296 printk(KERN_DEBUG
"pmc551_write() out of bounds (end: %ld, size: %ld, to: %ld)\n", (long) end
, (long)mtd
->size
, (long)to
);
301 soff_hi
= to
& ~(priv
->asize
- 1);
302 eoff_hi
= end
& ~(priv
->asize
- 1);
303 soff_lo
= to
& (priv
->asize
- 1);
304 eoff_lo
= end
& (priv
->asize
- 1);
306 pmc551_point (mtd
, to
, len
, retlen
, &ptr
);
308 if (soff_hi
== eoff_hi
) {
309 /* The whole thing fits within one access, so just one shot
311 memcpy(ptr
, copyfrom
, len
);
314 /* We have to do multiple writes to get all the data
316 while (soff_hi
!= eoff_hi
) {
317 #ifdef CONFIG_MTD_PMC551_DEBUG
318 printk( KERN_DEBUG
"pmc551_write() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi
, (long)eoff_hi
);
320 memcpy(ptr
, copyfrom
, priv
->asize
);
321 copyfrom
+= priv
->asize
;
322 if (soff_hi
>= mtd
->size
) {
325 soff_hi
+= priv
->asize
;
326 pmc551_point (mtd
, soff_hi
, priv
->asize
, retlen
, &ptr
);
328 memcpy(ptr
, copyfrom
, eoff_lo
);
333 #ifdef CONFIG_MTD_PMC551_DEBUG
334 printk(KERN_DEBUG
"pmc551_write() done\n");
336 *retlen
= copyfrom
- buf
;
341 * Fixup routines for the V370PDC
342 * PCI device ID 0x020011b0
344 * This function basicly kick starts the DRAM oboard the card and gets it
345 * ready to be used. Before this is done the device reads VERY erratic, so
346 * much that it can crash the Linux 2.2.x series kernels when a user cat's
347 * /proc/pci .. though that is mainly a kernel bug in handling the PCI DEVSEL
348 * register. FIXME: stop spinning on registers .. must implement a timeout
350 * returns the size of the memory region found.
352 static u32
fixup_pmc551 (struct pci_dev
*dev
)
354 #ifdef CONFIG_MTD_PMC551_BUGFIX
357 u32 size
, dcmd
, cfg
, dtmp
;
367 * Attempt to reset the card
368 * FIXME: Stop Spinning registers
371 /* unlock registers */
372 pci_write_config_byte(dev
, PMC551_SYS_CTRL_REG
, 0xA5 );
373 /* read in old data */
374 pci_read_config_byte(dev
, PMC551_SYS_CTRL_REG
, &bcmd
);
375 /* bang the reset line up and down for a few */
379 while(counter
++ < 100) {
380 pci_write_config_byte(dev
, PMC551_SYS_CTRL_REG
, bcmd
);
384 while(counter
++ < 100) {
385 pci_write_config_byte(dev
, PMC551_SYS_CTRL_REG
, bcmd
);
389 pci_write_config_byte(dev
, PMC551_SYS_CTRL_REG
, bcmd
);
392 * Take care and turn off the memory on the device while we
393 * tweak the configurations
395 pci_read_config_word(dev
, PCI_COMMAND
, &cmd
);
396 tmp
= cmd
& ~(PCI_COMMAND_IO
|PCI_COMMAND_MEMORY
);
397 pci_write_config_word(dev
, PCI_COMMAND
, tmp
);
400 * Disable existing aperture before probing memory size
402 pci_read_config_dword(dev
, PMC551_PCI_MEM_MAP0
, &dcmd
);
403 dtmp
=(dcmd
|PMC551_PCI_MEM_MAP_ENABLE
|PMC551_PCI_MEM_MAP_REG_EN
);
404 pci_write_config_dword(dev
, PMC551_PCI_MEM_MAP0
, dtmp
);
406 * Grab old BAR0 config so that we can figure out memory size
407 * This is another bit of kludge going on. The reason for the
408 * redundancy is I am hoping to retain the original configuration
409 * previously assigned to the card by the BIOS or some previous
410 * fixup routine in the kernel. So we read the old config into cfg,
411 * then write all 1's to the memory space, read back the result into
412 * "size", and then write back all the old config.
414 pci_read_config_dword( dev
, PCI_BASE_ADDRESS_0
, &cfg
);
415 #ifndef CONFIG_MTD_PMC551_BUGFIX
416 pci_write_config_dword( dev
, PCI_BASE_ADDRESS_0
, ~0 );
417 pci_read_config_dword( dev
, PCI_BASE_ADDRESS_0
, &size
);
418 size
= (size
&PCI_BASE_ADDRESS_MEM_MASK
);
420 pci_write_config_dword( dev
, PCI_BASE_ADDRESS_0
, cfg
);
423 * Get the size of the memory by reading all the DRAM size values
424 * and adding them up.
426 * KLUDGE ALERT: the boards we are using have invalid column and
427 * row mux values. We fix them here, but this will break other
428 * memory configurations.
430 pci_read_config_dword(dev
, PMC551_DRAM_BLK0
, &dram_data
);
431 size
= PMC551_DRAM_BLK_GET_SIZE(dram_data
);
432 dram_data
= PMC551_DRAM_BLK_SET_COL_MUX(dram_data
, 0x5);
433 dram_data
= PMC551_DRAM_BLK_SET_ROW_MUX(dram_data
, 0x9);
434 pci_write_config_dword(dev
, PMC551_DRAM_BLK0
, dram_data
);
436 pci_read_config_dword(dev
, PMC551_DRAM_BLK1
, &dram_data
);
437 size
+= PMC551_DRAM_BLK_GET_SIZE(dram_data
);
438 dram_data
= PMC551_DRAM_BLK_SET_COL_MUX(dram_data
, 0x5);
439 dram_data
= PMC551_DRAM_BLK_SET_ROW_MUX(dram_data
, 0x9);
440 pci_write_config_dword(dev
, PMC551_DRAM_BLK1
, dram_data
);
442 pci_read_config_dword(dev
, PMC551_DRAM_BLK2
, &dram_data
);
443 size
+= PMC551_DRAM_BLK_GET_SIZE(dram_data
);
444 dram_data
= PMC551_DRAM_BLK_SET_COL_MUX(dram_data
, 0x5);
445 dram_data
= PMC551_DRAM_BLK_SET_ROW_MUX(dram_data
, 0x9);
446 pci_write_config_dword(dev
, PMC551_DRAM_BLK2
, dram_data
);
448 pci_read_config_dword(dev
, PMC551_DRAM_BLK3
, &dram_data
);
449 size
+= PMC551_DRAM_BLK_GET_SIZE(dram_data
);
450 dram_data
= PMC551_DRAM_BLK_SET_COL_MUX(dram_data
, 0x5);
451 dram_data
= PMC551_DRAM_BLK_SET_ROW_MUX(dram_data
, 0x9);
452 pci_write_config_dword(dev
, PMC551_DRAM_BLK3
, dram_data
);
455 * Oops .. something went wrong
457 if( (size
&= PCI_BASE_ADDRESS_MEM_MASK
) == 0) {
460 #endif /* CONFIG_MTD_PMC551_BUGFIX */
462 if ((cfg
&PCI_BASE_ADDRESS_SPACE
) != PCI_BASE_ADDRESS_SPACE_MEMORY
) {
469 pci_write_config_word( dev
, PMC551_SDRAM_MA
, 0x0400 );
470 pci_write_config_word( dev
, PMC551_SDRAM_CMD
, 0x00bf );
473 * Wait until command has gone through
474 * FIXME: register spinning issue
476 do { pci_read_config_word( dev
, PMC551_SDRAM_CMD
, &cmd
);
477 if(counter
++ > 100)break;
478 } while ( (PCI_COMMAND_IO
) & cmd
);
481 * Turn on auto refresh
482 * The loop is taken directly from Ramix's example code. I assume that
483 * this must be held high for some duration of time, but I can find no
484 * documentation refrencing the reasons why.
486 for ( i
= 1; i
<=8 ; i
++) {
487 pci_write_config_word (dev
, PMC551_SDRAM_CMD
, 0x0df);
490 * Make certain command has gone through
491 * FIXME: register spinning issue
494 do { pci_read_config_word(dev
, PMC551_SDRAM_CMD
, &cmd
);
495 if(counter
++ > 100)break;
496 } while ( (PCI_COMMAND_IO
) & cmd
);
499 pci_write_config_word ( dev
, PMC551_SDRAM_MA
, 0x0020);
500 pci_write_config_word ( dev
, PMC551_SDRAM_CMD
, 0x0ff);
503 * Wait until command completes
504 * FIXME: register spinning issue
507 do { pci_read_config_word ( dev
, PMC551_SDRAM_CMD
, &cmd
);
508 if(counter
++ > 100)break;
509 } while ( (PCI_COMMAND_IO
) & cmd
);
511 pci_read_config_dword ( dev
, PMC551_DRAM_CFG
, &dcmd
);
513 pci_write_config_dword ( dev
, PMC551_DRAM_CFG
, dcmd
);
516 * Check to make certain fast back-to-back, if not
519 pci_read_config_word( dev
, PCI_STATUS
, &cmd
);
520 if((cmd
&PCI_COMMAND_FAST_BACK
) == 0) {
521 cmd
|= PCI_COMMAND_FAST_BACK
;
522 pci_write_config_word( dev
, PCI_STATUS
, cmd
);
526 * Check to make certain the DEVSEL is set correctly, this device
527 * has a tendancy to assert DEVSEL and TRDY when a write is performed
528 * to the memory when memory is read-only
530 if((cmd
&PCI_STATUS_DEVSEL_MASK
) != 0x0) {
531 cmd
&= ~PCI_STATUS_DEVSEL_MASK
;
532 pci_write_config_word( dev
, PCI_STATUS
, cmd
);
535 * Set to be prefetchable and put everything back based on old cfg.
536 * it's possible that the reset of the V370PDC nuked the original
540 cfg |= PCI_BASE_ADDRESS_MEM_PREFETCH;
541 pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
545 * Turn PCI memory and I/O bus access back on
547 pci_write_config_word( dev
, PCI_COMMAND
,
548 PCI_COMMAND_MEMORY
| PCI_COMMAND_IO
);
549 #ifdef CONFIG_MTD_PMC551_DEBUG
553 printk(KERN_DEBUG
"pmc551: %d%c (0x%x) of %sprefetchable memory at 0x%llx\n",
554 (size
<1024)?size
:(size
<1048576)?size
>>10:size
>>20,
555 (size
<1024)?'B':(size
<1048576)?'K':'M',
556 size
, ((dcmd
&(0x1<<3)) == 0)?"non-":"",
557 (unsigned long long)((dev
->resource
[0].start
)&PCI_BASE_ADDRESS_MEM_MASK
));
560 * Check to see the state of the memory
562 pci_read_config_dword( dev
, PMC551_DRAM_BLK0
, &dcmd
);
563 printk(KERN_DEBUG
"pmc551: DRAM_BLK0 Flags: %s,%s\n"
564 "pmc551: DRAM_BLK0 Size: %d at %d\n"
565 "pmc551: DRAM_BLK0 Row MUX: %d, Col MUX: %d\n",
566 (((0x1<<1)&dcmd
) == 0)?"RW":"RO",
567 (((0x1<<0)&dcmd
) == 0)?"Off":"On",
568 PMC551_DRAM_BLK_GET_SIZE(dcmd
),
569 ((dcmd
>>20)&0x7FF), ((dcmd
>>13)&0x7), ((dcmd
>>9)&0xF) );
571 pci_read_config_dword( dev
, PMC551_DRAM_BLK1
, &dcmd
);
572 printk(KERN_DEBUG
"pmc551: DRAM_BLK1 Flags: %s,%s\n"
573 "pmc551: DRAM_BLK1 Size: %d at %d\n"
574 "pmc551: DRAM_BLK1 Row MUX: %d, Col MUX: %d\n",
575 (((0x1<<1)&dcmd
) == 0)?"RW":"RO",
576 (((0x1<<0)&dcmd
) == 0)?"Off":"On",
577 PMC551_DRAM_BLK_GET_SIZE(dcmd
),
578 ((dcmd
>>20)&0x7FF), ((dcmd
>>13)&0x7), ((dcmd
>>9)&0xF) );
580 pci_read_config_dword( dev
, PMC551_DRAM_BLK2
, &dcmd
);
581 printk(KERN_DEBUG
"pmc551: DRAM_BLK2 Flags: %s,%s\n"
582 "pmc551: DRAM_BLK2 Size: %d at %d\n"
583 "pmc551: DRAM_BLK2 Row MUX: %d, Col MUX: %d\n",
584 (((0x1<<1)&dcmd
) == 0)?"RW":"RO",
585 (((0x1<<0)&dcmd
) == 0)?"Off":"On",
586 PMC551_DRAM_BLK_GET_SIZE(dcmd
),
587 ((dcmd
>>20)&0x7FF), ((dcmd
>>13)&0x7), ((dcmd
>>9)&0xF) );
589 pci_read_config_dword( dev
, PMC551_DRAM_BLK3
, &dcmd
);
590 printk(KERN_DEBUG
"pmc551: DRAM_BLK3 Flags: %s,%s\n"
591 "pmc551: DRAM_BLK3 Size: %d at %d\n"
592 "pmc551: DRAM_BLK3 Row MUX: %d, Col MUX: %d\n",
593 (((0x1<<1)&dcmd
) == 0)?"RW":"RO",
594 (((0x1<<0)&dcmd
) == 0)?"Off":"On",
595 PMC551_DRAM_BLK_GET_SIZE(dcmd
),
596 ((dcmd
>>20)&0x7FF), ((dcmd
>>13)&0x7), ((dcmd
>>9)&0xF) );
598 pci_read_config_word( dev
, PCI_COMMAND
, &cmd
);
599 printk( KERN_DEBUG
"pmc551: Memory Access %s\n",
600 (((0x1<<1)&cmd
) == 0)?"off":"on" );
601 printk( KERN_DEBUG
"pmc551: I/O Access %s\n",
602 (((0x1<<0)&cmd
) == 0)?"off":"on" );
604 pci_read_config_word( dev
, PCI_STATUS
, &cmd
);
605 printk( KERN_DEBUG
"pmc551: Devsel %s\n",
606 ((PCI_STATUS_DEVSEL_MASK
&cmd
)==0x000)?"Fast":
607 ((PCI_STATUS_DEVSEL_MASK
&cmd
)==0x200)?"Medium":
608 ((PCI_STATUS_DEVSEL_MASK
&cmd
)==0x400)?"Slow":"Invalid" );
610 printk( KERN_DEBUG
"pmc551: %sFast Back-to-Back\n",
611 ((PCI_COMMAND_FAST_BACK
&cmd
) == 0)?"Not ":"" );
613 pci_read_config_byte(dev
, PMC551_SYS_CTRL_REG
, &bcmd
);
614 printk( KERN_DEBUG
"pmc551: EEPROM is under %s control\n"
615 "pmc551: System Control Register is %slocked to PCI access\n"
616 "pmc551: System Control Register is %slocked to EEPROM access\n",
617 (bcmd
&0x1)?"software":"hardware",
618 (bcmd
&0x20)?"":"un", (bcmd
&0x40)?"":"un");
624 * Kernel version specific module stuffages
628 MODULE_LICENSE("GPL");
629 MODULE_AUTHOR("Mark Ferrell <mferrell@mvista.com>");
630 MODULE_DESCRIPTION(PMC551_VERSION
);
633 * Stuff these outside the ifdef so as to not bust compiled in driver support
636 #if defined(CONFIG_MTD_PMC551_APERTURE_SIZE)
637 static int asize
=CONFIG_MTD_PMC551_APERTURE_SIZE
642 module_param(msize
, int, 0);
643 MODULE_PARM_DESC(msize
, "memory size in Megabytes [1 - 1024]");
644 module_param(asize
, int, 0);
645 MODULE_PARM_DESC(asize
, "aperture size, must be <= memsize [1-1024]");
648 * PMC551 Card Initialization
650 static int __init
init_pmc551(void)
652 struct pci_dev
*PCI_Device
= NULL
;
655 struct mtd_info
*mtd
;
659 msize
= (1 << (ffs(msize
) - 1))<<20;
660 if (msize
> (1<<30)) {
661 printk(KERN_NOTICE
"pmc551: Invalid memory size [%d]\n", msize
);
667 asize
= (1 << (ffs(asize
) - 1))<<20;
668 if (asize
> (1<<30) ) {
669 printk(KERN_NOTICE
"pmc551: Invalid aperture size [%d]\n", asize
);
674 printk(KERN_INFO PMC551_VERSION
);
677 * PCU-bus chipset probe.
679 for( count
= 0; count
< MAX_MTD_DEVICES
; count
++ ) {
681 if ((PCI_Device
= pci_find_device(PCI_VENDOR_ID_V3_SEMI
,
682 PCI_DEVICE_ID_V3_SEMI_V370PDC
,
683 PCI_Device
) ) == NULL
) {
687 printk(KERN_NOTICE
"pmc551: Found PCI V370PDC at 0x%llx\n",
688 (unsigned long long)PCI_Device
->resource
[0].start
);
691 * The PMC551 device acts VERY weird if you don't init it
692 * first. i.e. it will not correctly report devsel. If for
693 * some reason the sdram is in a wrote-protected state the
694 * device will DEVSEL when it is written to causing problems
695 * with the oldproc.c driver in
696 * some kernels (2.2.*)
698 if((length
= fixup_pmc551(PCI_Device
)) <= 0) {
699 printk(KERN_NOTICE
"pmc551: Cannot init SDRAM\n");
704 * This is needed until the driver is capable of reading the
705 * onboard I2C SROM to discover the "real" memory size.
709 printk(KERN_NOTICE
"pmc551: Using specified memory size 0x%x\n", length
);
714 mtd
= kmalloc(sizeof(struct mtd_info
), GFP_KERNEL
);
716 printk(KERN_NOTICE
"pmc551: Cannot allocate new MTD device.\n");
720 memset(mtd
, 0, sizeof(struct mtd_info
));
722 priv
= kmalloc (sizeof(struct mypriv
), GFP_KERNEL
);
724 printk(KERN_NOTICE
"pmc551: Cannot allocate new MTD device.\n");
728 memset(priv
, 0, sizeof(*priv
));
730 priv
->dev
= PCI_Device
;
733 printk(KERN_NOTICE
"pmc551: reducing aperture size to fit %dM\n",length
>>20);
734 priv
->asize
= asize
= length
;
735 } else if (asize
== 0 || asize
== length
) {
736 printk(KERN_NOTICE
"pmc551: Using existing aperture size %dM\n", length
>>20);
737 priv
->asize
= asize
= length
;
739 printk(KERN_NOTICE
"pmc551: Using specified aperture size %dM\n", asize
>>20);
742 priv
->start
= ioremap(((PCI_Device
->resource
[0].start
)
743 & PCI_BASE_ADDRESS_MEM_MASK
),
747 printk(KERN_NOTICE
"pmc551: Unable to map IO space\n");
753 #ifdef CONFIG_MTD_PMC551_DEBUG
754 printk( KERN_DEBUG
"pmc551: setting aperture to %d\n",
755 ffs(priv
->asize
>>20)-1);
758 priv
->base_map0
= ( PMC551_PCI_MEM_MAP_REG_EN
759 | PMC551_PCI_MEM_MAP_ENABLE
760 | (ffs(priv
->asize
>>20)-1)<<4 );
761 priv
->curr_map0
= priv
->base_map0
;
762 pci_write_config_dword ( priv
->dev
, PMC551_PCI_MEM_MAP0
,
765 #ifdef CONFIG_MTD_PMC551_DEBUG
766 printk( KERN_DEBUG
"pmc551: aperture set to %d\n",
767 (priv
->base_map0
& 0xF0)>>4 );
771 mtd
->flags
= MTD_CAP_RAM
;
772 mtd
->erase
= pmc551_erase
;
773 mtd
->read
= pmc551_read
;
774 mtd
->write
= pmc551_write
;
775 mtd
->point
= pmc551_point
;
776 mtd
->unpoint
= pmc551_unpoint
;
778 mtd
->name
= "PMC551 RAM board";
779 mtd
->erasesize
= 0x10000;
781 mtd
->owner
= THIS_MODULE
;
783 if (add_mtd_device(mtd
)) {
784 printk(KERN_NOTICE
"pmc551: Failed to register new device\n");
785 iounmap(priv
->start
);
790 printk(KERN_NOTICE
"Registered pmc551 memory device.\n");
791 printk(KERN_NOTICE
"Mapped %dM of memory from 0x%p to 0x%p\n",
794 priv
->start
+ priv
->asize
);
795 printk(KERN_NOTICE
"Total memory is %d%c\n",
796 (length
<1024)?length
:
797 (length
<1048576)?length
>>10:length
>>20,
798 (length
<1024)?'B':(length
<1048576)?'K':'M');
799 priv
->nextpmc551
= pmc551list
;
805 printk(KERN_NOTICE
"pmc551: not detected\n");
808 printk(KERN_NOTICE
"pmc551: %d pmc551 devices loaded\n", found
);
814 * PMC551 Card Cleanup
816 static void __exit
cleanup_pmc551(void)
819 struct mtd_info
*mtd
;
822 while((mtd
=pmc551list
)) {
824 pmc551list
= priv
->nextpmc551
;
827 printk (KERN_DEBUG
"pmc551: unmapping %dM starting at 0x%p\n",
828 priv
->asize
>>20, priv
->start
);
829 iounmap (priv
->start
);
833 del_mtd_device (mtd
);
838 printk(KERN_NOTICE
"pmc551: %d pmc551 devices unloaded\n", found
);
841 module_init(init_pmc551
);
842 module_exit(cleanup_pmc551
);