arch/ia64/sn/pci/tioca_provider.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 2003-2005 Silicon Graphics, Inc.  All Rights Reserved.
   7  */
   8
   9 #include <linux/types.h>
  10 #include <linux/interrupt.h>
  11 #include <linux/pci.h>
  12 #include <asm/sn/sn_sal.h>
  13 #include <asm/sn/addrs.h>
  14 #include <asm/sn/pcidev.h>
  15 #include <asm/sn/pcibus_provider_defs.h>
  16 #include <asm/sn/tioca_provider.h>
  17
  18 uint32_t tioca_gart_found;
  19 EXPORT_SYMBOL(tioca_gart_found);        /* used by agp-sgi */
  20
  21 LIST_HEAD(tioca_list);
  22 EXPORT_SYMBOL(tioca_list);      /* used by agp-sgi */
  23
  24 static int tioca_gart_init(struct tioca_kernel *);
  25
  26 /**
  27  * tioca_gart_init - Initialize SGI TIOCA GART
  28  * @tioca_common: ptr to common prom/kernel struct identifying the
  29  *
  30  * If the indicated tioca has devices present, initialize its associated
  31  * GART MMR's and kernel memory.
  32  */
  33 static int
  34 tioca_gart_init(struct tioca_kernel *tioca_kern)
  35 {
  36         uint64_t ap_reg;
  37         uint64_t offset;
  38         struct page *tmp;
  39         struct tioca_common *tioca_common;
  40         volatile struct tioca *ca_base;
  41
  42         tioca_common = tioca_kern->ca_common;
  43         ca_base = (struct tioca *)tioca_common->ca_common.bs_base;
  44
  45         if (list_empty(tioca_kern->ca_devices))
  46                 return 0;
  47
  48         ap_reg = 0;
  49
  50         /*
  51          * Validate aperature size
  52          */
  53
  54         switch (CA_APERATURE_SIZE >> 20) {
  55         case 4:
  56                 ap_reg |= (0x3ff << CA_GART_AP_SIZE_SHFT);      /* 4MB */
  57                 break;
  58         case 8:
  59                 ap_reg |= (0x3fe << CA_GART_AP_SIZE_SHFT);      /* 8MB */
  60                 break;
  61         case 16:
  62                 ap_reg |= (0x3fc << CA_GART_AP_SIZE_SHFT);      /* 16MB */
  63                 break;
  64         case 32:
  65                 ap_reg |= (0x3f8 << CA_GART_AP_SIZE_SHFT);      /* 32 MB */
  66                 break;
  67         case 64:
  68                 ap_reg |= (0x3f0 << CA_GART_AP_SIZE_SHFT);      /* 64 MB */
  69                 break;
  70         case 128:
  71                 ap_reg |= (0x3e0 << CA_GART_AP_SIZE_SHFT);      /* 128 MB */
  72                 break;
  73         case 256:
  74                 ap_reg |= (0x3c0 << CA_GART_AP_SIZE_SHFT);      /* 256 MB */
  75                 break;
  76         case 512:
  77                 ap_reg |= (0x380 << CA_GART_AP_SIZE_SHFT);      /* 512 MB */
  78                 break;
  79         case 1024:
  80                 ap_reg |= (0x300 << CA_GART_AP_SIZE_SHFT);      /* 1GB */
  81                 break;
  82         case 2048:
  83                 ap_reg |= (0x200 << CA_GART_AP_SIZE_SHFT);      /* 2GB */
  84                 break;
  85         case 4096:
  86                 ap_reg |= (0x000 << CA_GART_AP_SIZE_SHFT);      /* 4 GB */
  87                 break;
  88         default:
  89                 printk(KERN_ERR "%s:  Invalid CA_APERATURE_SIZE "
  90                        "0x%lx\n", __FUNCTION__, (ulong) CA_APERATURE_SIZE);
  91                 return -1;
  92         }
  93
  94         /*
  95          * Set up other aperature parameters
  96          */
  97
  98         if (PAGE_SIZE >= 16384) {
  99                 tioca_kern->ca_ap_pagesize = 16384;
 100                 ap_reg |= CA_GART_PAGE_SIZE;
 101         } else {
 102                 tioca_kern->ca_ap_pagesize = 4096;
 103         }
 104
 105         tioca_kern->ca_ap_size = CA_APERATURE_SIZE;
 106         tioca_kern->ca_ap_bus_base = CA_APERATURE_BASE;
 107         tioca_kern->ca_gart_entries =
 108             tioca_kern->ca_ap_size / tioca_kern->ca_ap_pagesize;
 109
 110         ap_reg |= (CA_GART_AP_ENB_AGP | CA_GART_AP_ENB_PCI);
 111         ap_reg |= tioca_kern->ca_ap_bus_base;
 112
 113         /*
 114          * Allocate and set up the GART
 115          */
 116
 117         tioca_kern->ca_gart_size = tioca_kern->ca_gart_entries * sizeof(u64);
 118         tmp =
 119             alloc_pages_node(tioca_kern->ca_closest_node,
 120                              GFP_KERNEL | __GFP_ZERO,
 121                              get_order(tioca_kern->ca_gart_size));
 122
 123         if (!tmp) {
 124                 printk(KERN_ERR "%s:  Could not allocate "
 125                        "%lu bytes (order %d) for GART\n",
 126                        __FUNCTION__,
 127                        tioca_kern->ca_gart_size,
 128                        get_order(tioca_kern->ca_gart_size));
 129                 return -ENOMEM;
 130         }
 131
 132         tioca_kern->ca_gart = page_address(tmp);
 133         tioca_kern->ca_gart_coretalk_addr =
 134             PHYS_TO_TIODMA(virt_to_phys(tioca_kern->ca_gart));
 135
 136         /*
 137          * Compute PCI/AGP convenience fields
 138          */
 139
 140         offset = CA_PCI32_MAPPED_BASE - CA_APERATURE_BASE;
 141         tioca_kern->ca_pciap_base = CA_PCI32_MAPPED_BASE;
 142         tioca_kern->ca_pciap_size = CA_PCI32_MAPPED_SIZE;
 143         tioca_kern->ca_pcigart_start = offset / tioca_kern->ca_ap_pagesize;
 144         tioca_kern->ca_pcigart_base =
 145             tioca_kern->ca_gart_coretalk_addr + offset;
 146         tioca_kern->ca_pcigart =
 147             &tioca_kern->ca_gart[tioca_kern->ca_pcigart_start];
 148         tioca_kern->ca_pcigart_entries =
 149             tioca_kern->ca_pciap_size / tioca_kern->ca_ap_pagesize;
 150         tioca_kern->ca_pcigart_pagemap =
 151             kcalloc(1, tioca_kern->ca_pcigart_entries / 8, GFP_KERNEL);
 152         if (!tioca_kern->ca_pcigart_pagemap) {
 153                 free_pages((unsigned long)tioca_kern->ca_gart,
 154                            get_order(tioca_kern->ca_gart_size));
 155                 return -1;
 156         }
 157
 158         offset = CA_AGP_MAPPED_BASE - CA_APERATURE_BASE;
 159         tioca_kern->ca_gfxap_base = CA_AGP_MAPPED_BASE;
 160         tioca_kern->ca_gfxap_size = CA_AGP_MAPPED_SIZE;
 161         tioca_kern->ca_gfxgart_start = offset / tioca_kern->ca_ap_pagesize;
 162         tioca_kern->ca_gfxgart_base =
 163             tioca_kern->ca_gart_coretalk_addr + offset;
 164         tioca_kern->ca_gfxgart =
 165             &tioca_kern->ca_gart[tioca_kern->ca_gfxgart_start];
 166         tioca_kern->ca_gfxgart_entries =
 167             tioca_kern->ca_gfxap_size / tioca_kern->ca_ap_pagesize;
 168
 169         /*
 170          * various control settings:
 171          *      use agp op-combining
 172          *      use GET semantics to fetch memory
 173          *      participate in coherency domain
 174          *      DISABLE GART PREFETCHING due to hw bug tracked in SGI PV930029
 175          */
 176
 177         ca_base->ca_control1 |= CA_AGPDMA_OP_ENB_COMBDELAY;     /* PV895469 ? */
 178         ca_base->ca_control2 &= ~(CA_GART_MEM_PARAM);
 179         ca_base->ca_control2 |= (0x2ull << CA_GART_MEM_PARAM_SHFT);
 180         tioca_kern->ca_gart_iscoherent = 1;
 181         ca_base->ca_control2 &=
 182             ~(CA_GART_WR_PREFETCH_ENB | CA_GART_RD_PREFETCH_ENB);
 183
 184         /*
 185          * Unmask GART fetch error interrupts.  Clear residual errors first.
 186          */
 187
 188         ca_base->ca_int_status_alias = CA_GART_FETCH_ERR;
 189         ca_base->ca_mult_error_alias = CA_GART_FETCH_ERR;
 190         ca_base->ca_int_mask &= ~CA_GART_FETCH_ERR;
 191
 192         /*
 193          * Program the aperature and gart registers in TIOCA
 194          */
 195
 196         ca_base->ca_gart_aperature = ap_reg;
 197         ca_base->ca_gart_ptr_table = tioca_kern->ca_gart_coretalk_addr | 1;
 198
 199         return 0;
 200 }
 201
 202 /**
 203  * tioca_fastwrite_enable - enable AGP FW for a tioca and its functions
 204  * @tioca_kernel: structure representing the CA
 205  *
 206  * Given a CA, scan all attached functions making sure they all support
 207  * FastWrite.  If so, enable FastWrite for all functions and the CA itself.
 208  */
 209
 210 void
 211 tioca_fastwrite_enable(struct tioca_kernel *tioca_kern)
 212 {
 213         int cap_ptr;
 214         uint64_t ca_control1;
 215         uint32_t reg;
 216         struct tioca *tioca_base;
 217         struct pci_dev *pdev;
 218         struct tioca_common *common;
 219
 220         common = tioca_kern->ca_common;
 221
 222         /*
 223          * Scan all vga controllers on this bus making sure they all
 224          * suport FW.  If not, return.
 225          */
 226
 227         list_for_each_entry(pdev, tioca_kern->ca_devices, bus_list) {
 228                 if (pdev->class != (PCI_CLASS_DISPLAY_VGA << 8))
 229                         continue;
 230
 231                 cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
 232                 if (!cap_ptr)
 233                         return; /* no AGP CAP means no FW */
 234
 235                 pci_read_config_dword(pdev, cap_ptr + PCI_AGP_STATUS, &reg);
 236                 if (!(reg & PCI_AGP_STATUS_FW))
 237                         return; /* function doesn't support FW */
 238         }
 239
 240         /*
 241          * Set fw for all vga fn's
 242          */
 243
 244         list_for_each_entry(pdev, tioca_kern->ca_devices, bus_list) {
 245                 if (pdev->class != (PCI_CLASS_DISPLAY_VGA << 8))
 246                         continue;
 247
 248                 cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
 249                 pci_read_config_dword(pdev, cap_ptr + PCI_AGP_COMMAND, &reg);
 250                 reg |= PCI_AGP_COMMAND_FW;
 251                 pci_write_config_dword(pdev, cap_ptr + PCI_AGP_COMMAND, reg);
 252         }
 253
 254         /*
 255          * Set ca's fw to match
 256          */
 257
 258         tioca_base = (struct tioca *)common->ca_common.bs_base;
 259         ca_control1 = tioca_base->ca_control1;
 260         ca_control1 |= CA_AGP_FW_ENABLE;
 261         tioca_base->ca_control1 = ca_control1;
 262 }
 263
 264 EXPORT_SYMBOL(tioca_fastwrite_enable);  /* used by agp-sgi */
 265
 266 /**
 267  * tioca_dma_d64 - create a DMA mapping using 64-bit direct mode
 268  * @paddr: system physical address
 269  *
 270  * Map @paddr into 64-bit CA bus space.  No device context is necessary.
 271  * Bits 53:0 come from the coretalk address.  We just need to mask in the
 272  * following optional bits of the 64-bit pci address:
 273  *
 274  * 63:60 - Coretalk Packet Type -  0x1 for Mem Get/Put (coherent)
 275  *                                 0x2 for PIO (non-coherent)
 276  *                                 We will always use 0x1
 277  * 55:55 - Swap bytes              Currently unused
 278  */
 279 static uint64_t
 280 tioca_dma_d64(unsigned long paddr)
 281 {
 282         dma_addr_t bus_addr;
 283
 284         bus_addr = PHYS_TO_TIODMA(paddr);
 285
 286         BUG_ON(!bus_addr);
 287         BUG_ON(bus_addr >> 54);
 288
 289         /* Set upper nibble to Cache Coherent Memory op */
 290         bus_addr |= (1UL << 60);
 291
 292         return bus_addr;
 293 }
 294
 295 /**
 296  * tioca_dma_d48 - create a DMA mapping using 48-bit direct mode
 297  * @pdev: linux pci_dev representing the function
 298  * @paddr: system physical address
 299  *
 300  * Map @paddr into 64-bit bus space of the CA associated with @pcidev_info.
 301  *
 302  * The CA agp 48 bit direct address falls out as follows:
 303  *
 304  * When direct mapping AGP addresses, the 48 bit AGP address is
 305  * constructed as follows:
 306  *
 307  * [47:40] - Low 8 bits of the page Node ID extracted from coretalk
 308  *              address [47:40].  The upper 8 node bits are fixed
 309  *              and come from the xxx register bits [5:0]
 310  * [39:38] - Chiplet ID extracted from coretalk address [39:38]
 311  * [37:00] - node offset extracted from coretalk address [37:00]
 312  *
 313  * Since the node id in general will be non-zero, and the chiplet id
 314  * will always be non-zero, it follows that the device must support
 315  * a dma mask of at least 0xffffffffff (40 bits) to target node 0
 316  * and in general should be 0xffffffffffff (48 bits) to target nodes
 317  * up to 255.  Nodes above 255 need the support of the xxx register,
 318  * and so a given CA can only directly target nodes in the range
 319  * xxx - xxx+255.
 320  */
 321 static uint64_t
 322 tioca_dma_d48(struct pci_dev *pdev, uint64_t paddr)
 323 {
 324         struct tioca_common *tioca_common;
 325         struct tioca *ca_base;
 326         uint64_t ct_addr;
 327         dma_addr_t bus_addr;
 328         uint32_t node_upper;
 329         uint64_t agp_dma_extn;
 330         struct pcidev_info *pcidev_info = SN_PCIDEV_INFO(pdev);
 331
 332         tioca_common = (struct tioca_common *)pcidev_info->pdi_pcibus_info;
 333         ca_base = (struct tioca *)tioca_common->ca_common.bs_base;
 334
 335         ct_addr = PHYS_TO_TIODMA(paddr);
 336         if (!ct_addr)
 337                 return 0;
 338
 339         bus_addr = (dma_addr_t) (ct_addr & 0xffffffffffff);
 340         node_upper = ct_addr >> 48;
 341
 342         if (node_upper > 64) {
 343                 printk(KERN_ERR "%s:  coretalk addr 0x%p node id out "
 344                        "of range\n", __FUNCTION__, (void *)ct_addr);
 345                 return 0;
 346         }
 347
 348         agp_dma_extn = ca_base->ca_agp_dma_addr_extn;
 349         if (node_upper != (agp_dma_extn >> CA_AGP_DMA_NODE_ID_SHFT)) {
 350                 printk(KERN_ERR "%s:  coretalk upper node (%u) "
 351                        "mismatch with ca_agp_dma_addr_extn (%lu)\n",
 352                        __FUNCTION__,
 353                        node_upper, (agp_dma_extn >> CA_AGP_DMA_NODE_ID_SHFT));
 354                 return 0;
 355         }
 356
 357         return bus_addr;
 358 }
 359
 360 /**
 361  * tioca_dma_mapped - create a DMA mapping using a CA GART
 362  * @pdev: linux pci_dev representing the function
 363  * @paddr: host physical address to map
 364  * @req_size: len (bytes) to map
 365  *
 366  * Map @paddr into CA address space using the GART mechanism.  The mapped
 367  * dma_addr_t is guarenteed to be contiguous in CA bus space.
 368  */
 369 static dma_addr_t
 370 tioca_dma_mapped(struct pci_dev *pdev, uint64_t paddr, size_t req_size)
 371 {
 372         int i, ps, ps_shift, entry, entries, mapsize, last_entry;
 373         uint64_t xio_addr, end_xio_addr;
 374         struct tioca_common *tioca_common;
 375         struct tioca_kernel *tioca_kern;
 376         dma_addr_t bus_addr = 0;
 377         struct tioca_dmamap *ca_dmamap;
 378         void *map;
 379         unsigned long flags;
 380         struct pcidev_info *pcidev_info = SN_PCIDEV_INFO(pdev);;
 381
 382         tioca_common = (struct tioca_common *)pcidev_info->pdi_pcibus_info;
 383         tioca_kern = (struct tioca_kernel *)tioca_common->ca_kernel_private;
 384
 385         xio_addr = PHYS_TO_TIODMA(paddr);
 386         if (!xio_addr)
 387                 return 0;
 388
 389         spin_lock_irqsave(&tioca_kern->ca_lock, flags);
 390
 391         /*
 392          * allocate a map struct
 393          */
 394
 395         ca_dmamap = kcalloc(1, sizeof(struct tioca_dmamap), GFP_ATOMIC);
 396         if (!ca_dmamap)
 397                 goto map_return;
 398
 399         /*
 400          * Locate free entries that can hold req_size.  Account for
 401          * unaligned start/length when allocating.
 402          */
 403
 404         ps = tioca_kern->ca_ap_pagesize;        /* will be power of 2 */
 405         ps_shift = ffs(ps) - 1;
 406         end_xio_addr = xio_addr + req_size - 1;
 407
 408         entries = (end_xio_addr >> ps_shift) - (xio_addr >> ps_shift) + 1;
 409
 410         map = tioca_kern->ca_pcigart_pagemap;
 411         mapsize = tioca_kern->ca_pcigart_entries;
 412
 413         entry = find_first_zero_bit(map, mapsize);
 414         while (entry < mapsize) {
 415                 last_entry = find_next_bit(map, mapsize, entry);
 416
 417                 if (last_entry - entry >= entries)
 418                         break;
 419
 420                 entry = find_next_zero_bit(map, mapsize, last_entry);
 421         }
 422
 423         if (entry > mapsize)
 424                 goto map_return;
 425
 426         for (i = 0; i < entries; i++)
 427                 set_bit(entry + i, map);
 428
 429         bus_addr = tioca_kern->ca_pciap_base + (entry * ps);
 430
 431         ca_dmamap->cad_dma_addr = bus_addr;
 432         ca_dmamap->cad_gart_size = entries;
 433         ca_dmamap->cad_gart_entry = entry;
 434         list_add(&ca_dmamap->cad_list, &tioca_kern->ca_dmamaps);
 435
 436         if (xio_addr % ps) {
 437                 tioca_kern->ca_pcigart[entry] = tioca_paddr_to_gart(xio_addr);
 438                 bus_addr += xio_addr & (ps - 1);
 439                 xio_addr &= ~(ps - 1);
 440                 xio_addr += ps;
 441                 entry++;
 442         }
 443
 444         while (xio_addr < end_xio_addr) {
 445                 tioca_kern->ca_pcigart[entry] = tioca_paddr_to_gart(xio_addr);
 446                 xio_addr += ps;
 447                 entry++;
 448         }
 449
 450         tioca_tlbflush(tioca_kern);
 451
 452 map_return:
 453         spin_unlock_irqrestore(&tioca_kern->ca_lock, flags);
 454         return bus_addr;
 455 }
 456
 457 /**
 458  * tioca_dma_unmap - release CA mapping resources
 459  * @pdev: linux pci_dev representing the function
 460  * @bus_addr: bus address returned by an earlier tioca_dma_map
 461  * @dir: mapping direction (unused)
 462  *
 463  * Locate mapping resources associated with @bus_addr and release them.
 464  * For mappings created using the direct modes (64 or 48) there are no
 465  * resources to release.
 466  */
 467 void
 468 tioca_dma_unmap(struct pci_dev *pdev, dma_addr_t bus_addr, int dir)
 469 {
 470         int i, entry;
 471         struct tioca_common *tioca_common;
 472         struct tioca_kernel *tioca_kern;
 473         struct tioca_dmamap *map;
 474         struct pcidev_info *pcidev_info = SN_PCIDEV_INFO(pdev);
 475         unsigned long flags;
 476
 477         tioca_common = (struct tioca_common *)pcidev_info->pdi_pcibus_info;
 478         tioca_kern = (struct tioca_kernel *)tioca_common->ca_kernel_private;
 479
 480         /* return straight away if this isn't be a mapped address */
 481
 482         if (bus_addr < tioca_kern->ca_pciap_base ||
 483             bus_addr >= (tioca_kern->ca_pciap_base + tioca_kern->ca_pciap_size))
 484                 return;
 485
 486         spin_lock_irqsave(&tioca_kern->ca_lock, flags);
 487
 488         list_for_each_entry(map, &tioca_kern->ca_dmamaps, cad_list)
 489             if (map->cad_dma_addr == bus_addr)
 490                 break;
 491
 492         BUG_ON(map == NULL);
 493
 494         entry = map->cad_gart_entry;
 495
 496         for (i = 0; i < map->cad_gart_size; i++, entry++) {
 497                 clear_bit(entry, tioca_kern->ca_pcigart_pagemap);
 498                 tioca_kern->ca_pcigart[entry] = 0;
 499         }
 500         tioca_tlbflush(tioca_kern);
 501
 502         list_del(&map->cad_list);
 503         spin_unlock_irqrestore(&tioca_kern->ca_lock, flags);
 504         kfree(map);
 505 }
 506
 507 /**
 508  * tioca_dma_map - map pages for PCI DMA
 509  * @pdev: linux pci_dev representing the function
 510  * @paddr: host physical address to map
 511  * @byte_count: bytes to map
 512  *
 513  * This is the main wrapper for mapping host physical pages to CA PCI space.
 514  * The mapping mode used is based on the devices dma_mask.  As a last resort
 515  * use the GART mapped mode.
 516  */
 517 uint64_t
 518 tioca_dma_map(struct pci_dev *pdev, uint64_t paddr, size_t byte_count)
 519 {
 520         uint64_t mapaddr;
 521
 522         /*
 523          * If card is 64 or 48 bit addresable, use a direct mapping.  32
 524          * bit direct is so restrictive w.r.t. where the memory resides that
 525          * we don't use it even though CA has some support.
 526          */
 527
 528         if (pdev->dma_mask == ~0UL)
 529                 mapaddr = tioca_dma_d64(paddr);
 530         else if (pdev->dma_mask == 0xffffffffffffUL)
 531                 mapaddr = tioca_dma_d48(pdev, paddr);
 532         else
 533                 mapaddr = 0;
 534
 535         /* Last resort ... use PCI portion of CA GART */
 536
 537         if (mapaddr == 0)
 538                 mapaddr = tioca_dma_mapped(pdev, paddr, byte_count);
 539
 540         return mapaddr;
 541 }
 542
 543 /**
 544  * tioca_error_intr_handler - SGI TIO CA error interrupt handler
 545  * @irq: unused
 546  * @arg: pointer to tioca_common struct for the given CA
 547  * @pt: unused
 548  *
 549  * Handle a CA error interrupt.  Simply a wrapper around a SAL call which
 550  * defers processing to the SGI prom.
 551  */
 552 static irqreturn_t
 553 tioca_error_intr_handler(int irq, void *arg, struct pt_regs *pt)
 554 {
 555         struct tioca_common *soft = arg;
 556         struct ia64_sal_retval ret_stuff;
 557         uint64_t segment;
 558         uint64_t busnum;
 559         ret_stuff.status = 0;
 560         ret_stuff.v0 = 0;
 561
 562         segment = 0;
 563         busnum = soft->ca_common.bs_persist_busnum;
 564
 565         SAL_CALL_NOLOCK(ret_stuff,
 566                         (u64) SN_SAL_IOIF_ERROR_INTERRUPT,
 567                         segment, busnum, 0, 0, 0, 0, 0);
 568
 569         return IRQ_HANDLED;
 570 }
 571
 572 /**
 573  * tioca_bus_fixup - perform final PCI fixup for a TIO CA bus
 574  * @prom_bussoft: Common prom/kernel struct representing the bus
 575  *
 576  * Replicates the tioca_common pointed to by @prom_bussoft in kernel
 577  * space.  Allocates and initializes a kernel-only area for a given CA,
 578  * and sets up an irq for handling CA error interrupts.
 579  *
 580  * On successful setup, returns the kernel version of tioca_common back to
 581  * the caller.
 582  */
 583 void *
 584 tioca_bus_fixup(struct pcibus_bussoft *prom_bussoft)
 585 {
 586         struct tioca_common *tioca_common;
 587         struct tioca_kernel *tioca_kern;
 588         struct pci_bus *bus;
 589
 590         /* sanity check prom rev */
 591
 592         if (sn_sal_rev_major() < 4 ||
 593             (sn_sal_rev_major() == 4 && sn_sal_rev_minor() < 6)) {
 594                 printk
 595                     (KERN_ERR "%s:  SGI prom rev 4.06 or greater required "
 596                      "for tioca support\n", __FUNCTION__);
 597                 return NULL;
 598         }
 599
 600         /*
 601          * Allocate kernel bus soft and copy from prom.
 602          */
 603
 604         tioca_common = kcalloc(1, sizeof(struct tioca_common), GFP_KERNEL);
 605         if (!tioca_common)
 606                 return NULL;
 607
 608         memcpy(tioca_common, prom_bussoft, sizeof(struct tioca_common));
 609         tioca_common->ca_common.bs_base |= __IA64_UNCACHED_OFFSET;
 610
 611         /* init kernel-private area */
 612
 613         tioca_kern = kcalloc(1, sizeof(struct tioca_kernel), GFP_KERNEL);
 614         if (!tioca_kern) {
 615                 kfree(tioca_common);
 616                 return NULL;
 617         }
 618
 619         tioca_kern->ca_common = tioca_common;
 620         spin_lock_init(&tioca_kern->ca_lock);
 621         INIT_LIST_HEAD(&tioca_kern->ca_dmamaps);
 622         tioca_kern->ca_closest_node =
 623             nasid_to_cnodeid(tioca_common->ca_closest_nasid);
 624         tioca_common->ca_kernel_private = (uint64_t) tioca_kern;
 625
 626         bus = pci_find_bus(0, tioca_common->ca_common.bs_persist_busnum);
 627         BUG_ON(!bus);
 628         tioca_kern->ca_devices = &bus->devices;
 629
 630         /* init GART */
 631
 632         if (tioca_gart_init(tioca_kern) < 0) {
 633                 kfree(tioca_kern);
 634                 kfree(tioca_common);
 635                 return NULL;
 636         }
 637
 638         tioca_gart_found++;
 639         list_add(&tioca_kern->ca_list, &tioca_list);
 640
 641         if (request_irq(SGI_TIOCA_ERROR,
 642                         tioca_error_intr_handler,
 643                         SA_SHIRQ, "TIOCA error", (void *)tioca_common))
 644                 printk(KERN_WARNING
 645                        "%s:  Unable to get irq %d.  "
 646                        "Error interrupts won't be routed for TIOCA bus %d\n",
 647                        __FUNCTION__, SGI_TIOCA_ERROR,
 648                        (int)tioca_common->ca_common.bs_persist_busnum);
 649
 650         return tioca_common;
 651 }
 652
 653 static struct sn_pcibus_provider tioca_pci_interfaces = {
 654         .dma_map = tioca_dma_map,
 655         .dma_map_consistent = tioca_dma_map,
 656         .dma_unmap = tioca_dma_unmap,
 657         .bus_fixup = tioca_bus_fixup,
 658 };
 659
 660 /**
 661  * tioca_init_provider - init SN PCI provider ops for TIO CA
 662  */
 663 int
 664 tioca_init_provider(void)
 665 {
 666         sn_pci_provider[PCIIO_ASIC_TYPE_TIOCA] = &tioca_pci_interfaces;
 667         return 0;
 668 }