arch/cris/arch-v10/kernel/irq.c

   1 /* $Id: irq.c,v 1.4 2005/01/04 12:22:28 starvik Exp $
   2  *
   3  *      linux/arch/cris/kernel/irq.c
   4  *
   5  *      Copyright (c) 2000-2002 Axis Communications AB
   6  *
   7  *      Authors: Bjorn Wesen (bjornw@axis.com)
   8  *
   9  *      This file contains the interrupt vectors and some
  10  *      helper functions
  11  *
  12  */
  13
  14 #include <asm/irq.h>
  15 #include <linux/irq.h>
  16 #include <linux/kernel.h>
  17 #include <linux/init.h>
  18
  19 #define mask_irq(irq_nr) (*R_VECT_MASK_CLR = 1 << (irq_nr));
  20 #define unmask_irq(irq_nr) (*R_VECT_MASK_SET = 1 << (irq_nr));
  21
  22 /* don't use set_int_vector, it bypasses the linux interrupt handlers. it is
  23  * global just so that the kernel gdb can use it.
  24  */
  25
  26 void
  27 set_int_vector(int n, irqvectptr addr)
  28 {
  29         etrax_irv->v[n + 0x20] = (irqvectptr)addr;
  30 }
  31
  32 /* the breakpoint vector is obviously not made just like the normal irq handlers
  33  * but needs to contain _code_ to jump to addr.
  34  *
  35  * the BREAK n instruction jumps to IBR + n * 8
  36  */
  37
  38 void
  39 set_break_vector(int n, irqvectptr addr)
  40 {
  41         unsigned short *jinstr = (unsigned short *)&etrax_irv->v[n*2];
  42         unsigned long *jaddr = (unsigned long *)(jinstr + 1);
  43
  44         /* if you don't know what this does, do not touch it! */
  45
  46         *jinstr = 0x0d3f;
  47         *jaddr = (unsigned long)addr;
  48
  49         /* 00000026 <clrlop+1a> 3f0d82000000     jump  0x82 */
  50 }
  51
  52 /*
  53  * This builds up the IRQ handler stubs using some ugly macros in irq.h
  54  *
  55  * These macros create the low-level assembly IRQ routines that do all
  56  * the operations that are needed. They are also written to be fast - and to
  57  * disable interrupts as little as humanly possible.
  58  *
  59  */
  60
  61 /* IRQ0 and 1 are special traps */
  62 void hwbreakpoint(void);
  63 void IRQ1_interrupt(void);
  64 BUILD_TIMER_IRQ(2, 0x04)       /* the timer interrupt is somewhat special */
  65 BUILD_IRQ(3, 0x08)
  66 BUILD_IRQ(4, 0x10)
  67 BUILD_IRQ(5, 0x20)
  68 BUILD_IRQ(6, 0x40)
  69 BUILD_IRQ(7, 0x80)
  70 BUILD_IRQ(8, 0x100)
  71 BUILD_IRQ(9, 0x200)
  72 BUILD_IRQ(10, 0x400)
  73 BUILD_IRQ(11, 0x800)
  74 BUILD_IRQ(12, 0x1000)
  75 BUILD_IRQ(13, 0x2000)
  76 void mmu_bus_fault(void);      /* IRQ 14 is the bus fault interrupt */
  77 void multiple_interrupt(void); /* IRQ 15 is the multiple IRQ interrupt */
  78 BUILD_IRQ(16, 0x10000)
  79 BUILD_IRQ(17, 0x20000)
  80 BUILD_IRQ(18, 0x40000)
  81 BUILD_IRQ(19, 0x80000)
  82 BUILD_IRQ(20, 0x100000)
  83 BUILD_IRQ(21, 0x200000)
  84 BUILD_IRQ(22, 0x400000)
  85 BUILD_IRQ(23, 0x800000)
  86 BUILD_IRQ(24, 0x1000000)
  87 BUILD_IRQ(25, 0x2000000)
  88 /* IRQ 26-30 are reserved */
  89 BUILD_IRQ(31, 0x80000000)
  90
  91 /*
  92  * Pointers to the low-level handlers
  93  */
  94
  95 static void (*interrupt[NR_IRQS])(void) = {
  96         NULL, NULL, IRQ2_interrupt, IRQ3_interrupt,
  97         IRQ4_interrupt, IRQ5_interrupt, IRQ6_interrupt, IRQ7_interrupt,
  98         IRQ8_interrupt, IRQ9_interrupt, IRQ10_interrupt, IRQ11_interrupt,
  99         IRQ12_interrupt, IRQ13_interrupt, NULL, NULL,
 100         IRQ16_interrupt, IRQ17_interrupt, IRQ18_interrupt, IRQ19_interrupt,
 101         IRQ20_interrupt, IRQ21_interrupt, IRQ22_interrupt, IRQ23_interrupt,
 102         IRQ24_interrupt, IRQ25_interrupt, NULL, NULL, NULL, NULL, NULL,
 103         IRQ31_interrupt
 104 };
 105
 106 static void enable_crisv10_irq(unsigned int irq);
 107
 108 static unsigned int startup_crisv10_irq(unsigned int irq)
 109 {
 110         enable_crisv10_irq(irq);
 111         return 0;
 112 }
 113
 114 #define shutdown_crisv10_irq    disable_crisv10_irq
 115
 116 static void enable_crisv10_irq(unsigned int irq)
 117 {
 118         unmask_irq(irq);
 119 }
 120
 121 static void disable_crisv10_irq(unsigned int irq)
 122 {
 123         mask_irq(irq);
 124 }
 125
 126 static void ack_crisv10_irq(unsigned int irq)
 127 {
 128 }
 129
 130 static void end_crisv10_irq(unsigned int irq)
 131 {
 132 }
 133
 134 static struct hw_interrupt_type crisv10_irq_type = {
 135         .typename =    "CRISv10",
 136         .startup =     startup_crisv10_irq,
 137         .shutdown =    shutdown_crisv10_irq,
 138         .enable =      enable_crisv10_irq,
 139         .disable =     disable_crisv10_irq,
 140         .ack =         ack_crisv10_irq,
 141         .end =         end_crisv10_irq,
 142         .set_affinity = NULL
 143 };
 144
 145 void weird_irq(void);
 146 void system_call(void);  /* from entry.S */
 147 void do_sigtrap(void); /* from entry.S */
 148 void gdb_handle_breakpoint(void); /* from entry.S */
 149
 150 /* init_IRQ() is called by start_kernel and is responsible for fixing IRQ masks and
 151    setting the irq vector table.
 152 */
 153
 154 void __init
 155 init_IRQ(void)
 156 {
 157         int i;
 158
 159         /* clear all interrupt masks */
 160
 161 #ifndef CONFIG_SVINTO_SIM
 162         *R_IRQ_MASK0_CLR = 0xffffffff;
 163         *R_IRQ_MASK1_CLR = 0xffffffff;
 164         *R_IRQ_MASK2_CLR = 0xffffffff;
 165 #endif
 166
 167         *R_VECT_MASK_CLR = 0xffffffff;
 168
 169         for (i = 0; i < 256; i++)
 170                etrax_irv->v[i] = weird_irq;
 171
 172         /* Initialize IRQ handler descriptiors. */
 173         for(i = 2; i < NR_IRQS; i++) {
 174                 irq_desc[i].chip = &crisv10_irq_type;
 175                 set_int_vector(i, interrupt[i]);
 176         }
 177
 178         /* the entries in the break vector contain actual code to be
 179            executed by the associated break handler, rather than just a jump
 180            address. therefore we need to setup a default breakpoint handler
 181            for all breakpoints */
 182
 183         for (i = 0; i < 16; i++)
 184                 set_break_vector(i, do_sigtrap);
 185
 186         /* except IRQ 15 which is the multiple-IRQ handler on Etrax100 */
 187
 188         set_int_vector(15, multiple_interrupt);
 189
 190         /* 0 and 1 which are special breakpoint/NMI traps */
 191
 192         set_int_vector(0, hwbreakpoint);
 193         set_int_vector(1, IRQ1_interrupt);
 194
 195         /* and irq 14 which is the mmu bus fault handler */
 196
 197         set_int_vector(14, mmu_bus_fault);
 198
 199         /* setup the system-call trap, which is reached by BREAK 13 */
 200
 201         set_break_vector(13, system_call);
 202
 203         /* setup a breakpoint handler for debugging used for both user and
 204            kernel mode debugging  (which is why it is not inside an ifdef
 205            CONFIG_ETRAX_KGDB) */
 206         set_break_vector(8, gdb_handle_breakpoint);
 207
 208 #ifdef CONFIG_ETRAX_KGDB
 209         /* setup kgdb if its enabled, and break into the debugger */
 210         kgdb_init();
 211         breakpoint();
 212 #endif
 213 }