arch/cris/arch-v10/kernel/setup.c

   1 /*
   2  *
   3  *  linux/arch/cris/arch-v10/kernel/setup.c
   4  *
   5  *  Copyright (C) 1995  Linus Torvalds
   6  *  Copyright (c) 2001-2002  Axis Communications AB
   7  */
   8
   9 /*
  10  * This file handles the architecture-dependent parts of initialization
  11  */
  12
  13 #include <linux/seq_file.h>
  14 #include <linux/proc_fs.h>
  15 #include <linux/delay.h>
  16
  17 #ifdef CONFIG_PROC_FS
  18 #define HAS_FPU         0x0001
  19 #define HAS_MMU         0x0002
  20 #define HAS_ETHERNET100 0x0004
  21 #define HAS_TOKENRING   0x0008
  22 #define HAS_SCSI        0x0010
  23 #define HAS_ATA         0x0020
  24 #define HAS_USB         0x0040
  25 #define HAS_IRQ_BUG     0x0080
  26 #define HAS_MMU_BUG     0x0100
  27
  28 static struct cpu_info {
  29         char *model;
  30         unsigned short cache;
  31         unsigned short flags;
  32 } cpu_info[] = {
  33         /* The first four models will never ever run this code and are
  34            only here for display.  */
  35         { "ETRAX 1",         0, 0 },
  36         { "ETRAX 2",         0, 0 },
  37         { "ETRAX 3",         0, HAS_TOKENRING },
  38         { "ETRAX 4",         0, HAS_TOKENRING | HAS_SCSI },
  39         { "Unknown",         0, 0 },
  40         { "Unknown",         0, 0 },
  41         { "Unknown",         0, 0 },
  42         { "Simulator",       8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA },
  43         { "ETRAX 100",       8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA | HAS_IRQ_BUG },
  44         { "ETRAX 100",       8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA },
  45         { "ETRAX 100LX",     8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA | HAS_USB | HAS_MMU | HAS_MMU_BUG },
  46         { "ETRAX 100LX v2",  8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA | HAS_USB | HAS_MMU  },
  47         { "Unknown",         0, 0 }  /* This entry MUST be the last */
  48 };
  49
  50 int show_cpuinfo(struct seq_file *m, void *v)
  51 {
  52         unsigned long revision;
  53         struct cpu_info *info;
  54
  55         /* read the version register in the CPU and print some stuff */
  56
  57         revision = rdvr();
  58
  59         if (revision >= sizeof cpu_info/sizeof *cpu_info)
  60                 info = &cpu_info[sizeof cpu_info/sizeof *cpu_info - 1];
  61         else
  62                 info = &cpu_info[revision];
  63
  64         return seq_printf(m,
  65                        "processor\t: 0\n"
  66                        "cpu\t\t: CRIS\n"
  67                        "cpu revision\t: %lu\n"
  68                        "cpu model\t: %s\n"
  69                        "cache size\t: %d kB\n"
  70                        "fpu\t\t: %s\n"
  71                        "mmu\t\t: %s\n"
  72                        "mmu DMA bug\t: %s\n"
  73                        "ethernet\t: %s Mbps\n"
  74                        "token ring\t: %s\n"
  75                        "scsi\t\t: %s\n"
  76                        "ata\t\t: %s\n"
  77                        "usb\t\t: %s\n"
  78                        "bogomips\t: %lu.%02lu\n",
  79
  80                        revision,
  81                        info->model,
  82                        info->cache,
  83                        info->flags & HAS_FPU ? "yes" : "no",
  84                        info->flags & HAS_MMU ? "yes" : "no",
  85                        info->flags & HAS_MMU_BUG ? "yes" : "no",
  86                        info->flags & HAS_ETHERNET100 ? "10/100" : "10",
  87                        info->flags & HAS_TOKENRING ? "4/16 Mbps" : "no",
  88                        info->flags & HAS_SCSI ? "yes" : "no",
  89                        info->flags & HAS_ATA ? "yes" : "no",
  90                        info->flags & HAS_USB ? "yes" : "no",
  91                        (loops_per_jiffy * HZ + 500) / 500000,
  92                        ((loops_per_jiffy * HZ + 500) / 5000) % 100);
  93 }
  94
  95 #endif /* CONFIG_PROC_FS */
  96
  97 void
  98 show_etrax_copyright(void)
  99 {
 100         printk(KERN_INFO
 101                "Linux/CRIS port on ETRAX 100LX (c) 2001 Axis Communications AB\n");
 102 }