2 * experimental driver for simple i2c audio chips.
4 * Copyright (c) 2000 Gerd Knorr
6 * Eric Sandeen (eric_sandeen@bigfoot.com)
7 * Steve VanDeBogart (vandebo@uclink.berkeley.edu)
8 * Greg Alexander (galexand@acm.org)
10 * This code is placed under the terms of the GNU General Public License
13 * debug - set to 1 if you'd like to see debug messages
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/sched.h>
20 #include <linux/string.h>
21 #include <linux/timer.h>
22 #include <linux/delay.h>
23 #include <linux/errno.h>
24 #include <linux/slab.h>
25 #include <linux/videodev.h>
26 #include <linux/i2c.h>
27 #include <linux/init.h>
28 #include <linux/kthread.h>
29 #include <linux/freezer.h>
31 #include <media/tvaudio.h>
32 #include <media/v4l2-common.h>
33 #include <media/v4l2-chip-ident.h>
35 #include <media/i2c-addr.h>
37 /* ---------------------------------------------------------------------- */
40 static int debug
= 0; /* insmod parameter */
41 module_param(debug
, int, 0644);
43 MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
44 MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
45 MODULE_LICENSE("GPL");
49 /* ---------------------------------------------------------------------- */
55 typedef int (*getvalue
)(int);
56 typedef int (*checkit
)(struct CHIPSTATE
*);
57 typedef int (*initialize
)(struct CHIPSTATE
*);
58 typedef int (*getmode
)(struct CHIPSTATE
*);
59 typedef void (*setmode
)(struct CHIPSTATE
*, int mode
);
60 typedef void (*checkmode
)(struct CHIPSTATE
*);
63 typedef struct AUDIOCMD
{
64 int count
; /* # of bytes to send */
65 unsigned char bytes
[MAXREGS
+1]; /* addr, data, data, ... */
68 /* chip description */
70 char *name
; /* chip name */
72 int addr_lo
, addr_hi
; /* i2c address range */
73 int registers
; /* # of registers */
77 initialize initialize
;
79 #define CHIP_HAS_VOLUME 1
80 #define CHIP_HAS_BASSTREBLE 2
81 #define CHIP_HAS_INPUTSEL 4
83 /* various i2c command sequences */
86 /* which register has which value */
87 int leftreg
,rightreg
,treblereg
,bassreg
;
89 /* initialize with (defaults to 65535/65535/32768/32768 */
90 int leftinit
,rightinit
,trebleinit
,bassinit
;
92 /* functions to convert the values (v4l -> chip) */
93 getvalue volfunc
,treblefunc
,bassfunc
;
99 /* check / autoswitch audio after channel switches */
102 /* input switch register + values for v4l inputs */
108 static struct CHIPDESC chiplist
[];
110 /* current state of the chip */
114 /* index into CHIPDESC array */
117 /* shadow register set */
120 /* current settings */
121 __u16 left
,right
,treble
,bass
,muted
,mode
;
127 struct task_struct
*thread
;
128 struct timer_list wt
;
133 /* ---------------------------------------------------------------------- */
136 static unsigned short normal_i2c
[] = {
137 I2C_ADDR_TDA8425
>> 1,
138 I2C_ADDR_TEA6300
>> 1,
139 I2C_ADDR_TEA6420
>> 1,
140 I2C_ADDR_TDA9840
>> 1,
141 I2C_ADDR_TDA985x_L
>> 1,
142 I2C_ADDR_TDA985x_H
>> 1,
143 I2C_ADDR_TDA9874
>> 1,
144 I2C_ADDR_PIC16C54
>> 1,
148 static struct i2c_driver driver
;
149 static struct i2c_client client_template
;
152 /* ---------------------------------------------------------------------- */
153 /* i2c I/O functions */
155 static int chip_write(struct CHIPSTATE
*chip
, int subaddr
, int val
)
157 unsigned char buffer
[2];
160 v4l_dbg(1, debug
, &chip
->c
, "%s: chip_write: 0x%x\n",
162 chip
->shadow
.bytes
[1] = val
;
164 if (1 != i2c_master_send(&chip
->c
,buffer
,1)) {
165 v4l_warn(&chip
->c
, "%s: I/O error (write 0x%x)\n",
170 v4l_dbg(1, debug
, &chip
->c
, "%s: chip_write: reg%d=0x%x\n",
171 chip
->c
.name
, subaddr
, val
);
172 chip
->shadow
.bytes
[subaddr
+1] = val
;
175 if (2 != i2c_master_send(&chip
->c
,buffer
,2)) {
176 v4l_warn(&chip
->c
, "%s: I/O error (write reg%d=0x%x)\n",
177 chip
->c
.name
, subaddr
, val
);
184 static int chip_write_masked(struct CHIPSTATE
*chip
, int subaddr
, int val
, int mask
)
188 val
= (chip
->shadow
.bytes
[1] & ~mask
) | (val
& mask
);
190 val
= (chip
->shadow
.bytes
[subaddr
+1] & ~mask
) | (val
& mask
);
193 return chip_write(chip
, subaddr
, val
);
196 static int chip_read(struct CHIPSTATE
*chip
)
198 unsigned char buffer
;
200 if (1 != i2c_master_recv(&chip
->c
,&buffer
,1)) {
201 v4l_warn(&chip
->c
, "%s: I/O error (read)\n",
205 v4l_dbg(1, debug
, &chip
->c
, "%s: chip_read: 0x%x\n",chip
->c
.name
, buffer
);
209 static int chip_read2(struct CHIPSTATE
*chip
, int subaddr
)
211 unsigned char write
[1];
212 unsigned char read
[1];
213 struct i2c_msg msgs
[2] = {
214 { chip
->c
.addr
, 0, 1, write
},
215 { chip
->c
.addr
, I2C_M_RD
, 1, read
}
219 if (2 != i2c_transfer(chip
->c
.adapter
,msgs
,2)) {
220 v4l_warn(&chip
->c
, "%s: I/O error (read2)\n", chip
->c
.name
);
223 v4l_dbg(1, debug
, &chip
->c
, "%s: chip_read2: reg%d=0x%x\n",
224 chip
->c
.name
, subaddr
,read
[0]);
228 static int chip_cmd(struct CHIPSTATE
*chip
, char *name
, audiocmd
*cmd
)
235 /* update our shadow register set; print bytes if (debug > 0) */
236 v4l_dbg(1, debug
, &chip
->c
, "%s: chip_cmd(%s): reg=%d, data:",
237 chip
->c
.name
, name
,cmd
->bytes
[0]);
238 for (i
= 1; i
< cmd
->count
; i
++) {
240 printk(" 0x%x",cmd
->bytes
[i
]);
241 chip
->shadow
.bytes
[i
+cmd
->bytes
[0]] = cmd
->bytes
[i
];
246 /* send data to the chip */
247 if (cmd
->count
!= i2c_master_send(&chip
->c
,cmd
->bytes
,cmd
->count
)) {
248 v4l_warn(&chip
->c
, "%s: I/O error (%s)\n", chip
->c
.name
, name
);
254 /* ---------------------------------------------------------------------- */
255 /* kernel thread for doing i2c stuff asyncronly
256 * right now it is used only to check the audio mode (mono/stereo/whatever)
257 * some time after switching to another TV channel, then turn on stereo
261 static void chip_thread_wake(unsigned long data
)
263 struct CHIPSTATE
*chip
= (struct CHIPSTATE
*)data
;
264 wake_up_process(chip
->thread
);
267 static int chip_thread(void *data
)
269 struct CHIPSTATE
*chip
= data
;
270 struct CHIPDESC
*desc
= chiplist
+ chip
->type
;
272 v4l_dbg(1, debug
, &chip
->c
, "%s: thread started\n", chip
->c
.name
);
275 set_current_state(TASK_INTERRUPTIBLE
);
276 if (!kthread_should_stop())
278 set_current_state(TASK_RUNNING
);
280 if (kthread_should_stop())
282 v4l_dbg(1, debug
, &chip
->c
, "%s: thread wakeup\n", chip
->c
.name
);
284 /* don't do anything for radio or if mode != auto */
285 if (chip
->radio
|| chip
->mode
!= 0)
288 /* have a look what's going on */
289 desc
->checkmode(chip
);
291 /* schedule next check */
292 mod_timer(&chip
->wt
, jiffies
+msecs_to_jiffies(2000));
295 v4l_dbg(1, debug
, &chip
->c
, "%s: thread exiting\n", chip
->c
.name
);
299 static void generic_checkmode(struct CHIPSTATE
*chip
)
301 struct CHIPDESC
*desc
= chiplist
+ chip
->type
;
302 int mode
= desc
->getmode(chip
);
304 if (mode
== chip
->prevmode
)
307 v4l_dbg(1, debug
, &chip
->c
, "%s: thread checkmode\n", chip
->c
.name
);
308 chip
->prevmode
= mode
;
310 if (mode
& VIDEO_SOUND_STEREO
)
311 desc
->setmode(chip
,VIDEO_SOUND_STEREO
);
312 else if (mode
& VIDEO_SOUND_LANG1
)
313 desc
->setmode(chip
,VIDEO_SOUND_LANG1
);
314 else if (mode
& VIDEO_SOUND_LANG2
)
315 desc
->setmode(chip
,VIDEO_SOUND_LANG2
);
317 desc
->setmode(chip
,VIDEO_SOUND_MONO
);
320 /* ---------------------------------------------------------------------- */
321 /* audio chip descriptions - defines+functions for tda9840 */
323 #define TDA9840_SW 0x00
324 #define TDA9840_LVADJ 0x02
325 #define TDA9840_STADJ 0x03
326 #define TDA9840_TEST 0x04
328 #define TDA9840_MONO 0x10
329 #define TDA9840_STEREO 0x2a
330 #define TDA9840_DUALA 0x12
331 #define TDA9840_DUALB 0x1e
332 #define TDA9840_DUALAB 0x1a
333 #define TDA9840_DUALBA 0x16
334 #define TDA9840_EXTERNAL 0x7a
336 #define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
337 #define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
338 #define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
340 #define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
341 #define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
343 static int tda9840_getmode(struct CHIPSTATE
*chip
)
347 val
= chip_read(chip
);
348 mode
= VIDEO_SOUND_MONO
;
349 if (val
& TDA9840_DS_DUAL
)
350 mode
|= VIDEO_SOUND_LANG1
| VIDEO_SOUND_LANG2
;
351 if (val
& TDA9840_ST_STEREO
)
352 mode
|= VIDEO_SOUND_STEREO
;
354 v4l_dbg(1, debug
, &chip
->c
, "tda9840_getmode(): raw chip read: %d, return: %d\n",
359 static void tda9840_setmode(struct CHIPSTATE
*chip
, int mode
)
362 int t
= chip
->shadow
.bytes
[TDA9840_SW
+ 1] & ~0x7e;
365 case VIDEO_SOUND_MONO
:
368 case VIDEO_SOUND_STEREO
:
371 case VIDEO_SOUND_LANG1
:
374 case VIDEO_SOUND_LANG2
:
382 chip_write(chip
, TDA9840_SW
, t
);
385 static int tda9840_checkit(struct CHIPSTATE
*chip
)
388 rc
= chip_read(chip
);
389 /* lower 5 bits should be 0 */
390 return ((rc
& 0x1f) == 0) ? 1 : 0;
393 /* ---------------------------------------------------------------------- */
394 /* audio chip descriptions - defines+functions for tda985x */
396 /* subaddresses for TDA9855 */
397 #define TDA9855_VR 0x00 /* Volume, right */
398 #define TDA9855_VL 0x01 /* Volume, left */
399 #define TDA9855_BA 0x02 /* Bass */
400 #define TDA9855_TR 0x03 /* Treble */
401 #define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
403 /* subaddresses for TDA9850 */
404 #define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
406 /* subaddesses for both chips */
407 #define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
408 #define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
409 #define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
410 #define TDA985x_A1 0x08 /* Alignment 1 for both chips */
411 #define TDA985x_A2 0x09 /* Alignment 2 for both chips */
412 #define TDA985x_A3 0x0a /* Alignment 3 for both chips */
414 /* Masks for bits in TDA9855 subaddresses */
415 /* 0x00 - VR in TDA9855 */
416 /* 0x01 - VL in TDA9855 */
417 /* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
418 * in 1dB steps - mute is 0x27 */
421 /* 0x02 - BA in TDA9855 */
422 /* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
423 * in .5dB steps - 0 is 0x0E */
426 /* 0x03 - TR in TDA9855 */
427 /* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
428 * in 3dB steps - 0 is 0x7 */
430 /* Masks for bits in both chips' subaddresses */
431 /* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
432 /* Unique to TDA9855: */
433 /* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
434 * in 3dB steps - mute is 0x0 */
436 /* Unique to TDA9850: */
437 /* lower 4 bits control stereo noise threshold, over which stereo turns off
438 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
441 /* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
442 /* Unique to TDA9855: */
443 #define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */
444 #define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */
445 #define TDA9855_LOUD 1<<5 /* Loudness, 1==off */
446 #define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
447 /* Bits 0 to 3 select various combinations
448 * of line in and line out, only the
449 * interesting ones are defined */
450 #define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */
451 #define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
453 /* Unique to TDA9850: */
454 /* lower 4 bits contol SAP noise threshold, over which SAP turns off
455 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
458 /* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
459 /* Common to TDA9855 and TDA9850: */
460 #define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
461 #define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
462 #define TDA985x_MONO 0 /* Forces Mono output */
463 #define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
465 /* Unique to TDA9855: */
466 #define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */
467 #define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/
468 #define TDA9855_LINEAR 0 /* Linear Stereo */
469 #define TDA9855_PSEUDO 1 /* Pseudo Stereo */
470 #define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */
471 #define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */
472 #define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/
474 /* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
475 /* Common to both TDA9855 and TDA9850: */
476 /* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
477 * in .5dB steps - 0dB is 0x7 */
479 /* 0x08, 0x09 - A1 and A2 (read/write) */
480 /* Common to both TDA9855 and TDA9850: */
481 /* lower 5 bites are wideband and spectral expander alignment
482 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
483 #define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */
484 #define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */
485 #define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
488 /* Common to both TDA9855 and TDA9850: */
489 /* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
490 * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
491 #define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */
493 static int tda9855_volume(int val
) { return val
/0x2e8+0x27; }
494 static int tda9855_bass(int val
) { return val
/0xccc+0x06; }
495 static int tda9855_treble(int val
) { return (val
/0x1c71+0x3)<<1; }
497 static int tda985x_getmode(struct CHIPSTATE
*chip
)
501 mode
= ((TDA985x_STP
| TDA985x_SAPP
) &
502 chip_read(chip
)) >> 4;
503 /* Add mono mode regardless of SAP and stereo */
504 /* Allows forced mono */
505 return mode
| VIDEO_SOUND_MONO
;
508 static void tda985x_setmode(struct CHIPSTATE
*chip
, int mode
)
511 int c6
= chip
->shadow
.bytes
[TDA985x_C6
+1] & 0x3f;
514 case VIDEO_SOUND_MONO
:
517 case VIDEO_SOUND_STEREO
:
518 c6
|= TDA985x_STEREO
;
520 case VIDEO_SOUND_LANG1
:
527 chip_write(chip
,TDA985x_C6
,c6
);
531 /* ---------------------------------------------------------------------- */
532 /* audio chip descriptions - defines+functions for tda9873h */
534 /* Subaddresses for TDA9873H */
536 #define TDA9873_SW 0x00 /* Switching */
537 #define TDA9873_AD 0x01 /* Adjust */
538 #define TDA9873_PT 0x02 /* Port */
540 /* Subaddress 0x00: Switching Data
543 * B1, B0: Input source selection
545 * 1, 0 external stereo
548 #define TDA9873_INP_MASK 3
549 #define TDA9873_INTERNAL 0
550 #define TDA9873_EXT_STEREO 2
551 #define TDA9873_EXT_MONO 1
553 /* B3, B2: output signal select
554 * B4 : transmission mode
557 * 1, 1, 1 Stereo (reversed channel)
564 #define TDA9873_TR_MASK (7 << 2)
565 #define TDA9873_TR_MONO 4
566 #define TDA9873_TR_STEREO 1 << 4
567 #define TDA9873_TR_REVERSE (1 << 3) & (1 << 2)
568 #define TDA9873_TR_DUALA 1 << 2
569 #define TDA9873_TR_DUALB 1 << 3
571 /* output level controls
572 * B5: output level switch (0 = reduced gain, 1 = normal gain)
573 * B6: mute (1 = muted)
574 * B7: auto-mute (1 = auto-mute enabled)
577 #define TDA9873_GAIN_NORMAL 1 << 5
578 #define TDA9873_MUTE 1 << 6
579 #define TDA9873_AUTOMUTE 1 << 7
581 /* Subaddress 0x01: Adjust/standard */
583 /* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
584 * Recommended value is +0 dB
587 #define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
589 /* Bits C6..C4 control FM stantard
591 * 0, 0, 0 B/G (PAL FM)
600 #define TDA9873_DK1 2
601 #define TDA9873_DK2 3
602 #define TDA9873_DK3 4
605 /* C7 controls identification response time (1=fast/0=normal)
607 #define TDA9873_IDR_NORM 0
608 #define TDA9873_IDR_FAST 1 << 7
611 /* Subaddress 0x02: Port data */
613 /* E1, E0 free programmable ports P1/P2
620 #define TDA9873_PORTS 3
623 #define TDA9873_TST_PORT 1 << 2
625 /* E5..E3 control mono output channel (together with transmission mode bit B4)
630 * 0 1 0 1 mono (from stereo decoder)
632 #define TDA9873_MOUT_MONO 0
633 #define TDA9873_MOUT_FMONO 0
634 #define TDA9873_MOUT_DUALA 0
635 #define TDA9873_MOUT_DUALB 1 << 3
636 #define TDA9873_MOUT_ST 1 << 4
637 #define TDA9873_MOUT_EXTM (1 << 4 ) & (1 << 3)
638 #define TDA9873_MOUT_EXTL 1 << 5
639 #define TDA9873_MOUT_EXTR (1 << 5 ) & (1 << 3)
640 #define TDA9873_MOUT_EXTLR (1 << 5 ) & (1 << 4)
641 #define TDA9873_MOUT_MUTE (1 << 5 ) & (1 << 4) & (1 << 3)
643 /* Status bits: (chip read) */
644 #define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
645 #define TDA9873_STEREO 2 /* Stereo sound is identified */
646 #define TDA9873_DUAL 4 /* Dual sound is identified */
648 static int tda9873_getmode(struct CHIPSTATE
*chip
)
652 val
= chip_read(chip
);
653 mode
= VIDEO_SOUND_MONO
;
654 if (val
& TDA9873_STEREO
)
655 mode
|= VIDEO_SOUND_STEREO
;
656 if (val
& TDA9873_DUAL
)
657 mode
|= VIDEO_SOUND_LANG1
| VIDEO_SOUND_LANG2
;
658 v4l_dbg(1, debug
, &chip
->c
, "tda9873_getmode(): raw chip read: %d, return: %d\n",
663 static void tda9873_setmode(struct CHIPSTATE
*chip
, int mode
)
665 int sw_data
= chip
->shadow
.bytes
[TDA9873_SW
+1] & ~ TDA9873_TR_MASK
;
666 /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
668 if ((sw_data
& TDA9873_INP_MASK
) != TDA9873_INTERNAL
) {
669 v4l_dbg(1, debug
, &chip
->c
, "tda9873_setmode(): external input\n");
673 v4l_dbg(1, debug
, &chip
->c
, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW
+1, chip
->shadow
.bytes
[TDA9873_SW
+1]);
674 v4l_dbg(1, debug
, &chip
->c
, "tda9873_setmode(): sw_data = %d\n", sw_data
);
677 case VIDEO_SOUND_MONO
:
678 sw_data
|= TDA9873_TR_MONO
;
680 case VIDEO_SOUND_STEREO
:
681 sw_data
|= TDA9873_TR_STEREO
;
683 case VIDEO_SOUND_LANG1
:
684 sw_data
|= TDA9873_TR_DUALA
;
686 case VIDEO_SOUND_LANG2
:
687 sw_data
|= TDA9873_TR_DUALB
;
694 chip_write(chip
, TDA9873_SW
, sw_data
);
695 v4l_dbg(1, debug
, &chip
->c
, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
699 static int tda9873_checkit(struct CHIPSTATE
*chip
)
703 if (-1 == (rc
= chip_read2(chip
,254)))
705 return (rc
& ~0x1f) == 0x80;
709 /* ---------------------------------------------------------------------- */
710 /* audio chip description - defines+functions for tda9874h and tda9874a */
711 /* Dariusz Kowalewski <darekk@automex.pl> */
713 /* Subaddresses for TDA9874H and TDA9874A (slave rx) */
714 #define TDA9874A_AGCGR 0x00 /* AGC gain */
715 #define TDA9874A_GCONR 0x01 /* general config */
716 #define TDA9874A_MSR 0x02 /* monitor select */
717 #define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
718 #define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
719 #define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
720 #define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
721 #define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
722 #define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
723 #define TDA9874A_DCR 0x09 /* demodulator config */
724 #define TDA9874A_FMER 0x0a /* FM de-emphasis */
725 #define TDA9874A_FMMR 0x0b /* FM dematrix */
726 #define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
727 #define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
728 #define TDA9874A_NCONR 0x0e /* NICAM config */
729 #define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
730 #define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
731 #define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
732 #define TDA9874A_AMCONR 0x12 /* audio mute control */
733 #define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
734 #define TDA9874A_AOSR 0x14 /* analog output select */
735 #define TDA9874A_DAICONR 0x15 /* digital audio interface config */
736 #define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
737 #define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
738 #define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
739 #define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
741 /* Subaddresses for TDA9874H and TDA9874A (slave tx) */
742 #define TDA9874A_DSR 0x00 /* device status */
743 #define TDA9874A_NSR 0x01 /* NICAM status */
744 #define TDA9874A_NECR 0x02 /* NICAM error count */
745 #define TDA9874A_DR1 0x03 /* add. data LSB */
746 #define TDA9874A_DR2 0x04 /* add. data MSB */
747 #define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
748 #define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
749 #define TDA9874A_SIFLR 0x07 /* SIF level */
750 #define TDA9874A_TR2 252 /* test reg. 2 */
751 #define TDA9874A_TR1 253 /* test reg. 1 */
752 #define TDA9874A_DIC 254 /* device id. code */
753 #define TDA9874A_SIC 255 /* software id. code */
756 static int tda9874a_mode
= 1; /* 0: A2, 1: NICAM */
757 static int tda9874a_GCONR
= 0xc0; /* default config. input pin: SIFSEL=0 */
758 static int tda9874a_NCONR
= 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
759 static int tda9874a_ESP
= 0x07; /* default standard: NICAM D/K */
760 static int tda9874a_dic
= -1; /* device id. code */
762 /* insmod options for tda9874a */
763 static unsigned int tda9874a_SIF
= UNSET
;
764 static unsigned int tda9874a_AMSEL
= UNSET
;
765 static unsigned int tda9874a_STD
= UNSET
;
766 module_param(tda9874a_SIF
, int, 0444);
767 module_param(tda9874a_AMSEL
, int, 0444);
768 module_param(tda9874a_STD
, int, 0444);
771 * initialization table for tda9874 decoder:
772 * - carrier 1 freq. registers (3 bytes)
773 * - carrier 2 freq. registers (3 bytes)
774 * - demudulator config register
775 * - FM de-emphasis register (slow identification mode)
776 * Note: frequency registers must be written in single i2c transfer.
778 static struct tda9874a_MODES
{
781 } tda9874a_modelist
[9] = {
783 { 9, { TDA9874A_C1FRA
, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
785 { 9, { TDA9874A_C1FRA
, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
787 { 9, { TDA9874A_C1FRA
, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
789 { 9, { TDA9874A_C1FRA
, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
791 { 9, { TDA9874A_C1FRA
, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
793 { 9, { TDA9874A_C1FRA
, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
795 { 9, { TDA9874A_C1FRA
, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
796 { "NICAM, D/K", /* default */
797 { 9, { TDA9874A_C1FRA
, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
799 { 9, { TDA9874A_C1FRA
, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
802 static int tda9874a_setup(struct CHIPSTATE
*chip
)
804 chip_write(chip
, TDA9874A_AGCGR
, 0x00); /* 0 dB */
805 chip_write(chip
, TDA9874A_GCONR
, tda9874a_GCONR
);
806 chip_write(chip
, TDA9874A_MSR
, (tda9874a_mode
) ? 0x03:0x02);
807 if(tda9874a_dic
== 0x11) {
808 chip_write(chip
, TDA9874A_FMMR
, 0x80);
809 } else { /* dic == 0x07 */
810 chip_cmd(chip
,"tda9874_modelist",&tda9874a_modelist
[tda9874a_STD
].cmd
);
811 chip_write(chip
, TDA9874A_FMMR
, 0x00);
813 chip_write(chip
, TDA9874A_C1OLAR
, 0x00); /* 0 dB */
814 chip_write(chip
, TDA9874A_C2OLAR
, 0x00); /* 0 dB */
815 chip_write(chip
, TDA9874A_NCONR
, tda9874a_NCONR
);
816 chip_write(chip
, TDA9874A_NOLAR
, 0x00); /* 0 dB */
817 /* Note: If signal quality is poor you may want to change NICAM */
818 /* error limit registers (NLELR and NUELR) to some greater values. */
819 /* Then the sound would remain stereo, but won't be so clear. */
820 chip_write(chip
, TDA9874A_NLELR
, 0x14); /* default */
821 chip_write(chip
, TDA9874A_NUELR
, 0x50); /* default */
823 if(tda9874a_dic
== 0x11) {
824 chip_write(chip
, TDA9874A_AMCONR
, 0xf9);
825 chip_write(chip
, TDA9874A_SDACOSR
, (tda9874a_mode
) ? 0x81:0x80);
826 chip_write(chip
, TDA9874A_AOSR
, 0x80);
827 chip_write(chip
, TDA9874A_MDACOSR
, (tda9874a_mode
) ? 0x82:0x80);
828 chip_write(chip
, TDA9874A_ESP
, tda9874a_ESP
);
829 } else { /* dic == 0x07 */
830 chip_write(chip
, TDA9874A_AMCONR
, 0xfb);
831 chip_write(chip
, TDA9874A_SDACOSR
, (tda9874a_mode
) ? 0x81:0x80);
832 chip_write(chip
, TDA9874A_AOSR
, 0x00); /* or 0x10 */
834 v4l_dbg(1, debug
, &chip
->c
, "tda9874a_setup(): %s [0x%02X].\n",
835 tda9874a_modelist
[tda9874a_STD
].name
,tda9874a_STD
);
839 static int tda9874a_getmode(struct CHIPSTATE
*chip
)
842 int necr
; /* just for debugging */
844 mode
= VIDEO_SOUND_MONO
;
846 if(-1 == (dsr
= chip_read2(chip
,TDA9874A_DSR
)))
848 if(-1 == (nsr
= chip_read2(chip
,TDA9874A_NSR
)))
850 if(-1 == (necr
= chip_read2(chip
,TDA9874A_NECR
)))
853 /* need to store dsr/nsr somewhere */
854 chip
->shadow
.bytes
[MAXREGS
-2] = dsr
;
855 chip
->shadow
.bytes
[MAXREGS
-1] = nsr
;
858 /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
859 * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
860 * that sound has (temporarily) switched from NICAM to
861 * mono FM (or AM) on 1st sound carrier due to high NICAM bit
862 * error count. So in fact there is no stereo in this case :-(
863 * But changing the mode to VIDEO_SOUND_MONO would switch
864 * external 4052 multiplexer in audio_hook().
866 if(nsr
& 0x02) /* NSR.S/MB=1 */
867 mode
|= VIDEO_SOUND_STEREO
;
868 if(nsr
& 0x01) /* NSR.D/SB=1 */
869 mode
|= VIDEO_SOUND_LANG1
| VIDEO_SOUND_LANG2
;
871 if(dsr
& 0x02) /* DSR.IDSTE=1 */
872 mode
|= VIDEO_SOUND_STEREO
;
873 if(dsr
& 0x04) /* DSR.IDDUA=1 */
874 mode
|= VIDEO_SOUND_LANG1
| VIDEO_SOUND_LANG2
;
877 v4l_dbg(1, debug
, &chip
->c
, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
878 dsr
, nsr
, necr
, mode
);
882 static void tda9874a_setmode(struct CHIPSTATE
*chip
, int mode
)
884 /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
885 /* If auto-muting is disabled, we can hear a signal of degrading quality. */
887 if(chip
->shadow
.bytes
[MAXREGS
-2] & 0x20) /* DSR.RSSF=1 */
888 tda9874a_NCONR
&= 0xfe; /* enable */
890 tda9874a_NCONR
|= 0x01; /* disable */
891 chip_write(chip
, TDA9874A_NCONR
, tda9874a_NCONR
);
894 /* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
895 * and has auto-select function for audio output (AOSR register).
896 * Old TDA9874H doesn't support these features.
897 * TDA9874A also has additional mono output pin (OUTM), which
898 * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
900 if(tda9874a_dic
== 0x11) {
902 int mdacosr
= (tda9874a_mode
) ? 0x82:0x80;
905 case VIDEO_SOUND_MONO
:
906 case VIDEO_SOUND_STEREO
:
908 case VIDEO_SOUND_LANG1
:
909 aosr
= 0x80; /* auto-select, dual A/A */
910 mdacosr
= (tda9874a_mode
) ? 0x82:0x80;
912 case VIDEO_SOUND_LANG2
:
913 aosr
= 0xa0; /* auto-select, dual B/B */
914 mdacosr
= (tda9874a_mode
) ? 0x83:0x81;
920 chip_write(chip
, TDA9874A_AOSR
, aosr
);
921 chip_write(chip
, TDA9874A_MDACOSR
, mdacosr
);
923 v4l_dbg(1, debug
, &chip
->c
, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
924 mode
, aosr
, mdacosr
);
926 } else { /* dic == 0x07 */
930 case VIDEO_SOUND_MONO
:
931 fmmr
= 0x00; /* mono */
932 aosr
= 0x10; /* A/A */
934 case VIDEO_SOUND_STEREO
:
937 aosr
= 0x00; /* handled by NICAM auto-mute */
939 fmmr
= (tda9874a_ESP
== 1) ? 0x05 : 0x04; /* stereo */
943 case VIDEO_SOUND_LANG1
:
944 fmmr
= 0x02; /* dual */
945 aosr
= 0x10; /* dual A/A */
947 case VIDEO_SOUND_LANG2
:
948 fmmr
= 0x02; /* dual */
949 aosr
= 0x20; /* dual B/B */
955 chip_write(chip
, TDA9874A_FMMR
, fmmr
);
956 chip_write(chip
, TDA9874A_AOSR
, aosr
);
958 v4l_dbg(1, debug
, &chip
->c
, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
963 static int tda9874a_checkit(struct CHIPSTATE
*chip
)
965 int dic
,sic
; /* device id. and software id. codes */
967 if(-1 == (dic
= chip_read2(chip
,TDA9874A_DIC
)))
969 if(-1 == (sic
= chip_read2(chip
,TDA9874A_SIC
)))
972 v4l_dbg(1, debug
, &chip
->c
, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic
, sic
);
974 if((dic
== 0x11)||(dic
== 0x07)) {
975 v4l_info(&chip
->c
, "found tda9874%s.\n", (dic
== 0x11) ? "a":"h");
976 tda9874a_dic
= dic
; /* remember device id. */
979 return 0; /* not found */
982 static int tda9874a_initialize(struct CHIPSTATE
*chip
)
984 if (tda9874a_SIF
> 2)
986 if (tda9874a_STD
> 8)
988 if(tda9874a_AMSEL
> 1)
991 if(tda9874a_SIF
== 1)
992 tda9874a_GCONR
= 0xc0; /* sound IF input 1 */
994 tda9874a_GCONR
= 0xc1; /* sound IF input 2 */
996 tda9874a_ESP
= tda9874a_STD
;
997 tda9874a_mode
= (tda9874a_STD
< 5) ? 0 : 1;
999 if(tda9874a_AMSEL
== 0)
1000 tda9874a_NCONR
= 0x01; /* auto-mute: analog mono input */
1002 tda9874a_NCONR
= 0x05; /* auto-mute: 1st carrier FM or AM */
1004 tda9874a_setup(chip
);
1009 /* ---------------------------------------------------------------------- */
1010 /* audio chip descriptions - defines+functions for tea6420 */
1012 #define TEA6300_VL 0x00 /* volume left */
1013 #define TEA6300_VR 0x01 /* volume right */
1014 #define TEA6300_BA 0x02 /* bass */
1015 #define TEA6300_TR 0x03 /* treble */
1016 #define TEA6300_FA 0x04 /* fader control */
1017 #define TEA6300_S 0x05 /* switch register */
1018 /* values for those registers: */
1019 #define TEA6300_S_SA 0x01 /* stereo A input */
1020 #define TEA6300_S_SB 0x02 /* stereo B */
1021 #define TEA6300_S_SC 0x04 /* stereo C */
1022 #define TEA6300_S_GMU 0x80 /* general mute */
1024 #define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
1025 #define TEA6320_FFR 0x01 /* fader front right (0-5) */
1026 #define TEA6320_FFL 0x02 /* fader front left (0-5) */
1027 #define TEA6320_FRR 0x03 /* fader rear right (0-5) */
1028 #define TEA6320_FRL 0x04 /* fader rear left (0-5) */
1029 #define TEA6320_BA 0x05 /* bass (0-4) */
1030 #define TEA6320_TR 0x06 /* treble (0-4) */
1031 #define TEA6320_S 0x07 /* switch register */
1032 /* values for those registers: */
1033 #define TEA6320_S_SA 0x07 /* stereo A input */
1034 #define TEA6320_S_SB 0x06 /* stereo B */
1035 #define TEA6320_S_SC 0x05 /* stereo C */
1036 #define TEA6320_S_SD 0x04 /* stereo D */
1037 #define TEA6320_S_GMU 0x80 /* general mute */
1039 #define TEA6420_S_SA 0x00 /* stereo A input */
1040 #define TEA6420_S_SB 0x01 /* stereo B */
1041 #define TEA6420_S_SC 0x02 /* stereo C */
1042 #define TEA6420_S_SD 0x03 /* stereo D */
1043 #define TEA6420_S_SE 0x04 /* stereo E */
1044 #define TEA6420_S_GMU 0x05 /* general mute */
1046 static int tea6300_shift10(int val
) { return val
>> 10; }
1047 static int tea6300_shift12(int val
) { return val
>> 12; }
1049 /* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
1050 /* 0x0c mirror those immediately higher) */
1051 static int tea6320_volume(int val
) { return (val
/ (65535/(63-12)) + 12) & 0x3f; }
1052 static int tea6320_shift11(int val
) { return val
>> 11; }
1053 static int tea6320_initialize(struct CHIPSTATE
* chip
)
1055 chip_write(chip
, TEA6320_FFR
, 0x3f);
1056 chip_write(chip
, TEA6320_FFL
, 0x3f);
1057 chip_write(chip
, TEA6320_FRR
, 0x3f);
1058 chip_write(chip
, TEA6320_FRL
, 0x3f);
1064 /* ---------------------------------------------------------------------- */
1065 /* audio chip descriptions - defines+functions for tda8425 */
1067 #define TDA8425_VL 0x00 /* volume left */
1068 #define TDA8425_VR 0x01 /* volume right */
1069 #define TDA8425_BA 0x02 /* bass */
1070 #define TDA8425_TR 0x03 /* treble */
1071 #define TDA8425_S1 0x08 /* switch functions */
1072 /* values for those registers: */
1073 #define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
1074 #define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
1075 #define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
1076 #define TDA8425_S1_MU 0x20 /* mute bit */
1077 #define TDA8425_S1_STEREO 0x18 /* stereo bits */
1078 #define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
1079 #define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
1080 #define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
1081 #define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
1082 #define TDA8425_S1_ML 0x06 /* language selector */
1083 #define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
1084 #define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
1085 #define TDA8425_S1_ML_STEREO 0x06 /* stereo */
1086 #define TDA8425_S1_IS 0x01 /* channel selector */
1089 static int tda8425_shift10(int val
) { return (val
>> 10) | 0xc0; }
1090 static int tda8425_shift12(int val
) { return (val
>> 12) | 0xf0; }
1092 static int tda8425_initialize(struct CHIPSTATE
*chip
)
1094 struct CHIPDESC
*desc
= chiplist
+ chip
->type
;
1095 int inputmap
[4] = { /* tuner */ TDA8425_S1_CH2
, /* radio */ TDA8425_S1_CH1
,
1096 /* extern */ TDA8425_S1_CH1
, /* intern */ TDA8425_S1_OFF
};
1098 if (chip
->c
.adapter
->id
== I2C_HW_B_RIVA
) {
1099 memcpy (desc
->inputmap
, inputmap
, sizeof (inputmap
));
1104 static void tda8425_setmode(struct CHIPSTATE
*chip
, int mode
)
1106 int s1
= chip
->shadow
.bytes
[TDA8425_S1
+1] & 0xe1;
1108 if (mode
& VIDEO_SOUND_LANG1
) {
1109 s1
|= TDA8425_S1_ML_SOUND_A
;
1110 s1
|= TDA8425_S1_STEREO_PSEUDO
;
1112 } else if (mode
& VIDEO_SOUND_LANG2
) {
1113 s1
|= TDA8425_S1_ML_SOUND_B
;
1114 s1
|= TDA8425_S1_STEREO_PSEUDO
;
1117 s1
|= TDA8425_S1_ML_STEREO
;
1119 if (mode
& VIDEO_SOUND_MONO
)
1120 s1
|= TDA8425_S1_STEREO_MONO
;
1121 if (mode
& VIDEO_SOUND_STEREO
)
1122 s1
|= TDA8425_S1_STEREO_SPATIAL
;
1124 chip_write(chip
,TDA8425_S1
,s1
);
1128 /* ---------------------------------------------------------------------- */
1129 /* audio chip descriptions - defines+functions for pic16c54 (PV951) */
1131 /* the registers of 16C54, I2C sub address. */
1132 #define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
1133 #define PIC16C54_REG_MISC 0x02
1135 /* bit definition of the RESET register, I2C data. */
1136 #define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
1137 /* code of remote controller */
1138 #define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
1139 #define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
1140 #define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
1141 #define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
1142 #define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
1143 #define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
1144 #define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
1146 /* ---------------------------------------------------------------------- */
1147 /* audio chip descriptions - defines+functions for TA8874Z */
1149 /* write 1st byte */
1150 #define TA8874Z_LED_STE 0x80
1151 #define TA8874Z_LED_BIL 0x40
1152 #define TA8874Z_LED_EXT 0x20
1153 #define TA8874Z_MONO_SET 0x10
1154 #define TA8874Z_MUTE 0x08
1155 #define TA8874Z_F_MONO 0x04
1156 #define TA8874Z_MODE_SUB 0x02
1157 #define TA8874Z_MODE_MAIN 0x01
1159 /* write 2nd byte */
1160 /*#define TA8874Z_TI 0x80 */ /* test mode */
1161 #define TA8874Z_SEPARATION 0x3f
1162 #define TA8874Z_SEPARATION_DEFAULT 0x10
1165 #define TA8874Z_B1 0x80
1166 #define TA8874Z_B0 0x40
1167 #define TA8874Z_CHAG_FLAG 0x20
1175 static int ta8874z_getmode(struct CHIPSTATE
*chip
)
1179 val
= chip_read(chip
);
1180 mode
= VIDEO_SOUND_MONO
;
1181 if (val
& TA8874Z_B1
){
1182 mode
|= VIDEO_SOUND_LANG1
| VIDEO_SOUND_LANG2
;
1183 }else if (!(val
& TA8874Z_B0
)){
1184 mode
|= VIDEO_SOUND_STEREO
;
1186 /* v4l_dbg(1, debug, &chip->c, "ta8874z_getmode(): raw chip read: 0x%02x, return: 0x%02x\n", val, mode); */
1190 static audiocmd ta8874z_stereo
= { 2, {0, TA8874Z_SEPARATION_DEFAULT
}};
1191 static audiocmd ta8874z_mono
= {2, { TA8874Z_MONO_SET
, TA8874Z_SEPARATION_DEFAULT
}};
1192 static audiocmd ta8874z_main
= {2, { 0, TA8874Z_SEPARATION_DEFAULT
}};
1193 static audiocmd ta8874z_sub
= {2, { TA8874Z_MODE_SUB
, TA8874Z_SEPARATION_DEFAULT
}};
1195 static void ta8874z_setmode(struct CHIPSTATE
*chip
, int mode
)
1199 v4l_dbg(1, debug
, &chip
->c
, "ta8874z_setmode(): mode: 0x%02x\n", mode
);
1202 case VIDEO_SOUND_MONO
:
1205 case VIDEO_SOUND_STEREO
:
1206 t
= &ta8874z_stereo
;
1208 case VIDEO_SOUND_LANG1
:
1211 case VIDEO_SOUND_LANG2
:
1219 chip_cmd(chip
, "TA8874Z", t
);
1222 static int ta8874z_checkit(struct CHIPSTATE
*chip
)
1225 rc
= chip_read(chip
);
1226 return ((rc
& 0x1f) == 0x1f) ? 1 : 0;
1229 /* ---------------------------------------------------------------------- */
1230 /* audio chip descriptions - struct CHIPDESC */
1232 /* insmod options to enable/disable individual audio chips */
1233 static int tda8425
= 1;
1234 static int tda9840
= 1;
1235 static int tda9850
= 1;
1236 static int tda9855
= 1;
1237 static int tda9873
= 1;
1238 static int tda9874a
= 1;
1239 static int tea6300
= 0; /* address clash with msp34xx */
1240 static int tea6320
= 0; /* address clash with msp34xx */
1241 static int tea6420
= 1;
1242 static int pic16c54
= 1;
1243 static int ta8874z
= 0; /* address clash with tda9840 */
1245 module_param(tda8425
, int, 0444);
1246 module_param(tda9840
, int, 0444);
1247 module_param(tda9850
, int, 0444);
1248 module_param(tda9855
, int, 0444);
1249 module_param(tda9873
, int, 0444);
1250 module_param(tda9874a
, int, 0444);
1251 module_param(tea6300
, int, 0444);
1252 module_param(tea6320
, int, 0444);
1253 module_param(tea6420
, int, 0444);
1254 module_param(pic16c54
, int, 0444);
1255 module_param(ta8874z
, int, 0444);
1257 static struct CHIPDESC chiplist
[] = {
1260 .id
= I2C_DRIVERID_TDA9840
,
1261 .insmodopt
= &tda9840
,
1262 .addr_lo
= I2C_ADDR_TDA9840
>> 1,
1263 .addr_hi
= I2C_ADDR_TDA9840
>> 1,
1266 .checkit
= tda9840_checkit
,
1267 .getmode
= tda9840_getmode
,
1268 .setmode
= tda9840_setmode
,
1269 .checkmode
= generic_checkmode
,
1271 .init
= { 2, { TDA9840_TEST
, TDA9840_TEST_INT1SN
1272 /* ,TDA9840_SW, TDA9840_MONO */} }
1276 .id
= I2C_DRIVERID_TDA9873
,
1277 .checkit
= tda9873_checkit
,
1278 .insmodopt
= &tda9873
,
1279 .addr_lo
= I2C_ADDR_TDA985x_L
>> 1,
1280 .addr_hi
= I2C_ADDR_TDA985x_H
>> 1,
1282 .flags
= CHIP_HAS_INPUTSEL
,
1284 .getmode
= tda9873_getmode
,
1285 .setmode
= tda9873_setmode
,
1286 .checkmode
= generic_checkmode
,
1288 .init
= { 4, { TDA9873_SW
, 0xa4, 0x06, 0x03 } },
1289 .inputreg
= TDA9873_SW
,
1290 .inputmute
= TDA9873_MUTE
| TDA9873_AUTOMUTE
,
1291 .inputmap
= {0xa0, 0xa2, 0xa0, 0xa0},
1292 .inputmask
= TDA9873_INP_MASK
|TDA9873_MUTE
|TDA9873_AUTOMUTE
,
1296 .name
= "tda9874h/a",
1297 .id
= I2C_DRIVERID_TDA9874
,
1298 .checkit
= tda9874a_checkit
,
1299 .initialize
= tda9874a_initialize
,
1300 .insmodopt
= &tda9874a
,
1301 .addr_lo
= I2C_ADDR_TDA9874
>> 1,
1302 .addr_hi
= I2C_ADDR_TDA9874
>> 1,
1304 .getmode
= tda9874a_getmode
,
1305 .setmode
= tda9874a_setmode
,
1306 .checkmode
= generic_checkmode
,
1310 .id
= I2C_DRIVERID_TDA9850
,
1311 .insmodopt
= &tda9850
,
1312 .addr_lo
= I2C_ADDR_TDA985x_L
>> 1,
1313 .addr_hi
= I2C_ADDR_TDA985x_H
>> 1,
1316 .getmode
= tda985x_getmode
,
1317 .setmode
= tda985x_setmode
,
1319 .init
= { 8, { TDA9850_C4
, 0x08, 0x08, TDA985x_STEREO
, 0x07, 0x10, 0x10, 0x03 } }
1323 .id
= I2C_DRIVERID_TDA9855
,
1324 .insmodopt
= &tda9855
,
1325 .addr_lo
= I2C_ADDR_TDA985x_L
>> 1,
1326 .addr_hi
= I2C_ADDR_TDA985x_H
>> 1,
1328 .flags
= CHIP_HAS_VOLUME
| CHIP_HAS_BASSTREBLE
,
1330 .leftreg
= TDA9855_VL
,
1331 .rightreg
= TDA9855_VR
,
1332 .bassreg
= TDA9855_BA
,
1333 .treblereg
= TDA9855_TR
,
1334 .volfunc
= tda9855_volume
,
1335 .bassfunc
= tda9855_bass
,
1336 .treblefunc
= tda9855_treble
,
1338 .getmode
= tda985x_getmode
,
1339 .setmode
= tda985x_setmode
,
1341 .init
= { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1342 TDA9855_MUTE
| TDA9855_AVL
| TDA9855_LOUD
| TDA9855_INT
,
1343 TDA985x_STEREO
| TDA9855_LINEAR
| TDA9855_TZCM
| TDA9855_VZCM
,
1344 0x07, 0x10, 0x10, 0x03 }}
1348 .id
= I2C_DRIVERID_TEA6300
,
1349 .insmodopt
= &tea6300
,
1350 .addr_lo
= I2C_ADDR_TEA6300
>> 1,
1351 .addr_hi
= I2C_ADDR_TEA6300
>> 1,
1353 .flags
= CHIP_HAS_VOLUME
| CHIP_HAS_BASSTREBLE
| CHIP_HAS_INPUTSEL
,
1355 .leftreg
= TEA6300_VR
,
1356 .rightreg
= TEA6300_VL
,
1357 .bassreg
= TEA6300_BA
,
1358 .treblereg
= TEA6300_TR
,
1359 .volfunc
= tea6300_shift10
,
1360 .bassfunc
= tea6300_shift12
,
1361 .treblefunc
= tea6300_shift12
,
1363 .inputreg
= TEA6300_S
,
1364 .inputmap
= { TEA6300_S_SA
, TEA6300_S_SB
, TEA6300_S_SC
},
1365 .inputmute
= TEA6300_S_GMU
,
1369 .id
= I2C_DRIVERID_TEA6300
,
1370 .initialize
= tea6320_initialize
,
1371 .insmodopt
= &tea6320
,
1372 .addr_lo
= I2C_ADDR_TEA6300
>> 1,
1373 .addr_hi
= I2C_ADDR_TEA6300
>> 1,
1375 .flags
= CHIP_HAS_VOLUME
| CHIP_HAS_BASSTREBLE
| CHIP_HAS_INPUTSEL
,
1377 .leftreg
= TEA6320_V
,
1378 .rightreg
= TEA6320_V
,
1379 .bassreg
= TEA6320_BA
,
1380 .treblereg
= TEA6320_TR
,
1381 .volfunc
= tea6320_volume
,
1382 .bassfunc
= tea6320_shift11
,
1383 .treblefunc
= tea6320_shift11
,
1385 .inputreg
= TEA6320_S
,
1386 .inputmap
= { TEA6320_S_SA
, TEA6420_S_SB
, TEA6300_S_SC
, TEA6320_S_SD
},
1387 .inputmute
= TEA6300_S_GMU
,
1391 .id
= I2C_DRIVERID_TEA6420
,
1392 .insmodopt
= &tea6420
,
1393 .addr_lo
= I2C_ADDR_TEA6420
>> 1,
1394 .addr_hi
= I2C_ADDR_TEA6420
>> 1,
1396 .flags
= CHIP_HAS_INPUTSEL
,
1399 .inputmap
= { TEA6420_S_SA
, TEA6420_S_SB
, TEA6420_S_SC
},
1400 .inputmute
= TEA6300_S_GMU
,
1404 .id
= I2C_DRIVERID_TDA8425
,
1405 .insmodopt
= &tda8425
,
1406 .addr_lo
= I2C_ADDR_TDA8425
>> 1,
1407 .addr_hi
= I2C_ADDR_TDA8425
>> 1,
1409 .flags
= CHIP_HAS_VOLUME
| CHIP_HAS_BASSTREBLE
| CHIP_HAS_INPUTSEL
,
1411 .leftreg
= TDA8425_VL
,
1412 .rightreg
= TDA8425_VR
,
1413 .bassreg
= TDA8425_BA
,
1414 .treblereg
= TDA8425_TR
,
1415 .volfunc
= tda8425_shift10
,
1416 .bassfunc
= tda8425_shift12
,
1417 .treblefunc
= tda8425_shift12
,
1419 .inputreg
= TDA8425_S1
,
1420 .inputmap
= { TDA8425_S1_CH1
, TDA8425_S1_CH1
, TDA8425_S1_CH1
},
1421 .inputmute
= TDA8425_S1_OFF
,
1423 .setmode
= tda8425_setmode
,
1424 .initialize
= tda8425_initialize
,
1427 .name
= "pic16c54 (PV951)",
1428 .id
= I2C_DRIVERID_PIC16C54_PV9
,
1429 .insmodopt
= &pic16c54
,
1430 .addr_lo
= I2C_ADDR_PIC16C54
>> 1,
1431 .addr_hi
= I2C_ADDR_PIC16C54
>> 1,
1433 .flags
= CHIP_HAS_INPUTSEL
,
1435 .inputreg
= PIC16C54_REG_MISC
,
1436 .inputmap
= {PIC16C54_MISC_SND_NOTMUTE
|PIC16C54_MISC_SWITCH_TUNER
,
1437 PIC16C54_MISC_SND_NOTMUTE
|PIC16C54_MISC_SWITCH_LINE
,
1438 PIC16C54_MISC_SND_NOTMUTE
|PIC16C54_MISC_SWITCH_LINE
,
1439 PIC16C54_MISC_SND_MUTE
},
1440 .inputmute
= PIC16C54_MISC_SND_MUTE
,
1445 /*.id = I2C_DRIVERID_TA8874Z, */
1446 .checkit
= ta8874z_checkit
,
1447 .insmodopt
= &ta8874z
,
1448 .addr_lo
= I2C_ADDR_TDA9840
>> 1,
1449 .addr_hi
= I2C_ADDR_TDA9840
>> 1,
1452 .getmode
= ta8874z_getmode
,
1453 .setmode
= ta8874z_setmode
,
1454 .checkmode
= generic_checkmode
,
1456 .init
= {2, { TA8874Z_MONO_SET
, TA8874Z_SEPARATION_DEFAULT
}},
1458 { .name
= NULL
} /* EOF */
1462 /* ---------------------------------------------------------------------- */
1463 /* i2c registration */
1465 static int chip_attach(struct i2c_adapter
*adap
, int addr
, int kind
)
1467 struct CHIPSTATE
*chip
;
1468 struct CHIPDESC
*desc
;
1470 chip
= kzalloc(sizeof(*chip
),GFP_KERNEL
);
1473 memcpy(&chip
->c
,&client_template
,sizeof(struct i2c_client
));
1474 chip
->c
.adapter
= adap
;
1475 chip
->c
.addr
= addr
;
1476 i2c_set_clientdata(&chip
->c
, chip
);
1478 /* find description for the chip */
1479 v4l_dbg(1, debug
, &chip
->c
, "chip found @ 0x%x\n", addr
<<1);
1480 for (desc
= chiplist
; desc
->name
!= NULL
; desc
++) {
1481 if (0 == *(desc
->insmodopt
))
1483 if (addr
< desc
->addr_lo
||
1484 addr
> desc
->addr_hi
)
1486 if (desc
->checkit
&& !desc
->checkit(chip
))
1490 if (desc
->name
== NULL
) {
1491 v4l_dbg(1, debug
, &chip
->c
, "no matching chip description found\n");
1494 v4l_info(&chip
->c
, "%s found @ 0x%x (%s)\n", desc
->name
, addr
<<1, adap
->name
);
1496 v4l_dbg(1, debug
, &chip
->c
, "matches:%s%s%s.\n",
1497 (desc
->flags
& CHIP_HAS_VOLUME
) ? " volume" : "",
1498 (desc
->flags
& CHIP_HAS_BASSTREBLE
) ? " bass/treble" : "",
1499 (desc
->flags
& CHIP_HAS_INPUTSEL
) ? " audiomux" : "");
1502 /* fill required data structures */
1503 strcpy(chip
->c
.name
, desc
->name
);
1504 chip
->type
= desc
-chiplist
;
1505 chip
->shadow
.count
= desc
->registers
+1;
1506 chip
->prevmode
= -1;
1507 chip
->audmode
= V4L2_TUNER_MODE_LANG1
;
1509 i2c_attach_client(&chip
->c
);
1511 /* initialization */
1512 if (desc
->initialize
!= NULL
)
1513 desc
->initialize(chip
);
1515 chip_cmd(chip
,"init",&desc
->init
);
1517 if (desc
->flags
& CHIP_HAS_VOLUME
) {
1518 chip
->left
= desc
->leftinit
? desc
->leftinit
: 65535;
1519 chip
->right
= desc
->rightinit
? desc
->rightinit
: 65535;
1520 chip_write(chip
,desc
->leftreg
,desc
->volfunc(chip
->left
));
1521 chip_write(chip
,desc
->rightreg
,desc
->volfunc(chip
->right
));
1523 if (desc
->flags
& CHIP_HAS_BASSTREBLE
) {
1524 chip
->treble
= desc
->trebleinit
? desc
->trebleinit
: 32768;
1525 chip
->bass
= desc
->bassinit
? desc
->bassinit
: 32768;
1526 chip_write(chip
,desc
->bassreg
,desc
->bassfunc(chip
->bass
));
1527 chip_write(chip
,desc
->treblereg
,desc
->treblefunc(chip
->treble
));
1530 chip
->thread
= NULL
;
1531 if (desc
->checkmode
) {
1532 /* start async thread */
1533 init_timer(&chip
->wt
);
1534 chip
->wt
.function
= chip_thread_wake
;
1535 chip
->wt
.data
= (unsigned long)chip
;
1536 chip
->thread
= kthread_run(chip_thread
, chip
, chip
->c
.name
);
1537 if (IS_ERR(chip
->thread
)) {
1538 v4l_warn(&chip
->c
, "%s: failed to create kthread\n",
1540 chip
->thread
= NULL
;
1546 static int chip_probe(struct i2c_adapter
*adap
)
1548 /* don't attach on saa7146 based cards,
1549 because dedicated drivers are used */
1550 if ((adap
->id
== I2C_HW_SAA7146
))
1552 if (adap
->class & I2C_CLASS_TV_ANALOG
)
1553 return i2c_probe(adap
, &addr_data
, chip_attach
);
1557 static int chip_detach(struct i2c_client
*client
)
1559 struct CHIPSTATE
*chip
= i2c_get_clientdata(client
);
1561 del_timer_sync(&chip
->wt
);
1563 /* shutdown async thread */
1564 kthread_stop(chip
->thread
);
1565 chip
->thread
= NULL
;
1568 i2c_detach_client(&chip
->c
);
1573 static int tvaudio_set_ctrl(struct CHIPSTATE
*chip
, struct v4l2_control
*ctrl
)
1575 struct CHIPDESC
*desc
= chiplist
+ chip
->type
;
1578 case V4L2_CID_AUDIO_MUTE
:
1579 if (ctrl
->value
< 0 || ctrl
->value
>= 2)
1581 chip
->muted
= ctrl
->value
;
1583 chip_write_masked(chip
,desc
->inputreg
,desc
->inputmute
,desc
->inputmask
);
1585 chip_write_masked(chip
,desc
->inputreg
,
1586 desc
->inputmap
[chip
->input
],desc
->inputmask
);
1595 /* ---------------------------------------------------------------------- */
1596 /* video4linux interface */
1598 static int chip_command(struct i2c_client
*client
,
1599 unsigned int cmd
, void *arg
)
1601 struct CHIPSTATE
*chip
= i2c_get_clientdata(client
);
1602 struct CHIPDESC
*desc
= chiplist
+ chip
->type
;
1604 v4l_dbg(1, debug
, &chip
->c
, "%s: chip_command 0x%x\n", chip
->c
.name
, cmd
);
1607 case AUDC_SET_RADIO
:
1609 chip
->watch_stereo
= 0;
1610 /* del_timer(&chip->wt); */
1613 /* --- v4l ioctls --- */
1614 /* take care: bttv does userspace copying, we'll get a
1615 kernel pointer here... */
1618 struct video_audio
*va
= arg
;
1620 if (desc
->flags
& CHIP_HAS_VOLUME
) {
1621 va
->flags
|= VIDEO_AUDIO_VOLUME
;
1622 va
->volume
= max(chip
->left
,chip
->right
);
1624 va
->balance
= (32768*min(chip
->left
,chip
->right
))/
1627 va
->balance
= 32768;
1629 if (desc
->flags
& CHIP_HAS_BASSTREBLE
) {
1630 va
->flags
|= VIDEO_AUDIO_BASS
| VIDEO_AUDIO_TREBLE
;
1631 va
->bass
= chip
->bass
;
1632 va
->treble
= chip
->treble
;
1636 va
->mode
= desc
->getmode(chip
);
1638 va
->mode
= VIDEO_SOUND_MONO
;
1645 struct video_audio
*va
= arg
;
1647 if (desc
->flags
& CHIP_HAS_VOLUME
) {
1648 chip
->left
= (min(65536 - va
->balance
,32768) *
1649 va
->volume
) / 32768;
1650 chip
->right
= (min(va
->balance
,(__u16
)32768) *
1651 va
->volume
) / 32768;
1652 chip_write(chip
,desc
->leftreg
,desc
->volfunc(chip
->left
));
1653 chip_write(chip
,desc
->rightreg
,desc
->volfunc(chip
->right
));
1655 if (desc
->flags
& CHIP_HAS_BASSTREBLE
) {
1656 chip
->bass
= va
->bass
;
1657 chip
->treble
= va
->treble
;
1658 chip_write(chip
,desc
->bassreg
,desc
->bassfunc(chip
->bass
));
1659 chip_write(chip
,desc
->treblereg
,desc
->treblefunc(chip
->treble
));
1661 if (desc
->setmode
&& va
->mode
) {
1662 chip
->watch_stereo
= 0;
1663 /* del_timer(&chip->wt); */
1664 chip
->mode
= va
->mode
;
1665 desc
->setmode(chip
,va
->mode
);
1671 return tvaudio_set_ctrl(chip
, arg
);
1673 case VIDIOC_INT_G_AUDIO_ROUTING
:
1675 struct v4l2_routing
*rt
= arg
;
1677 rt
->input
= chip
->input
;
1682 case VIDIOC_INT_S_AUDIO_ROUTING
:
1684 struct v4l2_routing
*rt
= arg
;
1686 if (!(desc
->flags
& CHIP_HAS_INPUTSEL
) || rt
->input
>= 4)
1688 /* There are four inputs: tuner, radio, extern and intern. */
1689 chip
->input
= rt
->input
;
1692 chip_write_masked(chip
, desc
->inputreg
,
1693 desc
->inputmap
[chip
->input
], desc
->inputmask
);
1697 case VIDIOC_S_TUNER
:
1699 struct v4l2_tuner
*vt
= arg
;
1704 switch (vt
->audmode
) {
1705 case V4L2_TUNER_MODE_MONO
:
1706 mode
= VIDEO_SOUND_MONO
;
1708 case V4L2_TUNER_MODE_STEREO
:
1709 case V4L2_TUNER_MODE_LANG1_LANG2
:
1710 mode
= VIDEO_SOUND_STEREO
;
1712 case V4L2_TUNER_MODE_LANG1
:
1713 mode
= VIDEO_SOUND_LANG1
;
1715 case V4L2_TUNER_MODE_LANG2
:
1716 mode
= VIDEO_SOUND_LANG2
;
1721 chip
->audmode
= vt
->audmode
;
1723 if (desc
->setmode
&& mode
) {
1724 chip
->watch_stereo
= 0;
1725 /* del_timer(&chip->wt); */
1727 desc
->setmode(chip
, mode
);
1732 case VIDIOC_G_TUNER
:
1734 struct v4l2_tuner
*vt
= arg
;
1735 int mode
= VIDEO_SOUND_MONO
;
1739 vt
->audmode
= chip
->audmode
;
1741 vt
->capability
= V4L2_TUNER_CAP_STEREO
|
1742 V4L2_TUNER_CAP_LANG1
| V4L2_TUNER_CAP_LANG2
;
1745 mode
= desc
->getmode(chip
);
1747 if (mode
& VIDEO_SOUND_MONO
)
1748 vt
->rxsubchans
|= V4L2_TUNER_SUB_MONO
;
1749 if (mode
& VIDEO_SOUND_STEREO
)
1750 vt
->rxsubchans
|= V4L2_TUNER_SUB_STEREO
;
1751 /* Note: for SAP it should be mono/lang2 or stereo/lang2.
1752 When this module is converted fully to v4l2, then this
1753 should change for those chips that can detect SAP. */
1754 if (mode
& VIDEO_SOUND_LANG1
)
1755 vt
->rxsubchans
= V4L2_TUNER_SUB_LANG1
|
1756 V4L2_TUNER_SUB_LANG2
;
1766 case VIDIOC_S_FREQUENCY
:
1767 chip
->mode
= 0; /* automatic */
1768 if (desc
->checkmode
) {
1769 desc
->setmode(chip
,VIDEO_SOUND_MONO
);
1770 if (chip
->prevmode
!= VIDEO_SOUND_MONO
)
1771 chip
->prevmode
= -1; /* reset previous mode */
1772 mod_timer(&chip
->wt
, jiffies
+msecs_to_jiffies(2000));
1773 /* the thread will call checkmode() later */
1777 case VIDIOC_G_CHIP_IDENT
:
1778 return v4l2_chip_ident_i2c_client(client
, arg
, V4L2_IDENT_TVAUDIO
, 0);
1783 static struct i2c_driver driver
= {
1787 .id
= I2C_DRIVERID_TVAUDIO
,
1788 .attach_adapter
= chip_probe
,
1789 .detach_client
= chip_detach
,
1790 .command
= chip_command
,
1793 static struct i2c_client client_template
=
1799 static int __init
audiochip_init_module(void)
1801 struct CHIPDESC
*desc
;
1804 printk(KERN_INFO
"tvaudio: TV audio decoder + audio/video mux driver\n");
1805 printk(KERN_INFO
"tvaudio: known chips: ");
1806 for (desc
= chiplist
; desc
->name
!= NULL
; desc
++)
1807 printk("%s%s", (desc
== chiplist
) ? "" : ", ", desc
->name
);
1811 return i2c_add_driver(&driver
);
1814 static void __exit
audiochip_cleanup_module(void)
1816 i2c_del_driver(&driver
);
1819 module_init(audiochip_init_module
);
1820 module_exit(audiochip_cleanup_module
);