arch/mips/pci/fixup-au1000.c

   1 /*
   2  * BRIEF MODULE DESCRIPTION
   3  *      Board specific pci fixups.
   4  *
   5  * Copyright 2001-2003 MontaVista Software Inc.
   6  * Author: MontaVista Software, Inc.
   7  *              ppopov@mvista.com or source@mvista.com
   8  *
   9  *  This program is free software; you can redistribute  it and/or modify it
  10  *  under  the terms of  the GNU General  Public License as published by the
  11  *  Free Software Foundation;  either version 2 of the  License, or (at your
  12  *  option) any later version.
  13  *
  14  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  15  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  16  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  17  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  18  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  19  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  20  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  21  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  22  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  23  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24  *
  25  *  You should have received a copy of the  GNU General Public License along
  26  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  27  *  675 Mass Ave, Cambridge, MA 02139, USA.
  28  */
  29 #include <linux/config.h>
  30 #include <linux/types.h>
  31 #include <linux/pci.h>
  32 #include <linux/kernel.h>
  33 #include <linux/init.h>
  34
  35 #include <asm/mach-au1x00/au1000.h>
  36
  37 /*
  38  * Shortcut
  39  */
  40 #ifdef CONFIG_SOC_AU1500
  41 #define INTA AU1000_PCI_INTA
  42 #define INTB AU1000_PCI_INTB
  43 #define INTC AU1000_PCI_INTC
  44 #define INTD AU1000_PCI_INTD
  45 #endif
  46
  47 #ifdef CONFIG_SOC_AU1550
  48 #define INTA AU1550_PCI_INTA
  49 #define INTB AU1550_PCI_INTB
  50 #define INTC AU1550_PCI_INTC
  51 #define INTD AU1550_PCI_INTD
  52 #endif
  53
  54 #define INTX    0xFF /* not valid */
  55
  56 #ifdef CONFIG_MIPS_DB1500
  57 static char irq_tab_alchemy[][5] __initdata = {
  58  [12] = { -1, INTA, INTX, INTX, INTX},   /* IDSEL 12 - HPT371   */
  59  [13] = { -1, INTA, INTB, INTC, INTD},   /* IDSEL 13 - PCI slot */
  60 };
  61 #endif
  62
  63 #ifdef CONFIG_MIPS_BOSPORUS
  64 static char irq_tab_alchemy[][5] __initdata = {
  65  [11] = { -1, INTA, INTB, INTX, INTX},   /* IDSEL 11 - miniPCI  */
  66  [12] = { -1, INTA, INTX, INTX, INTX},   /* IDSEL 12 - SN1741   */
  67  [13] = { -1, INTA, INTB, INTC, INTD},   /* IDSEL 13 - PCI slot */
  68 };
  69 #endif
  70
  71 #ifdef CONFIG_MIPS_MIRAGE
  72 static char irq_tab_alchemy[][5] __initdata = {
  73  [11] = { -1, INTD, INTX, INTX, INTX},   /* IDSEL 11 - SMI VGX */
  74  [12] = { -1, INTX, INTX, INTC, INTX},   /* IDSEL 12 - PNX1300 */
  75  [13] = { -1, INTA, INTB, INTX, INTX},   /* IDSEL 13 - miniPCI */
  76 };
  77 #endif
  78
  79 #ifdef CONFIG_MIPS_DB1550
  80 static char irq_tab_alchemy[][5] __initdata = {
  81  [11] = { -1, INTC, INTX, INTX, INTX},   /* IDSEL 11 - on-board HPT371    */
  82  [12] = { -1, INTB, INTC, INTD, INTA},   /* IDSEL 12 - PCI slot 2 (left)  */
  83  [13] = { -1, INTA, INTB, INTC, INTD},   /* IDSEL 13 - PCI slot 1 (right) */
  84 };
  85 #endif
  86
  87 #ifdef CONFIG_MIPS_PB1500
  88 static char irq_tab_alchemy[][5] __initdata = {
  89  [12] = { -1, INTA, INTX, INTX, INTX},   /* IDSEL 12 - HPT370   */
  90  [13] = { -1, INTA, INTB, INTC, INTD},   /* IDSEL 13 - PCI slot */
  91 };
  92 #endif
  93
  94 #ifdef CONFIG_MIPS_PB1550
  95 static char irq_tab_alchemy[][5] __initdata = {
  96  [12] = { -1, INTB, INTC, INTD, INTA},   /* IDSEL 12 - PCI slot 2 (left)  */
  97  [13] = { -1, INTA, INTB, INTC, INTD},   /* IDSEL 13 - PCI slot 1 (right) */
  98 };
  99 #endif
 100
 101 #ifdef CONFIG_MIPS_MTX1
 102 static char irq_tab_alchemy[][5] __initdata = {
 103  [0] = { -1, INTA, INTB, INTX, INTX},   /* IDSEL 00 - AdapterA-Slot0 (top)    */
 104  [1] = { -1, INTB, INTA, INTX, INTX},   /* IDSEL 01 - AdapterA-Slot1 (bottom) */
 105  [2] = { -1, INTC, INTD, INTX, INTX},   /* IDSEL 02 - AdapterB-Slot0 (top)    */
 106  [3] = { -1, INTD, INTC, INTX, INTX},   /* IDSEL 03 - AdapterB-Slot1 (bottom) */
 107  [4] = { -1, INTA, INTB, INTX, INTX},   /* IDSEL 04 - AdapterC-Slot0 (top)    */
 108  [5] = { -1, INTB, INTA, INTX, INTX},   /* IDSEL 05 - AdapterC-Slot1 (bottom) */
 109  [6] = { -1, INTC, INTD, INTX, INTX},   /* IDSEL 06 - AdapterD-Slot0 (top)    */
 110  [7] = { -1, INTD, INTC, INTX, INTX},   /* IDSEL 07 - AdapterD-Slot1 (bottom) */
 111 };
 112 #endif
 113
 114 int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 115 {
 116         return irq_tab_alchemy[slot][pin];
 117 }
 118
 119 /* Do platform specific device initialization at pci_enable_device() time */
 120 int pcibios_plat_dev_init(struct pci_dev *dev)
 121 {
 122         return 0;
 123 }