arch/ppc/platforms/83xx/mpc834x_sys.c

   1 /*
   2  * arch/ppc/platforms/83xx/mpc834x_sys.c
   3  *
   4  * MPC834x SYS board specific routines
   5  *
   6  * Maintainer: Kumar Gala <kumar.gala@freescale.com>
   7  *
   8  * Copyright 2005 Freescale Semiconductor Inc.
   9  *
  10  * This program is free software; you can redistribute  it and/or modify it
  11  * under  the terms of  the GNU General  Public License as published by the
  12  * Free Software Foundation;  either version 2 of the  License, or (at your
  13  * option) any later version.
  14  */
  15
  16 #include <linux/config.h>
  17 #include <linux/stddef.h>
  18 #include <linux/kernel.h>
  19 #include <linux/init.h>
  20 #include <linux/errno.h>
  21 #include <linux/reboot.h>
  22 #include <linux/pci.h>
  23 #include <linux/kdev_t.h>
  24 #include <linux/major.h>
  25 #include <linux/console.h>
  26 #include <linux/delay.h>
  27 #include <linux/irq.h>
  28 #include <linux/seq_file.h>
  29 #include <linux/root_dev.h>
  30 #include <linux/serial.h>
  31 #include <linux/tty.h>  /* for linux/serial_core.h */
  32 #include <linux/serial_core.h>
  33 #include <linux/initrd.h>
  34 #include <linux/module.h>
  35 #include <linux/fsl_devices.h>
  36
  37 #include <asm/system.h>
  38 #include <asm/pgtable.h>
  39 #include <asm/page.h>
  40 #include <asm/atomic.h>
  41 #include <asm/time.h>
  42 #include <asm/io.h>
  43 #include <asm/machdep.h>
  44 #include <asm/ipic.h>
  45 #include <asm/bootinfo.h>
  46 #include <asm/pci-bridge.h>
  47 #include <asm/mpc83xx.h>
  48 #include <asm/irq.h>
  49 #include <asm/kgdb.h>
  50 #include <asm/ppc_sys.h>
  51 #include <mm/mmu_decl.h>
  52
  53 #include <syslib/ppc83xx_setup.h>
  54
  55 #ifndef CONFIG_PCI
  56 unsigned long isa_io_base = 0;
  57 unsigned long isa_mem_base = 0;
  58 #endif
  59
  60 extern unsigned long total_memory;      /* in mm/init */
  61
  62 unsigned char __res[sizeof (bd_t)];
  63
  64 #ifdef CONFIG_PCI
  65 #error "PCI is not supported"
  66 /* NEED mpc83xx_map_irq & mpc83xx_exclude_device
  67    see platforms/85xx/mpc85xx_ads_common.c */
  68 #endif /* CONFIG_PCI */
  69
  70 /* ************************************************************************
  71  *
  72  * Setup the architecture
  73  *
  74  */
  75 static void __init
  76 mpc834x_sys_setup_arch(void)
  77 {
  78         bd_t *binfo = (bd_t *) __res;
  79         unsigned int freq;
  80         struct gianfar_platform_data *pdata;
  81
  82         /* get the core frequency */
  83         freq = binfo->bi_intfreq;
  84
  85         /* Set loops_per_jiffy to a half-way reasonable value,
  86            for use until calibrate_delay gets called. */
  87         loops_per_jiffy = freq / HZ;
  88
  89 #ifdef CONFIG_PCI
  90         /* setup PCI host bridges */
  91         mpc83xx_sys_setup_hose();
  92 #endif
  93         mpc83xx_early_serial_map();
  94
  95         /* setup the board related information for the enet controllers */
  96         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC1);
  97         pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
  98         pdata->interruptPHY = MPC83xx_IRQ_EXT1;
  99         pdata->phyid = 0;
 100         /* fixup phy address */
 101         pdata->phy_reg_addr += binfo->bi_immr_base;
 102         memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
 103
 104         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC2);
 105         pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
 106         pdata->interruptPHY = MPC83xx_IRQ_EXT2;
 107         pdata->phyid = 1;
 108         /* fixup phy address */
 109         pdata->phy_reg_addr += binfo->bi_immr_base;
 110         memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
 111
 112 #ifdef CONFIG_BLK_DEV_INITRD
 113         if (initrd_start)
 114                 ROOT_DEV = Root_RAM0;
 115         else
 116 #endif
 117 #ifdef  CONFIG_ROOT_NFS
 118                 ROOT_DEV = Root_NFS;
 119 #else
 120                 ROOT_DEV = Root_HDA1;
 121 #endif
 122 }
 123
 124 static void __init
 125 mpc834x_sys_map_io(void)
 126 {
 127         /* we steal the lowest ioremap addr for virt space */
 128         io_block_mapping(VIRT_IMMRBAR, immrbar, 1024*1024, _PAGE_IO);
 129 }
 130
 131 int
 132 mpc834x_sys_show_cpuinfo(struct seq_file *m)
 133 {
 134         uint pvid, svid, phid1;
 135         bd_t *binfo = (bd_t *) __res;
 136         unsigned int freq;
 137
 138         /* get the core frequency */
 139         freq = binfo->bi_intfreq;
 140
 141         pvid = mfspr(SPRN_PVR);
 142         svid = mfspr(SPRN_SVR);
 143
 144         seq_printf(m, "Vendor\t\t: Freescale Inc.\n");
 145         seq_printf(m, "Machine\t\t: mpc%s sys\n", cur_ppc_sys_spec->ppc_sys_name);
 146         seq_printf(m, "core clock\t: %d MHz\n"
 147                         "bus  clock\t: %d MHz\n",
 148                         (int)(binfo->bi_intfreq / 1000000),
 149                         (int)(binfo->bi_busfreq / 1000000));
 150         seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
 151         seq_printf(m, "SVR\t\t: 0x%x\n", svid);
 152
 153         /* Display cpu Pll setting */
 154         phid1 = mfspr(SPRN_HID1);
 155         seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
 156
 157         /* Display the amount of memory */
 158         seq_printf(m, "Memory\t\t: %d MB\n", (int)(binfo->bi_memsize / (1024 * 1024)));
 159
 160         return 0;
 161 }
 162
 163
 164 void __init
 165 mpc834x_sys_init_IRQ(void)
 166 {
 167         bd_t *binfo = (bd_t *) __res;
 168
 169         u8 senses[8] = {
 170                 0,                      /* EXT 0 */
 171                 IRQ_SENSE_LEVEL,        /* EXT 1 */
 172                 IRQ_SENSE_LEVEL,        /* EXT 2 */
 173                 0,                      /* EXT 3 */
 174                 0,                      /* EXT 4 */
 175                 0,                      /* EXT 5 */
 176                 0,                      /* EXT 6 */
 177                 0,                      /* EXT 7 */
 178         };
 179
 180         ipic_init(binfo->bi_immr_base + 0x00700, 0, MPC83xx_IPIC_IRQ_OFFSET, senses, 8);
 181
 182         /* Initialize the default interrupt mapping priorities,
 183          * in case the boot rom changed something on us.
 184          */
 185         ipic_set_default_priority();
 186 }
 187
 188 static __inline__ void
 189 mpc834x_sys_set_bat(void)
 190 {
 191         /* we steal the lowest ioremap addr for virt space */
 192         mb();
 193         mtspr(SPRN_DBAT1U, VIRT_IMMRBAR | 0x1e);
 194         mtspr(SPRN_DBAT1L, immrbar | 0x2a);
 195         mb();
 196 }
 197
 198 void __init
 199 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 200               unsigned long r6, unsigned long r7)
 201 {
 202         bd_t *binfo = (bd_t *) __res;
 203
 204         /* parse_bootinfo must always be called first */
 205         parse_bootinfo(find_bootinfo());
 206
 207         /*
 208          * If we were passed in a board information, copy it into the
 209          * residual data area.
 210          */
 211         if (r3) {
 212                 memcpy((void *) __res, (void *) (r3 + KERNELBASE),
 213                        sizeof (bd_t));
 214         }
 215
 216 #if defined(CONFIG_BLK_DEV_INITRD)
 217         /*
 218          * If the init RAM disk has been configured in, and there's a valid
 219          * starting address for it, set it up.
 220          */
 221         if (r4) {
 222                 initrd_start = r4 + KERNELBASE;
 223                 initrd_end = r5 + KERNELBASE;
 224         }
 225 #endif /* CONFIG_BLK_DEV_INITRD */
 226
 227         /* Copy the kernel command line arguments to a safe place. */
 228         if (r6) {
 229                 *(char *) (r7 + KERNELBASE) = 0;
 230                 strcpy(cmd_line, (char *) (r6 + KERNELBASE));
 231         }
 232
 233         immrbar = binfo->bi_immr_base;
 234
 235         mpc834x_sys_set_bat();
 236
 237 #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
 238         {
 239                 struct uart_port p;
 240
 241                 memset(&p, 0, sizeof (p));
 242                 p.iotype = SERIAL_IO_MEM;
 243                 p.membase = (unsigned char __iomem *)(VIRT_IMMRBAR + 0x4500);
 244                 p.uartclk = binfo->bi_busfreq;
 245
 246                 gen550_init(0, &p);
 247
 248                 memset(&p, 0, sizeof (p));
 249                 p.iotype = SERIAL_IO_MEM;
 250                 p.membase = (unsigned char __iomem *)(VIRT_IMMRBAR + 0x4600);
 251                 p.uartclk = binfo->bi_busfreq;
 252
 253                 gen550_init(1, &p);
 254         }
 255 #endif
 256
 257         identify_ppc_sys_by_id(mfspr(SPRN_SVR));
 258
 259         /* setup the PowerPC module struct */
 260         ppc_md.setup_arch = mpc834x_sys_setup_arch;
 261         ppc_md.show_cpuinfo = mpc834x_sys_show_cpuinfo;
 262
 263         ppc_md.init_IRQ = mpc834x_sys_init_IRQ;
 264         ppc_md.get_irq = ipic_get_irq;
 265
 266         ppc_md.restart = mpc83xx_restart;
 267         ppc_md.power_off = mpc83xx_power_off;
 268         ppc_md.halt = mpc83xx_halt;
 269
 270         ppc_md.find_end_of_memory = mpc83xx_find_end_of_memory;
 271         ppc_md.setup_io_mappings  = mpc834x_sys_map_io;
 272
 273         ppc_md.time_init = mpc83xx_time_init;
 274         ppc_md.set_rtc_time = NULL;
 275         ppc_md.get_rtc_time = NULL;
 276         ppc_md.calibrate_decr = mpc83xx_calibrate_decr;
 277
 278         ppc_md.early_serial_map = mpc83xx_early_serial_map;
 279 #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
 280         ppc_md.progress = gen550_progress;
 281 #endif  /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
 282
 283         if (ppc_md.progress)
 284                 ppc_md.progress("mpc834x_sys_init(): exit", 0);
 285
 286         return;
 287 }