3 * Copyright 2004 BEAM Ltd.
4 * Copyright 2002 Tungsten Graphics, Inc.
5 * Copyright 2005 Thomas Hellstrom.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * BEAM LTD, TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
24 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
26 * DEALINGS IN THE SOFTWARE.
29 * Terry Barnaby <terry1@beam.ltd.uk>
30 * Keith Whitwell <keith@tungstengraphics.com>
31 * Thomas Hellstrom <unichrome@shipmail.org>
33 * This code provides standard DRM access to the Via Unichrome / Pro Vertical blank
34 * interrupt, as well as an infrastructure to handle other interrupts of the chip.
35 * The refresh rate is also calculated for video playback sync purposes.
43 #define VIA_REG_INTERRUPT 0x200
45 /* VIA_REG_INTERRUPT */
46 #define VIA_IRQ_GLOBAL (1 << 31)
47 #define VIA_IRQ_VBLANK_ENABLE (1 << 19)
48 #define VIA_IRQ_VBLANK_PENDING (1 << 3)
49 #define VIA_IRQ_HQV0_ENABLE (1 << 11)
50 #define VIA_IRQ_HQV1_ENABLE (1 << 25)
51 #define VIA_IRQ_HQV0_PENDING (1 << 9)
52 #define VIA_IRQ_HQV1_PENDING (1 << 10)
55 * Device-specific IRQs go here. This type might need to be extended with
56 * the register if there are multiple IRQ control registers.
57 * Currently we activate the HQV interrupts of Unichrome Pro group A.
60 static maskarray_t via_pro_group_a_irqs
[] = {
61 {VIA_IRQ_HQV0_ENABLE
, VIA_IRQ_HQV0_PENDING
, 0x000003D0, 0x00008010, 0x00000000 },
62 {VIA_IRQ_HQV1_ENABLE
, VIA_IRQ_HQV1_PENDING
, 0x000013D0, 0x00008010, 0x00000000 }};
63 static int via_num_pro_group_a
= sizeof(via_pro_group_a_irqs
)/sizeof(maskarray_t
);
65 static maskarray_t via_unichrome_irqs
[] = {};
66 static int via_num_unichrome
= sizeof(via_unichrome_irqs
)/sizeof(maskarray_t
);
69 static unsigned time_diff(struct timeval
*now
,struct timeval
*then
)
71 return (now
->tv_usec
>= then
->tv_usec
) ?
72 now
->tv_usec
- then
->tv_usec
:
73 1000000 - (then
->tv_usec
- now
->tv_usec
);
76 irqreturn_t
via_driver_irq_handler(DRM_IRQ_ARGS
)
78 drm_device_t
*dev
= (drm_device_t
*) arg
;
79 drm_via_private_t
*dev_priv
= (drm_via_private_t
*) dev
->dev_private
;
82 struct timeval cur_vblank
;
83 drm_via_irq_t
*cur_irq
= dev_priv
->via_irqs
;
86 status
= VIA_READ(VIA_REG_INTERRUPT
);
87 if (status
& VIA_IRQ_VBLANK_PENDING
) {
88 atomic_inc(&dev
->vbl_received
);
89 if (!(atomic_read(&dev
->vbl_received
) & 0x0F)) {
90 do_gettimeofday(&cur_vblank
);
91 if (dev_priv
->last_vblank_valid
) {
92 dev_priv
->usec_per_vblank
=
93 time_diff( &cur_vblank
,&dev_priv
->last_vblank
) >> 4;
95 dev_priv
->last_vblank
= cur_vblank
;
96 dev_priv
->last_vblank_valid
= 1;
98 if (!(atomic_read(&dev
->vbl_received
) & 0xFF)) {
99 DRM_DEBUG("US per vblank is: %u\n",
100 dev_priv
->usec_per_vblank
);
102 DRM_WAKEUP(&dev
->vbl_queue
);
103 drm_vbl_send_signals(dev
);
108 for (i
=0; i
<dev_priv
->num_irqs
; ++i
) {
109 if (status
& cur_irq
->pending_mask
) {
110 atomic_inc( &cur_irq
->irq_received
);
111 DRM_WAKEUP( &cur_irq
->irq_queue
);
117 /* Acknowlege interrupts */
118 VIA_WRITE(VIA_REG_INTERRUPT
, status
);
127 static __inline__
void viadrv_acknowledge_irqs(drm_via_private_t
* dev_priv
)
132 /* Acknowlege interrupts */
133 status
= VIA_READ(VIA_REG_INTERRUPT
);
134 VIA_WRITE(VIA_REG_INTERRUPT
, status
|
135 dev_priv
->irq_pending_mask
);
139 int via_driver_vblank_wait(drm_device_t
* dev
, unsigned int *sequence
)
141 drm_via_private_t
*dev_priv
= (drm_via_private_t
*) dev
->dev_private
;
142 unsigned int cur_vblank
;
145 DRM_DEBUG("viadrv_vblank_wait\n");
147 DRM_ERROR("%s called with no initialization\n", __FUNCTION__
);
151 viadrv_acknowledge_irqs(dev_priv
);
153 /* Assume that the user has missed the current sequence number
154 * by about a day rather than she wants to wait for years
155 * using vertical blanks...
158 DRM_WAIT_ON(ret
, dev
->vbl_queue
, 3 * DRM_HZ
,
159 (((cur_vblank
= atomic_read(&dev
->vbl_received
)) -
160 *sequence
) <= (1 << 23)));
162 *sequence
= cur_vblank
;
167 via_driver_irq_wait(drm_device_t
* dev
, unsigned int irq
, int force_sequence
,
168 unsigned int *sequence
)
170 drm_via_private_t
*dev_priv
= (drm_via_private_t
*) dev
->dev_private
;
171 unsigned int cur_irq_sequence
;
172 drm_via_irq_t
*cur_irq
= dev_priv
->via_irqs
;
174 maskarray_t
*masks
= dev_priv
->irq_masks
;
176 DRM_DEBUG("%s\n", __FUNCTION__
);
179 DRM_ERROR("%s called with no initialization\n", __FUNCTION__
);
180 return DRM_ERR(EINVAL
);
183 if (irq
>= dev_priv
->num_irqs
) {
184 DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__
, irq
);
185 return DRM_ERR(EINVAL
);
190 if (masks
[irq
][2] && !force_sequence
) {
191 DRM_WAIT_ON(ret
, cur_irq
->irq_queue
, 3 * DRM_HZ
,
192 ((VIA_READ(masks
[irq
][2]) & masks
[irq
][3]) == masks
[irq
][4]));
193 cur_irq_sequence
= atomic_read(&cur_irq
->irq_received
);
195 DRM_WAIT_ON(ret
, cur_irq
->irq_queue
, 3 * DRM_HZ
,
196 (((cur_irq_sequence
= atomic_read(&cur_irq
->irq_received
)) -
197 *sequence
) <= (1 << 23)));
199 *sequence
= cur_irq_sequence
;
208 void via_driver_irq_preinstall(drm_device_t
* dev
)
210 drm_via_private_t
*dev_priv
= (drm_via_private_t
*) dev
->dev_private
;
212 drm_via_irq_t
*cur_irq
= dev_priv
->via_irqs
;
215 DRM_DEBUG("driver_irq_preinstall: dev_priv: %p\n", dev_priv
);
218 dev_priv
->irq_enable_mask
= VIA_IRQ_VBLANK_ENABLE
;
219 dev_priv
->irq_pending_mask
= VIA_IRQ_VBLANK_PENDING
;
221 dev_priv
->irq_masks
= (dev_priv
->pro_group_a
) ?
222 via_pro_group_a_irqs
: via_unichrome_irqs
;
223 dev_priv
->num_irqs
= (dev_priv
->pro_group_a
) ?
224 via_num_pro_group_a
: via_num_unichrome
;
226 for(i
=0; i
< dev_priv
->num_irqs
; ++i
) {
227 atomic_set(&cur_irq
->irq_received
, 0);
228 cur_irq
->enable_mask
= dev_priv
->irq_masks
[i
][0];
229 cur_irq
->pending_mask
= dev_priv
->irq_masks
[i
][1];
230 DRM_INIT_WAITQUEUE( &cur_irq
->irq_queue
);
231 dev_priv
->irq_enable_mask
|= cur_irq
->enable_mask
;
232 dev_priv
->irq_pending_mask
|= cur_irq
->pending_mask
;
235 DRM_DEBUG("Initializing IRQ %d\n", i
);
238 dev_priv
->last_vblank_valid
= 0;
240 // Clear VSync interrupt regs
241 status
= VIA_READ(VIA_REG_INTERRUPT
);
242 VIA_WRITE(VIA_REG_INTERRUPT
, status
&
243 ~(dev_priv
->irq_enable_mask
));
245 /* Clear bits if they're already high */
246 viadrv_acknowledge_irqs(dev_priv
);
250 void via_driver_irq_postinstall(drm_device_t
* dev
)
252 drm_via_private_t
*dev_priv
= (drm_via_private_t
*) dev
->dev_private
;
255 DRM_DEBUG("via_driver_irq_postinstall\n");
257 status
= VIA_READ(VIA_REG_INTERRUPT
);
258 VIA_WRITE(VIA_REG_INTERRUPT
, status
| VIA_IRQ_GLOBAL
259 | dev_priv
->irq_enable_mask
);
261 /* Some magic, oh for some data sheets ! */
263 VIA_WRITE8(0x83d4, 0x11);
264 VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30);
269 void via_driver_irq_uninstall(drm_device_t
* dev
)
271 drm_via_private_t
*dev_priv
= (drm_via_private_t
*) dev
->dev_private
;
274 DRM_DEBUG("driver_irq_uninstall)\n");
277 /* Some more magic, oh for some data sheets ! */
279 VIA_WRITE8(0x83d4, 0x11);
280 VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30);
282 status
= VIA_READ(VIA_REG_INTERRUPT
);
283 VIA_WRITE(VIA_REG_INTERRUPT
, status
&
284 ~(VIA_IRQ_VBLANK_ENABLE
| dev_priv
->irq_enable_mask
));
288 int via_wait_irq(DRM_IOCTL_ARGS
)
290 drm_file_t
*priv
= filp
->private_data
;
291 drm_device_t
*dev
= priv
->head
->dev
;
292 drm_via_irqwait_t __user
*argp
= (void __user
*)data
;
293 drm_via_irqwait_t irqwait
;
296 drm_via_private_t
*dev_priv
= (drm_via_private_t
*) dev
->dev_private
;
297 drm_via_irq_t
*cur_irq
= dev_priv
->via_irqs
;
301 return DRM_ERR(EINVAL
);
303 DRM_COPY_FROM_USER_IOCTL(irqwait
, argp
, sizeof(irqwait
));
304 if (irqwait
.request
.irq
>= dev_priv
->num_irqs
) {
305 DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__
,
306 irqwait
.request
.irq
);
307 return DRM_ERR(EINVAL
);
310 cur_irq
+= irqwait
.request
.irq
;
312 switch (irqwait
.request
.type
& ~VIA_IRQ_FLAGS_MASK
) {
313 case VIA_IRQ_RELATIVE
:
314 irqwait
.request
.sequence
+= atomic_read(&cur_irq
->irq_received
);
315 irqwait
.request
.type
&= ~_DRM_VBLANK_RELATIVE
;
316 case VIA_IRQ_ABSOLUTE
:
319 return DRM_ERR(EINVAL
);
322 if (irqwait
.request
.type
& VIA_IRQ_SIGNAL
) {
323 DRM_ERROR("%s Signals on Via IRQs not implemented yet.\n",
325 return DRM_ERR(EINVAL
);
328 force_sequence
= (irqwait
.request
.type
& VIA_IRQ_FORCE_SEQUENCE
);
330 ret
= via_driver_irq_wait(dev
, irqwait
.request
.irq
, force_sequence
,
331 &irqwait
.request
.sequence
);
332 do_gettimeofday(&now
);
333 irqwait
.reply
.tval_sec
= now
.tv_sec
;
334 irqwait
.reply
.tval_usec
= now
.tv_usec
;
336 DRM_COPY_TO_USER_IOCTL(argp
, irqwait
, sizeof(irqwait
));