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[ARM] 2/4: Remove asm/hardware.h from asm-arm/arch-ebsa110/io.h
[linux-2.6/verdex.git] / drivers / char / pcmcia / synclink_cs.c
blob02d7f046c10aeae25e831b2f15f9f85e63a22d99
1 /*
2 * linux/drivers/char/pcmcia/synclink_cs.c
3 *
4 * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
5 *
6 * Device driver for Microgate SyncLink PC Card
7 * multiprotocol serial adapter.
8 *
9 * written by Paul Fulghum for Microgate Corporation
10 * paulkf@microgate.com
11 *
12 * Microgate and SyncLink are trademarks of Microgate Corporation
13 *
14 * This code is released under the GNU General Public License (GPL)
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
26 * OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
30 #if defined(__i386__)
31 # define BREAKPOINT() asm(" int $3");
32 #else
33 # define BREAKPOINT() { }
34 #endif
35
36 #define MAX_DEVICE_COUNT 4
37
38 #include <linux/config.h>
39 #include <linux/module.h>
40 #include <linux/errno.h>
41 #include <linux/signal.h>
42 #include <linux/sched.h>
43 #include <linux/timer.h>
44 #include <linux/time.h>
45 #include <linux/interrupt.h>
46 #include <linux/pci.h>
47 #include <linux/tty.h>
48 #include <linux/tty_flip.h>
49 #include <linux/serial.h>
50 #include <linux/major.h>
51 #include <linux/string.h>
52 #include <linux/fcntl.h>
53 #include <linux/ptrace.h>
54 #include <linux/ioport.h>
55 #include <linux/mm.h>
56 #include <linux/slab.h>
57 #include <linux/netdevice.h>
58 #include <linux/vmalloc.h>
59 #include <linux/init.h>
60 #include <asm/serial.h>
61 #include <linux/delay.h>
62 #include <linux/ioctl.h>
63
64 #include <asm/system.h>
65 #include <asm/io.h>
66 #include <asm/irq.h>
67 #include <asm/dma.h>
68 #include <linux/bitops.h>
69 #include <asm/types.h>
70 #include <linux/termios.h>
71 #include <linux/workqueue.h>
72 #include <linux/hdlc.h>
73
74 #include <pcmcia/cs_types.h>
75 #include <pcmcia/cs.h>
76 #include <pcmcia/cistpl.h>
77 #include <pcmcia/cisreg.h>
78 #include <pcmcia/ds.h>
79
80 #ifdef CONFIG_HDLC_MODULE
81 #define CONFIG_HDLC 1
82 #endif
83
84 #define GET_USER(error,value,addr) error = get_user(value,addr)
85 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
86 #define PUT_USER(error,value,addr) error = put_user(value,addr)
87 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
88
89 #include <asm/uaccess.h>
90
91 #include "linux/synclink.h"
92
93 static MGSL_PARAMS default_params = {
94 MGSL_MODE_HDLC, /* unsigned long mode */
95 0, /* unsigned char loopback; */
96 HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
97 HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
98 0, /* unsigned long clock_speed; */
99 0xff, /* unsigned char addr_filter; */
100 HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
101 HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
102 HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
103 9600, /* unsigned long data_rate; */
104 8, /* unsigned char data_bits; */
105 1, /* unsigned char stop_bits; */
106 ASYNC_PARITY_NONE /* unsigned char parity; */
107 };
108
109 typedef struct
110 {
111 int count;
112 unsigned char status;
113 char data[1];
114 } RXBUF;
115
116 /* The queue of BH actions to be performed */
117
118 #define BH_RECEIVE 1
119 #define BH_TRANSMIT 2
120 #define BH_STATUS 4
121
122 #define IO_PIN_SHUTDOWN_LIMIT 100
123
124 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
125
126 struct _input_signal_events {
127 int ri_up;
128 int ri_down;
129 int dsr_up;
130 int dsr_down;
131 int dcd_up;
132 int dcd_down;
133 int cts_up;
134 int cts_down;
135 };
136
137
138 /*
139 * Device instance data structure
140 */
141
142 typedef struct _mgslpc_info {
143 void *if_ptr; /* General purpose pointer (used by SPPP) */
144 int magic;
145 int flags;
146 int count; /* count of opens */
147 int line;
148 unsigned short close_delay;
149 unsigned short closing_wait; /* time to wait before closing */
150
151 struct mgsl_icount icount;
152
153 struct tty_struct *tty;
154 int timeout;
155 int x_char; /* xon/xoff character */
156 int blocked_open; /* # of blocked opens */
157 unsigned char read_status_mask;
158 unsigned char ignore_status_mask;
159
160 unsigned char *tx_buf;
161 int tx_put;
162 int tx_get;
163 int tx_count;
164
165 /* circular list of fixed length rx buffers */
166
167 unsigned char *rx_buf; /* memory allocated for all rx buffers */
168 int rx_buf_total_size; /* size of memory allocated for rx buffers */
169 int rx_put; /* index of next empty rx buffer */
170 int rx_get; /* index of next full rx buffer */
171 int rx_buf_size; /* size in bytes of single rx buffer */
172 int rx_buf_count; /* total number of rx buffers */
173 int rx_frame_count; /* number of full rx buffers */
174
175 wait_queue_head_t open_wait;
176 wait_queue_head_t close_wait;
177
178 wait_queue_head_t status_event_wait_q;
179 wait_queue_head_t event_wait_q;
180 struct timer_list tx_timer; /* HDLC transmit timeout timer */
181 struct _mgslpc_info *next_device; /* device list link */
182
183 unsigned short imra_value;
184 unsigned short imrb_value;
185 unsigned char pim_value;
186
187 spinlock_t lock;
188 struct work_struct task; /* task structure for scheduling bh */
189
190 u32 max_frame_size;
191
192 u32 pending_bh;
193
194 int bh_running;
195 int bh_requested;
196
197 int dcd_chkcount; /* check counts to prevent */
198 int cts_chkcount; /* too many IRQs if a signal */
199 int dsr_chkcount; /* is floating */
200 int ri_chkcount;
201
202 int rx_enabled;
203 int rx_overflow;
204
205 int tx_enabled;
206 int tx_active;
207 int tx_aborting;
208 u32 idle_mode;
209
210 int if_mode; /* serial interface selection (RS-232, v.35 etc) */
211
212 char device_name[25]; /* device instance name */
213
214 unsigned int io_base; /* base I/O address of adapter */
215 unsigned int irq_level;
216
217 MGSL_PARAMS params; /* communications parameters */
218
219 unsigned char serial_signals; /* current serial signal states */
220
221 char irq_occurred; /* for diagnostics use */
222 char testing_irq;
223 unsigned int init_error; /* startup error (DIAGS) */
224
225 char flag_buf[MAX_ASYNC_BUFFER_SIZE];
226 BOOLEAN drop_rts_on_tx_done;
227
228 struct _input_signal_events input_signal_events;
229
230 /* PCMCIA support */
231 dev_link_t link;
232 dev_node_t node;
233 int stop;
234
235 /* SPPP/Cisco HDLC device parts */
236 int netcount;
237 int dosyncppp;
238 spinlock_t netlock;
239
240 #ifdef CONFIG_HDLC
241 struct net_device *netdev;
242 #endif
243
244 } MGSLPC_INFO;
245
246 #define MGSLPC_MAGIC 0x5402
247
248 /*
249 * The size of the serial xmit buffer is 1 page, or 4096 bytes
250 */
251 #define TXBUFSIZE 4096
252
253
254 #define CHA 0x00 /* channel A offset */
255 #define CHB 0x40 /* channel B offset */
256
257 /*
258 * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
259 */
260 #undef PVR
261
262 #define RXFIFO 0
263 #define TXFIFO 0
264 #define STAR 0x20
265 #define CMDR 0x20
266 #define RSTA 0x21
267 #define PRE 0x21
268 #define MODE 0x22
269 #define TIMR 0x23
270 #define XAD1 0x24
271 #define XAD2 0x25
272 #define RAH1 0x26
273 #define RAH2 0x27
274 #define DAFO 0x27
275 #define RAL1 0x28
276 #define RFC 0x28
277 #define RHCR 0x29
278 #define RAL2 0x29
279 #define RBCL 0x2a
280 #define XBCL 0x2a
281 #define RBCH 0x2b
282 #define XBCH 0x2b
283 #define CCR0 0x2c
284 #define CCR1 0x2d
285 #define CCR2 0x2e
286 #define CCR3 0x2f
287 #define VSTR 0x34
288 #define BGR 0x34
289 #define RLCR 0x35
290 #define AML 0x36
291 #define AMH 0x37
292 #define GIS 0x38
293 #define IVA 0x38
294 #define IPC 0x39
295 #define ISR 0x3a
296 #define IMR 0x3a
297 #define PVR 0x3c
298 #define PIS 0x3d
299 #define PIM 0x3d
300 #define PCR 0x3e
301 #define CCR4 0x3f
302
303 // IMR/ISR
304
305 #define IRQ_BREAK_ON BIT15 // rx break detected
306 #define IRQ_DATAOVERRUN BIT14 // receive data overflow
307 #define IRQ_ALLSENT BIT13 // all sent
308 #define IRQ_UNDERRUN BIT12 // transmit data underrun
309 #define IRQ_TIMER BIT11 // timer interrupt
310 #define IRQ_CTS BIT10 // CTS status change
311 #define IRQ_TXREPEAT BIT9 // tx message repeat
312 #define IRQ_TXFIFO BIT8 // transmit pool ready
313 #define IRQ_RXEOM BIT7 // receive message end
314 #define IRQ_EXITHUNT BIT6 // receive frame start
315 #define IRQ_RXTIME BIT6 // rx char timeout
316 #define IRQ_DCD BIT2 // carrier detect status change
317 #define IRQ_OVERRUN BIT1 // receive frame overflow
318 #define IRQ_RXFIFO BIT0 // receive pool full
319
320 // STAR
321
322 #define XFW BIT6 // transmit FIFO write enable
323 #define CEC BIT2 // command executing
324 #define CTS BIT1 // CTS state
325
326 #define PVR_DTR BIT0
327 #define PVR_DSR BIT1
328 #define PVR_RI BIT2
329 #define PVR_AUTOCTS BIT3
330 #define PVR_RS232 0x20 /* 0010b */
331 #define PVR_V35 0xe0 /* 1110b */
332 #define PVR_RS422 0x40 /* 0100b */
333
334 /* Register access functions */
335
336 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
337 #define read_reg(info, reg) inb((info)->io_base + (reg))
338
339 #define read_reg16(info, reg) inw((info)->io_base + (reg))
340 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
341
342 #define set_reg_bits(info, reg, mask) \
343 write_reg(info, (reg), \
344 (unsigned char) (read_reg(info, (reg)) | (mask)))
345 #define clear_reg_bits(info, reg, mask) \
346 write_reg(info, (reg), \
347 (unsigned char) (read_reg(info, (reg)) & ~(mask)))
348 /*
349 * interrupt enable/disable routines
350 */
351 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
352 {
353 if (channel == CHA) {
354 info->imra_value |= mask;
355 write_reg16(info, CHA + IMR, info->imra_value);
356 } else {
357 info->imrb_value |= mask;
358 write_reg16(info, CHB + IMR, info->imrb_value);
359 }
360 }
361 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
362 {
363 if (channel == CHA) {
364 info->imra_value &= ~mask;
365 write_reg16(info, CHA + IMR, info->imra_value);
366 } else {
367 info->imrb_value &= ~mask;
368 write_reg16(info, CHB + IMR, info->imrb_value);
369 }
370 }
371
372 #define port_irq_disable(info, mask) \
373 { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
374
375 #define port_irq_enable(info, mask) \
376 { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
377
378 static void rx_start(MGSLPC_INFO *info);
379 static void rx_stop(MGSLPC_INFO *info);
380
381 static void tx_start(MGSLPC_INFO *info);
382 static void tx_stop(MGSLPC_INFO *info);
383 static void tx_set_idle(MGSLPC_INFO *info);
384
385 static void get_signals(MGSLPC_INFO *info);
386 static void set_signals(MGSLPC_INFO *info);
387
388 static void reset_device(MGSLPC_INFO *info);
389
390 static void hdlc_mode(MGSLPC_INFO *info);
391 static void async_mode(MGSLPC_INFO *info);
392
393 static void tx_timeout(unsigned long context);
394
395 static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
396
397 #ifdef CONFIG_HDLC
398 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
399 static void hdlcdev_tx_done(MGSLPC_INFO *info);
400 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
401 static int hdlcdev_init(MGSLPC_INFO *info);
402 static void hdlcdev_exit(MGSLPC_INFO *info);
403 #endif
404
405 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
406
407 static BOOLEAN register_test(MGSLPC_INFO *info);
408 static BOOLEAN irq_test(MGSLPC_INFO *info);
409 static int adapter_test(MGSLPC_INFO *info);
410
411 static int claim_resources(MGSLPC_INFO *info);
412 static void release_resources(MGSLPC_INFO *info);
413 static void mgslpc_add_device(MGSLPC_INFO *info);
414 static void mgslpc_remove_device(MGSLPC_INFO *info);
415
416 static int rx_get_frame(MGSLPC_INFO *info);
417 static void rx_reset_buffers(MGSLPC_INFO *info);
418 static int rx_alloc_buffers(MGSLPC_INFO *info);
419 static void rx_free_buffers(MGSLPC_INFO *info);
420
421 static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs);
422
423 /*
424 * Bottom half interrupt handlers
425 */
426 static void bh_handler(void* Context);
427 static void bh_transmit(MGSLPC_INFO *info);
428 static void bh_status(MGSLPC_INFO *info);
429
430 /*
431 * ioctl handlers
432 */
433 static int tiocmget(struct tty_struct *tty, struct file *file);
434 static int tiocmset(struct tty_struct *tty, struct file *file,
435 unsigned int set, unsigned int clear);
436 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
437 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
438 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
439 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
440 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
441 static int set_txenable(MGSLPC_INFO *info, int enable);
442 static int tx_abort(MGSLPC_INFO *info);
443 static int set_rxenable(MGSLPC_INFO *info, int enable);
444 static int wait_events(MGSLPC_INFO *info, int __user *mask);
445
446 static MGSLPC_INFO *mgslpc_device_list = NULL;
447 static int mgslpc_device_count = 0;
448
449 /*
450 * Set this param to non-zero to load eax with the
451 * .text section address and breakpoint on module load.
452 * This is useful for use with gdb and add-symbol-file command.
453 */
454 static int break_on_load=0;
455
456 /*
457 * Driver major number, defaults to zero to get auto
458 * assigned major number. May be forced as module parameter.
459 */
460 static int ttymajor=0;
461
462 static int debug_level = 0;
463 static int maxframe[MAX_DEVICE_COUNT] = {0,};
464 static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
465
466 module_param(break_on_load, bool, 0);
467 module_param(ttymajor, int, 0);
468 module_param(debug_level, int, 0);
469 module_param_array(maxframe, int, NULL, 0);
470 module_param_array(dosyncppp, int, NULL, 0);
471
472 MODULE_LICENSE("GPL");
473
474 static char *driver_name = "SyncLink PC Card driver";
475 static char *driver_version = "$Revision: 4.34 $";
476
477 static struct tty_driver *serial_driver;
478
479 /* number of characters left in xmit buffer before we ask for more */
480 #define WAKEUP_CHARS 256
481
482 static void mgslpc_change_params(MGSLPC_INFO *info);
483 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
484
485 /* PCMCIA prototypes */
486
487 static void mgslpc_config(dev_link_t *link);
488 static void mgslpc_release(u_long arg);
489 static int mgslpc_event(event_t event, int priority,
490 event_callback_args_t *args);
491 static dev_link_t *mgslpc_attach(void);
492 static void mgslpc_detach(dev_link_t *);
493
494 static dev_info_t dev_info = "synclink_cs";
495 static dev_link_t *dev_list = NULL;
496
497 /*
498 * 1st function defined in .text section. Calling this function in
499 * init_module() followed by a breakpoint allows a remote debugger
500 * (gdb) to get the .text address for the add-symbol-file command.
501 * This allows remote debugging of dynamically loadable modules.
502 */
503 static void* mgslpc_get_text_ptr(void)
504 {
505 return mgslpc_get_text_ptr;
506 }
507
508 /**
509 * line discipline callback wrappers
510 *
511 * The wrappers maintain line discipline references
512 * while calling into the line discipline.
513 *
514 * ldisc_flush_buffer - flush line discipline receive buffers
515 * ldisc_receive_buf - pass receive data to line discipline
516 */
517
518 static void ldisc_flush_buffer(struct tty_struct *tty)
519 {
520 struct tty_ldisc *ld = tty_ldisc_ref(tty);
521 if (ld) {
522 if (ld->flush_buffer)
523 ld->flush_buffer(tty);
524 tty_ldisc_deref(ld);
525 }
526 }
527
528 static void ldisc_receive_buf(struct tty_struct *tty,
529 const __u8 *data, char *flags, int count)
530 {
531 struct tty_ldisc *ld;
532 if (!tty)
533 return;
534 ld = tty_ldisc_ref(tty);
535 if (ld) {
536 if (ld->receive_buf)
537 ld->receive_buf(tty, data, flags, count);
538 tty_ldisc_deref(ld);
539 }
540 }
541
542 static dev_link_t *mgslpc_attach(void)
543 {
544 MGSLPC_INFO *info;
545 dev_link_t *link;
546 client_reg_t client_reg;
547 int ret;
548
549 if (debug_level >= DEBUG_LEVEL_INFO)
550 printk("mgslpc_attach\n");
551
552 info = (MGSLPC_INFO *)kmalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
553 if (!info) {
554 printk("Error can't allocate device instance data\n");
555 return NULL;
556 }
557
558 memset(info, 0, sizeof(MGSLPC_INFO));
559 info->magic = MGSLPC_MAGIC;
560 INIT_WORK(&info->task, bh_handler, info);
561 info->max_frame_size = 4096;
562 info->close_delay = 5*HZ/10;
563 info->closing_wait = 30*HZ;
564 init_waitqueue_head(&info->open_wait);
565 init_waitqueue_head(&info->close_wait);
566 init_waitqueue_head(&info->status_event_wait_q);
567 init_waitqueue_head(&info->event_wait_q);
568 spin_lock_init(&info->lock);
569 spin_lock_init(&info->netlock);
570 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
571 info->idle_mode = HDLC_TXIDLE_FLAGS;
572 info->imra_value = 0xffff;
573 info->imrb_value = 0xffff;
574 info->pim_value = 0xff;
575
576 link = &info->link;
577 link->priv = info;
578
579 /* Initialize the dev_link_t structure */
580
581 /* Interrupt setup */
582 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
583 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
584 link->irq.Handler = NULL;
585
586 link->conf.Attributes = 0;
587 link->conf.Vcc = 50;
588 link->conf.IntType = INT_MEMORY_AND_IO;
589
590 /* Register with Card Services */
591 link->next = dev_list;
592 dev_list = link;
593
594 client_reg.dev_info = &dev_info;
595 client_reg.Version = 0x0210;
596 client_reg.event_callback_args.client_data = link;
597
598 ret = pcmcia_register_client(&link->handle, &client_reg);
599 if (ret != CS_SUCCESS) {
600 cs_error(link->handle, RegisterClient, ret);
601 mgslpc_detach(link);
602 return NULL;
603 }
604
605 mgslpc_add_device(info);
606
607 return link;
608 }
609
610 /* Card has been inserted.
611 */
612
613 #define CS_CHECK(fn, ret) \
614 do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
615
616 static void mgslpc_config(dev_link_t *link)
617 {
618 client_handle_t handle = link->handle;
619 MGSLPC_INFO *info = link->priv;
620 tuple_t tuple;
621 cisparse_t parse;
622 int last_fn, last_ret;
623 u_char buf[64];
624 config_info_t conf;
625 cistpl_cftable_entry_t dflt = { 0 };
626 cistpl_cftable_entry_t *cfg;
627
628 if (debug_level >= DEBUG_LEVEL_INFO)
629 printk("mgslpc_config(0x%p)\n", link);
630
631 /* read CONFIG tuple to find its configuration registers */
632 tuple.DesiredTuple = CISTPL_CONFIG;
633 tuple.Attributes = 0;
634 tuple.TupleData = buf;
635 tuple.TupleDataMax = sizeof(buf);
636 tuple.TupleOffset = 0;
637 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
638 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
639 CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &parse));
640 link->conf.ConfigBase = parse.config.base;
641 link->conf.Present = parse.config.rmask[0];
642
643 /* Configure card */
644 link->state |= DEV_CONFIG;
645
646 /* Look up the current Vcc */
647 CS_CHECK(GetConfigurationInfo, pcmcia_get_configuration_info(handle, &conf));
648 link->conf.Vcc = conf.Vcc;
649
650 /* get CIS configuration entry */
651
652 tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
653 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
654
655 cfg = &(parse.cftable_entry);
656 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
657 CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &parse));
658
659 if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
660 if (cfg->index == 0)
661 goto cs_failed;
662
663 link->conf.ConfigIndex = cfg->index;
664 link->conf.Attributes |= CONF_ENABLE_IRQ;
665
666 /* IO window settings */
667 link->io.NumPorts1 = 0;
668 if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
669 cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
670 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
671 if (!(io->flags & CISTPL_IO_8BIT))
672 link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
673 if (!(io->flags & CISTPL_IO_16BIT))
674 link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
675 link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
676 link->io.BasePort1 = io->win[0].base;
677 link->io.NumPorts1 = io->win[0].len;
678 CS_CHECK(RequestIO, pcmcia_request_io(link->handle, &link->io));
679 }
680
681 link->conf.Attributes = CONF_ENABLE_IRQ;
682 link->conf.Vcc = 50;
683 link->conf.IntType = INT_MEMORY_AND_IO;
684 link->conf.ConfigIndex = 8;
685 link->conf.Present = PRESENT_OPTION;
686
687 link->irq.Attributes |= IRQ_HANDLE_PRESENT;
688 link->irq.Handler = mgslpc_isr;
689 link->irq.Instance = info;
690 CS_CHECK(RequestIRQ, pcmcia_request_irq(link->handle, &link->irq));
691
692 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link->handle, &link->conf));
693
694 info->io_base = link->io.BasePort1;
695 info->irq_level = link->irq.AssignedIRQ;
696
697 /* add to linked list of devices */
698 sprintf(info->node.dev_name, "mgslpc0");
699 info->node.major = info->node.minor = 0;
700 link->dev = &info->node;
701
702 printk(KERN_INFO "%s: index 0x%02x:",
703 info->node.dev_name, link->conf.ConfigIndex);
704 if (link->conf.Attributes & CONF_ENABLE_IRQ)
705 printk(", irq %d", link->irq.AssignedIRQ);
706 if (link->io.NumPorts1)
707 printk(", io 0x%04x-0x%04x", link->io.BasePort1,
708 link->io.BasePort1+link->io.NumPorts1-1);
709 printk("\n");
710
711 link->state &= ~DEV_CONFIG_PENDING;
712 return;
713
714 cs_failed:
715 cs_error(link->handle, last_fn, last_ret);
716 mgslpc_release((u_long)link);
717 }
718
719 /* Card has been removed.
720 * Unregister device and release PCMCIA configuration.
721 * If device is open, postpone until it is closed.
722 */
723 static void mgslpc_release(u_long arg)
724 {
725 dev_link_t *link = (dev_link_t *)arg;
726
727 if (debug_level >= DEBUG_LEVEL_INFO)
728 printk("mgslpc_release(0x%p)\n", link);
729
730 /* Unlink the device chain */
731 link->dev = NULL;
732 link->state &= ~DEV_CONFIG;
733
734 pcmcia_release_configuration(link->handle);
735 if (link->io.NumPorts1)
736 pcmcia_release_io(link->handle, &link->io);
737 if (link->irq.AssignedIRQ)
738 pcmcia_release_irq(link->handle, &link->irq);
739 if (link->state & DEV_STALE_LINK)
740 mgslpc_detach(link);
741 }
742
743 static void mgslpc_detach(dev_link_t *link)
744 {
745 dev_link_t **linkp;
746
747 if (debug_level >= DEBUG_LEVEL_INFO)
748 printk("mgslpc_detach(0x%p)\n", link);
749
750 /* find device */
751 for (linkp = &dev_list; *linkp; linkp = &(*linkp)->next)
752 if (*linkp == link) break;
753 if (*linkp == NULL)
754 return;
755
756 if (link->state & DEV_CONFIG) {
757 /* device is configured/active, mark it so when
758 * release() is called a proper detach() occurs.
759 */
760 if (debug_level >= DEBUG_LEVEL_INFO)
761 printk(KERN_DEBUG "synclinkpc: detach postponed, '%s' "
762 "still locked\n", link->dev->dev_name);
763 link->state |= DEV_STALE_LINK;
764 return;
765 }
766
767 /* Break the link with Card Services */
768 if (link->handle)
769 pcmcia_deregister_client(link->handle);
770
771 /* Unlink device structure, and free it */
772 *linkp = link->next;
773 mgslpc_remove_device((MGSLPC_INFO *)link->priv);
774 }
775
776 static int mgslpc_event(event_t event, int priority,
777 event_callback_args_t *args)
778 {
779 dev_link_t *link = args->client_data;
780 MGSLPC_INFO *info = link->priv;
781
782 if (debug_level >= DEBUG_LEVEL_INFO)
783 printk("mgslpc_event(0x%06x)\n", event);
784
785 switch (event) {
786 case CS_EVENT_CARD_REMOVAL:
787 link->state &= ~DEV_PRESENT;
788 if (link->state & DEV_CONFIG) {
789 ((MGSLPC_INFO *)link->priv)->stop = 1;
790 mgslpc_release((u_long)link);
791 }
792 break;
793 case CS_EVENT_CARD_INSERTION:
794 link->state |= DEV_PRESENT | DEV_CONFIG_PENDING;
795 mgslpc_config(link);
796 break;
797 case CS_EVENT_PM_SUSPEND:
798 link->state |= DEV_SUSPEND;
799 /* Fall through... */
800 case CS_EVENT_RESET_PHYSICAL:
801 /* Mark the device as stopped, to block IO until later */
802 info->stop = 1;
803 if (link->state & DEV_CONFIG)
804 pcmcia_release_configuration(link->handle);
805 break;
806 case CS_EVENT_PM_RESUME:
807 link->state &= ~DEV_SUSPEND;
808 /* Fall through... */
809 case CS_EVENT_CARD_RESET:
810 if (link->state & DEV_CONFIG)
811 pcmcia_request_configuration(link->handle, &link->conf);
812 info->stop = 0;
813 break;
814 }
815 return 0;
816 }
817
818 static inline int mgslpc_paranoia_check(MGSLPC_INFO *info,
819 char *name, const char *routine)
820 {
821 #ifdef MGSLPC_PARANOIA_CHECK
822 static const char *badmagic =
823 "Warning: bad magic number for mgsl struct (%s) in %s\n";
824 static const char *badinfo =
825 "Warning: null mgslpc_info for (%s) in %s\n";
826
827 if (!info) {
828 printk(badinfo, name, routine);
829 return 1;
830 }
831 if (info->magic != MGSLPC_MAGIC) {
832 printk(badmagic, name, routine);
833 return 1;
834 }
835 #else
836 if (!info)
837 return 1;
838 #endif
839 return 0;
840 }
841
842
843 #define CMD_RXFIFO BIT7 // release current rx FIFO
844 #define CMD_RXRESET BIT6 // receiver reset
845 #define CMD_RXFIFO_READ BIT5
846 #define CMD_START_TIMER BIT4
847 #define CMD_TXFIFO BIT3 // release current tx FIFO
848 #define CMD_TXEOM BIT1 // transmit end message
849 #define CMD_TXRESET BIT0 // transmit reset
850
851 static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
852 {
853 int i = 0;
854 /* wait for command completion */
855 while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
856 udelay(1);
857 if (i++ == 1000)
858 return FALSE;
859 }
860 return TRUE;
861 }
862
863 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
864 {
865 wait_command_complete(info, channel);
866 write_reg(info, (unsigned char) (channel + CMDR), cmd);
867 }
868
869 static void tx_pause(struct tty_struct *tty)
870 {
871 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
872 unsigned long flags;
873
874 if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
875 return;
876 if (debug_level >= DEBUG_LEVEL_INFO)
877 printk("tx_pause(%s)\n",info->device_name);
878
879 spin_lock_irqsave(&info->lock,flags);
880 if (info->tx_enabled)
881 tx_stop(info);
882 spin_unlock_irqrestore(&info->lock,flags);
883 }
884
885 static void tx_release(struct tty_struct *tty)
886 {
887 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
888 unsigned long flags;
889
890 if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
891 return;
892 if (debug_level >= DEBUG_LEVEL_INFO)
893 printk("tx_release(%s)\n",info->device_name);
894
895 spin_lock_irqsave(&info->lock,flags);
896 if (!info->tx_enabled)
897 tx_start(info);
898 spin_unlock_irqrestore(&info->lock,flags);
899 }
900
901 /* Return next bottom half action to perform.
902 * or 0 if nothing to do.
903 */
904 static int bh_action(MGSLPC_INFO *info)
905 {
906 unsigned long flags;
907 int rc = 0;
908
909 spin_lock_irqsave(&info->lock,flags);
910
911 if (info->pending_bh & BH_RECEIVE) {
912 info->pending_bh &= ~BH_RECEIVE;
913 rc = BH_RECEIVE;
914 } else if (info->pending_bh & BH_TRANSMIT) {
915 info->pending_bh &= ~BH_TRANSMIT;
916 rc = BH_TRANSMIT;
917 } else if (info->pending_bh & BH_STATUS) {
918 info->pending_bh &= ~BH_STATUS;
919 rc = BH_STATUS;
920 }
921
922 if (!rc) {
923 /* Mark BH routine as complete */
924 info->bh_running = 0;
925 info->bh_requested = 0;
926 }
927
928 spin_unlock_irqrestore(&info->lock,flags);
929
930 return rc;
931 }
932
933 void bh_handler(void* Context)
934 {
935 MGSLPC_INFO *info = (MGSLPC_INFO*)Context;
936 int action;
937
938 if (!info)
939 return;
940
941 if (debug_level >= DEBUG_LEVEL_BH)
942 printk( "%s(%d):bh_handler(%s) entry\n",
943 __FILE__,__LINE__,info->device_name);
944
945 info->bh_running = 1;
946
947 while((action = bh_action(info)) != 0) {
948
949 /* Process work item */
950 if ( debug_level >= DEBUG_LEVEL_BH )
951 printk( "%s(%d):bh_handler() work item action=%d\n",
952 __FILE__,__LINE__,action);
953
954 switch (action) {
955
956 case BH_RECEIVE:
957 while(rx_get_frame(info));
958 break;
959 case BH_TRANSMIT:
960 bh_transmit(info);
961 break;
962 case BH_STATUS:
963 bh_status(info);
964 break;
965 default:
966 /* unknown work item ID */
967 printk("Unknown work item ID=%08X!\n", action);
968 break;
969 }
970 }
971
972 if (debug_level >= DEBUG_LEVEL_BH)
973 printk( "%s(%d):bh_handler(%s) exit\n",
974 __FILE__,__LINE__,info->device_name);
975 }
976
977 void bh_transmit(MGSLPC_INFO *info)
978 {
979 struct tty_struct *tty = info->tty;
980 if (debug_level >= DEBUG_LEVEL_BH)
981 printk("bh_transmit() entry on %s\n", info->device_name);
982
983 if (tty) {
984 tty_wakeup(tty);
985 wake_up_interruptible(&tty->write_wait);
986 }
987 }
988
989 void bh_status(MGSLPC_INFO *info)
990 {
991 info->ri_chkcount = 0;
992 info->dsr_chkcount = 0;
993 info->dcd_chkcount = 0;
994 info->cts_chkcount = 0;
995 }
996
997 /* eom: non-zero = end of frame */
998 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
999 {
1000 unsigned char data[2];
1001 unsigned char fifo_count, read_count, i;
1002 RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
1003
1004 if (debug_level >= DEBUG_LEVEL_ISR)
1005 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
1006
1007 if (!info->rx_enabled)
1008 return;
1009
1010 if (info->rx_frame_count >= info->rx_buf_count) {
1011 /* no more free buffers */
1012 issue_command(info, CHA, CMD_RXRESET);
1013 info->pending_bh |= BH_RECEIVE;
1014 info->rx_overflow = 1;
1015 info->icount.buf_overrun++;
1016 return;
1017 }
1018
1019 if (eom) {
1020 /* end of frame, get FIFO count from RBCL register */
1021 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
1022 fifo_count = 32;
1023 } else
1024 fifo_count = 32;
1025
1026 do {
1027 if (fifo_count == 1) {
1028 read_count = 1;
1029 data[0] = read_reg(info, CHA + RXFIFO);
1030 } else {
1031 read_count = 2;
1032 *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
1033 }
1034 fifo_count -= read_count;
1035 if (!fifo_count && eom)
1036 buf->status = data[--read_count];
1037
1038 for (i = 0; i < read_count; i++) {
1039 if (buf->count >= info->max_frame_size) {
1040 /* frame too large, reset receiver and reset current buffer */
1041 issue_command(info, CHA, CMD_RXRESET);
1042 buf->count = 0;
1043 return;
1044 }
1045 *(buf->data + buf->count) = data[i];
1046 buf->count++;
1047 }
1048 } while (fifo_count);
1049
1050 if (eom) {
1051 info->pending_bh |= BH_RECEIVE;
1052 info->rx_frame_count++;
1053 info->rx_put++;
1054 if (info->rx_put >= info->rx_buf_count)
1055 info->rx_put = 0;
1056 }
1057 issue_command(info, CHA, CMD_RXFIFO);
1058 }
1059
1060 static void rx_ready_async(MGSLPC_INFO *info, int tcd)
1061 {
1062 unsigned char data, status;
1063 int fifo_count;
1064 struct tty_struct *tty = info->tty;
1065 struct mgsl_icount *icount = &info->icount;
1066
1067 if (tcd) {
1068 /* early termination, get FIFO count from RBCL register */
1069 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
1070
1071 /* Zero fifo count could mean 0 or 32 bytes available.
1072 * If BIT5 of STAR is set then at least 1 byte is available.
1073 */
1074 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
1075 fifo_count = 32;
1076 } else
1077 fifo_count = 32;
1078
1079 /* Flush received async data to receive data buffer. */
1080 while (fifo_count) {
1081 data = read_reg(info, CHA + RXFIFO);
1082 status = read_reg(info, CHA + RXFIFO);
1083 fifo_count -= 2;
1084
1085 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
1086 break;
1087
1088 *tty->flip.char_buf_ptr = data;
1089 icount->rx++;
1090
1091 *tty->flip.flag_buf_ptr = 0;
1092
1093 // if no frameing/crc error then save data
1094 // BIT7:parity error
1095 // BIT6:framing error
1096
1097 if (status & (BIT7 + BIT6)) {
1098 if (status & BIT7)
1099 icount->parity++;
1100 else
1101 icount->frame++;
1102
1103 /* discard char if tty control flags say so */
1104 if (status & info->ignore_status_mask)
1105 continue;
1106
1107 status &= info->read_status_mask;
1108
1109 if (status & BIT7)
1110 *tty->flip.flag_buf_ptr = TTY_PARITY;
1111 else if (status & BIT6)
1112 *tty->flip.flag_buf_ptr = TTY_FRAME;
1113 }
1114
1115 tty->flip.flag_buf_ptr++;
1116 tty->flip.char_buf_ptr++;
1117 tty->flip.count++;
1118 }
1119 issue_command(info, CHA, CMD_RXFIFO);
1120
1121 if (debug_level >= DEBUG_LEVEL_ISR) {
1122 printk("%s(%d):rx_ready_async count=%d\n",
1123 __FILE__,__LINE__,tty->flip.count);
1124 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
1125 __FILE__,__LINE__,icount->rx,icount->brk,
1126 icount->parity,icount->frame,icount->overrun);
1127 }
1128
1129 if (tty->flip.count)
1130 tty_flip_buffer_push(tty);
1131 }
1132
1133
1134 static void tx_done(MGSLPC_INFO *info)
1135 {
1136 if (!info->tx_active)
1137 return;
1138
1139 info->tx_active = 0;
1140 info->tx_aborting = 0;
1141
1142 if (info->params.mode == MGSL_MODE_ASYNC)
1143 return;
1144
1145 info->tx_count = info->tx_put = info->tx_get = 0;
1146 del_timer(&info->tx_timer);
1147
1148 if (info->drop_rts_on_tx_done) {
1149 get_signals(info);
1150 if (info->serial_signals & SerialSignal_RTS) {
1151 info->serial_signals &= ~SerialSignal_RTS;
1152 set_signals(info);
1153 }
1154 info->drop_rts_on_tx_done = 0;
1155 }
1156
1157 #ifdef CONFIG_HDLC
1158 if (info->netcount)
1159 hdlcdev_tx_done(info);
1160 else
1161 #endif
1162 {
1163 if (info->tty->stopped || info->tty->hw_stopped) {
1164 tx_stop(info);
1165 return;
1166 }
1167 info->pending_bh |= BH_TRANSMIT;
1168 }
1169 }
1170
1171 static void tx_ready(MGSLPC_INFO *info)
1172 {
1173 unsigned char fifo_count = 32;
1174 int c;
1175
1176 if (debug_level >= DEBUG_LEVEL_ISR)
1177 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1178
1179 if (info->params.mode == MGSL_MODE_HDLC) {
1180 if (!info->tx_active)
1181 return;
1182 } else {
1183 if (info->tty->stopped || info->tty->hw_stopped) {
1184 tx_stop(info);
1185 return;
1186 }
1187 if (!info->tx_count)
1188 info->tx_active = 0;
1189 }
1190
1191 if (!info->tx_count)
1192 return;
1193
1194 while (info->tx_count && fifo_count) {
1195 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1196
1197 if (c == 1) {
1198 write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1199 } else {
1200 write_reg16(info, CHA + TXFIFO,
1201 *((unsigned short*)(info->tx_buf + info->tx_get)));
1202 }
1203 info->tx_count -= c;
1204 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1205 fifo_count -= c;
1206 }
1207
1208 if (info->params.mode == MGSL_MODE_ASYNC) {
1209 if (info->tx_count < WAKEUP_CHARS)
1210 info->pending_bh |= BH_TRANSMIT;
1211 issue_command(info, CHA, CMD_TXFIFO);
1212 } else {
1213 if (info->tx_count)
1214 issue_command(info, CHA, CMD_TXFIFO);
1215 else
1216 issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1217 }
1218 }
1219
1220 static void cts_change(MGSLPC_INFO *info)
1221 {
1222 get_signals(info);
1223 if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1224 irq_disable(info, CHB, IRQ_CTS);
1225 info->icount.cts++;
1226 if (info->serial_signals & SerialSignal_CTS)
1227 info->input_signal_events.cts_up++;
1228 else
1229 info->input_signal_events.cts_down++;
1230 wake_up_interruptible(&info->status_event_wait_q);
1231 wake_up_interruptible(&info->event_wait_q);
1232
1233 if (info->flags & ASYNC_CTS_FLOW) {
1234 if (info->tty->hw_stopped) {
1235 if (info->serial_signals & SerialSignal_CTS) {
1236 if (debug_level >= DEBUG_LEVEL_ISR)
1237 printk("CTS tx start...");
1238 if (info->tty)
1239 info->tty->hw_stopped = 0;
1240 tx_start(info);
1241 info->pending_bh |= BH_TRANSMIT;
1242 return;
1243 }
1244 } else {
1245 if (!(info->serial_signals & SerialSignal_CTS)) {
1246 if (debug_level >= DEBUG_LEVEL_ISR)
1247 printk("CTS tx stop...");
1248 if (info->tty)
1249 info->tty->hw_stopped = 1;
1250 tx_stop(info);
1251 }
1252 }
1253 }
1254 info->pending_bh |= BH_STATUS;
1255 }
1256
1257 static void dcd_change(MGSLPC_INFO *info)
1258 {
1259 get_signals(info);
1260 if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1261 irq_disable(info, CHB, IRQ_DCD);
1262 info->icount.dcd++;
1263 if (info->serial_signals & SerialSignal_DCD) {
1264 info->input_signal_events.dcd_up++;
1265 }
1266 else
1267 info->input_signal_events.dcd_down++;
1268 #ifdef CONFIG_HDLC
1269 if (info->netcount)
1270 hdlc_set_carrier(info->serial_signals & SerialSignal_DCD, info->netdev);
1271 #endif
1272 wake_up_interruptible(&info->status_event_wait_q);
1273 wake_up_interruptible(&info->event_wait_q);
1274
1275 if (info->flags & ASYNC_CHECK_CD) {
1276 if (debug_level >= DEBUG_LEVEL_ISR)
1277 printk("%s CD now %s...", info->device_name,
1278 (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1279 if (info->serial_signals & SerialSignal_DCD)
1280 wake_up_interruptible(&info->open_wait);
1281 else {
1282 if (debug_level >= DEBUG_LEVEL_ISR)
1283 printk("doing serial hangup...");
1284 if (info->tty)
1285 tty_hangup(info->tty);
1286 }
1287 }
1288 info->pending_bh |= BH_STATUS;
1289 }
1290
1291 static void dsr_change(MGSLPC_INFO *info)
1292 {
1293 get_signals(info);
1294 if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1295 port_irq_disable(info, PVR_DSR);
1296 info->icount.dsr++;
1297 if (info->serial_signals & SerialSignal_DSR)
1298 info->input_signal_events.dsr_up++;
1299 else
1300 info->input_signal_events.dsr_down++;
1301 wake_up_interruptible(&info->status_event_wait_q);
1302 wake_up_interruptible(&info->event_wait_q);
1303 info->pending_bh |= BH_STATUS;
1304 }
1305
1306 static void ri_change(MGSLPC_INFO *info)
1307 {
1308 get_signals(info);
1309 if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1310 port_irq_disable(info, PVR_RI);
1311 info->icount.rng++;
1312 if (info->serial_signals & SerialSignal_RI)
1313 info->input_signal_events.ri_up++;
1314 else
1315 info->input_signal_events.ri_down++;
1316 wake_up_interruptible(&info->status_event_wait_q);
1317 wake_up_interruptible(&info->event_wait_q);
1318 info->pending_bh |= BH_STATUS;
1319 }
1320
1321 /* Interrupt service routine entry point.
1322 *
1323 * Arguments:
1324 *
1325 * irq interrupt number that caused interrupt
1326 * dev_id device ID supplied during interrupt registration
1327 * regs interrupted processor context
1328 */
1329 static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs)
1330 {
1331 MGSLPC_INFO * info = (MGSLPC_INFO *)dev_id;
1332 unsigned short isr;
1333 unsigned char gis, pis;
1334 int count=0;
1335
1336 if (debug_level >= DEBUG_LEVEL_ISR)
1337 printk("mgslpc_isr(%d) entry.\n", irq);
1338 if (!info)
1339 return IRQ_NONE;
1340
1341 if (!(info->link.state & DEV_CONFIG))
1342 return IRQ_HANDLED;
1343
1344 spin_lock(&info->lock);
1345
1346 while ((gis = read_reg(info, CHA + GIS))) {
1347 if (debug_level >= DEBUG_LEVEL_ISR)
1348 printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1349
1350 if ((gis & 0x70) || count > 1000) {
1351 printk("synclink_cs:hardware failed or ejected\n");
1352 break;
1353 }
1354 count++;
1355
1356 if (gis & (BIT1 + BIT0)) {
1357 isr = read_reg16(info, CHB + ISR);
1358 if (isr & IRQ_DCD)
1359 dcd_change(info);
1360 if (isr & IRQ_CTS)
1361 cts_change(info);
1362 }
1363 if (gis & (BIT3 + BIT2))
1364 {
1365 isr = read_reg16(info, CHA + ISR);
1366 if (isr & IRQ_TIMER) {
1367 info->irq_occurred = 1;
1368 irq_disable(info, CHA, IRQ_TIMER);
1369 }
1370
1371 /* receive IRQs */
1372 if (isr & IRQ_EXITHUNT) {
1373 info->icount.exithunt++;
1374 wake_up_interruptible(&info->event_wait_q);
1375 }
1376 if (isr & IRQ_BREAK_ON) {
1377 info->icount.brk++;
1378 if (info->flags & ASYNC_SAK)
1379 do_SAK(info->tty);
1380 }
1381 if (isr & IRQ_RXTIME) {
1382 issue_command(info, CHA, CMD_RXFIFO_READ);
1383 }
1384 if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1385 if (info->params.mode == MGSL_MODE_HDLC)
1386 rx_ready_hdlc(info, isr & IRQ_RXEOM);
1387 else
1388 rx_ready_async(info, isr & IRQ_RXEOM);
1389 }
1390
1391 /* transmit IRQs */
1392 if (isr & IRQ_UNDERRUN) {
1393 if (info->tx_aborting)
1394 info->icount.txabort++;
1395 else
1396 info->icount.txunder++;
1397 tx_done(info);
1398 }
1399 else if (isr & IRQ_ALLSENT) {
1400 info->icount.txok++;
1401 tx_done(info);
1402 }
1403 else if (isr & IRQ_TXFIFO)
1404 tx_ready(info);
1405 }
1406 if (gis & BIT7) {
1407 pis = read_reg(info, CHA + PIS);
1408 if (pis & BIT1)
1409 dsr_change(info);
1410 if (pis & BIT2)
1411 ri_change(info);
1412 }
1413 }
1414
1415 /* Request bottom half processing if there's something
1416 * for it to do and the bh is not already running
1417 */
1418
1419 if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1420 if ( debug_level >= DEBUG_LEVEL_ISR )
1421 printk("%s(%d):%s queueing bh task.\n",
1422 __FILE__,__LINE__,info->device_name);
1423 schedule_work(&info->task);
1424 info->bh_requested = 1;
1425 }
1426
1427 spin_unlock(&info->lock);
1428
1429 if (debug_level >= DEBUG_LEVEL_ISR)
1430 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1431 __FILE__,__LINE__,irq);
1432
1433 return IRQ_HANDLED;
1434 }
1435
1436 /* Initialize and start device.
1437 */
1438 static int startup(MGSLPC_INFO * info)
1439 {
1440 int retval = 0;
1441
1442 if (debug_level >= DEBUG_LEVEL_INFO)
1443 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
1444
1445 if (info->flags & ASYNC_INITIALIZED)
1446 return 0;
1447
1448 if (!info->tx_buf) {
1449 /* allocate a page of memory for a transmit buffer */
1450 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1451 if (!info->tx_buf) {
1452 printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1453 __FILE__,__LINE__,info->device_name);
1454 return -ENOMEM;
1455 }
1456 }
1457
1458 info->pending_bh = 0;
1459
1460 memset(&info->icount, 0, sizeof(info->icount));
1461
1462 init_timer(&info->tx_timer);
1463 info->tx_timer.data = (unsigned long)info;
1464 info->tx_timer.function = tx_timeout;
1465
1466 /* Allocate and claim adapter resources */
1467 retval = claim_resources(info);
1468
1469 /* perform existance check and diagnostics */
1470 if ( !retval )
1471 retval = adapter_test(info);
1472
1473 if ( retval ) {
1474 if (capable(CAP_SYS_ADMIN) && info->tty)
1475 set_bit(TTY_IO_ERROR, &info->tty->flags);
1476 release_resources(info);
1477 return retval;
1478 }
1479
1480 /* program hardware for current parameters */
1481 mgslpc_change_params(info);
1482
1483 if (info->tty)
1484 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1485
1486 info->flags |= ASYNC_INITIALIZED;
1487
1488 return 0;
1489 }
1490
1491 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1492 */
1493 static void shutdown(MGSLPC_INFO * info)
1494 {
1495 unsigned long flags;
1496
1497 if (!(info->flags & ASYNC_INITIALIZED))
1498 return;
1499
1500 if (debug_level >= DEBUG_LEVEL_INFO)
1501 printk("%s(%d):mgslpc_shutdown(%s)\n",
1502 __FILE__,__LINE__, info->device_name );
1503
1504 /* clear status wait queue because status changes */
1505 /* can't happen after shutting down the hardware */
1506 wake_up_interruptible(&info->status_event_wait_q);
1507 wake_up_interruptible(&info->event_wait_q);
1508
1509 del_timer(&info->tx_timer);
1510
1511 if (info->tx_buf) {
1512 free_page((unsigned long) info->tx_buf);
1513 info->tx_buf = NULL;
1514 }
1515
1516 spin_lock_irqsave(&info->lock,flags);
1517
1518 rx_stop(info);
1519 tx_stop(info);
1520
1521 /* TODO:disable interrupts instead of reset to preserve signal states */
1522 reset_device(info);
1523
1524 if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
1525 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1526 set_signals(info);
1527 }
1528
1529 spin_unlock_irqrestore(&info->lock,flags);
1530
1531 release_resources(info);
1532
1533 if (info->tty)
1534 set_bit(TTY_IO_ERROR, &info->tty->flags);
1535
1536 info->flags &= ~ASYNC_INITIALIZED;
1537 }
1538
1539 static void mgslpc_program_hw(MGSLPC_INFO *info)
1540 {
1541 unsigned long flags;
1542
1543 spin_lock_irqsave(&info->lock,flags);
1544
1545 rx_stop(info);
1546 tx_stop(info);
1547 info->tx_count = info->tx_put = info->tx_get = 0;
1548
1549 if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1550 hdlc_mode(info);
1551 else
1552 async_mode(info);
1553
1554 set_signals(info);
1555
1556 info->dcd_chkcount = 0;
1557 info->cts_chkcount = 0;
1558 info->ri_chkcount = 0;
1559 info->dsr_chkcount = 0;
1560
1561 irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1562 port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1563 get_signals(info);
1564
1565 if (info->netcount || info->tty->termios->c_cflag & CREAD)
1566 rx_start(info);
1567
1568 spin_unlock_irqrestore(&info->lock,flags);
1569 }
1570
1571 /* Reconfigure adapter based on new parameters
1572 */
1573 static void mgslpc_change_params(MGSLPC_INFO *info)
1574 {
1575 unsigned cflag;
1576 int bits_per_char;
1577
1578 if (!info->tty || !info->tty->termios)
1579 return;
1580
1581 if (debug_level >= DEBUG_LEVEL_INFO)
1582 printk("%s(%d):mgslpc_change_params(%s)\n",
1583 __FILE__,__LINE__, info->device_name );
1584
1585 cflag = info->tty->termios->c_cflag;
1586
1587 /* if B0 rate (hangup) specified then negate DTR and RTS */
1588 /* otherwise assert DTR and RTS */
1589 if (cflag & CBAUD)
1590 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1591 else
1592 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
1593
1594 /* byte size and parity */
1595
1596 switch (cflag & CSIZE) {
1597 case CS5: info->params.data_bits = 5; break;
1598 case CS6: info->params.data_bits = 6; break;
1599 case CS7: info->params.data_bits = 7; break;
1600 case CS8: info->params.data_bits = 8; break;
1601 default: info->params.data_bits = 7; break;
1602 }
1603
1604 if (cflag & CSTOPB)
1605 info->params.stop_bits = 2;
1606 else
1607 info->params.stop_bits = 1;
1608
1609 info->params.parity = ASYNC_PARITY_NONE;
1610 if (cflag & PARENB) {
1611 if (cflag & PARODD)
1612 info->params.parity = ASYNC_PARITY_ODD;
1613 else
1614 info->params.parity = ASYNC_PARITY_EVEN;
1615 #ifdef CMSPAR
1616 if (cflag & CMSPAR)
1617 info->params.parity = ASYNC_PARITY_SPACE;
1618 #endif
1619 }
1620
1621 /* calculate number of jiffies to transmit a full
1622 * FIFO (32 bytes) at specified data rate
1623 */
1624 bits_per_char = info->params.data_bits +
1625 info->params.stop_bits + 1;
1626
1627 /* if port data rate is set to 460800 or less then
1628 * allow tty settings to override, otherwise keep the
1629 * current data rate.
1630 */
1631 if (info->params.data_rate <= 460800) {
1632 info->params.data_rate = tty_get_baud_rate(info->tty);
1633 }
1634
1635 if ( info->params.data_rate ) {
1636 info->timeout = (32*HZ*bits_per_char) /
1637 info->params.data_rate;
1638 }
1639 info->timeout += HZ/50; /* Add .02 seconds of slop */
1640
1641 if (cflag & CRTSCTS)
1642 info->flags |= ASYNC_CTS_FLOW;
1643 else
1644 info->flags &= ~ASYNC_CTS_FLOW;
1645
1646 if (cflag & CLOCAL)
1647 info->flags &= ~ASYNC_CHECK_CD;
1648 else
1649 info->flags |= ASYNC_CHECK_CD;
1650
1651 /* process tty input control flags */
1652
1653 info->read_status_mask = 0;
1654 if (I_INPCK(info->tty))
1655 info->read_status_mask |= BIT7 | BIT6;
1656 if (I_IGNPAR(info->tty))
1657 info->ignore_status_mask |= BIT7 | BIT6;
1658
1659 mgslpc_program_hw(info);
1660 }
1661
1662 /* Add a character to the transmit buffer
1663 */
1664 static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1665 {
1666 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1667 unsigned long flags;
1668
1669 if (debug_level >= DEBUG_LEVEL_INFO) {
1670 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1671 __FILE__,__LINE__,ch,info->device_name);
1672 }
1673
1674 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1675 return;
1676
1677 if (!tty || !info->tx_buf)
1678 return;
1679
1680 spin_lock_irqsave(&info->lock,flags);
1681
1682 if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1683 if (info->tx_count < TXBUFSIZE - 1) {
1684 info->tx_buf[info->tx_put++] = ch;
1685 info->tx_put &= TXBUFSIZE-1;
1686 info->tx_count++;
1687 }
1688 }
1689
1690 spin_unlock_irqrestore(&info->lock,flags);
1691 }
1692
1693 /* Enable transmitter so remaining characters in the
1694 * transmit buffer are sent.
1695 */
1696 static void mgslpc_flush_chars(struct tty_struct *tty)
1697 {
1698 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1699 unsigned long flags;
1700
1701 if (debug_level >= DEBUG_LEVEL_INFO)
1702 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1703 __FILE__,__LINE__,info->device_name,info->tx_count);
1704
1705 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1706 return;
1707
1708 if (info->tx_count <= 0 || tty->stopped ||
1709 tty->hw_stopped || !info->tx_buf)
1710 return;
1711
1712 if (debug_level >= DEBUG_LEVEL_INFO)
1713 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1714 __FILE__,__LINE__,info->device_name);
1715
1716 spin_lock_irqsave(&info->lock,flags);
1717 if (!info->tx_active)
1718 tx_start(info);
1719 spin_unlock_irqrestore(&info->lock,flags);
1720 }
1721
1722 /* Send a block of data
1723 *
1724 * Arguments:
1725 *
1726 * tty pointer to tty information structure
1727 * buf pointer to buffer containing send data
1728 * count size of send data in bytes
1729 *
1730 * Returns: number of characters written
1731 */
1732 static int mgslpc_write(struct tty_struct * tty,
1733 const unsigned char *buf, int count)
1734 {
1735 int c, ret = 0;
1736 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1737 unsigned long flags;
1738
1739 if (debug_level >= DEBUG_LEVEL_INFO)
1740 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1741 __FILE__,__LINE__,info->device_name,count);
1742
1743 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1744 !tty || !info->tx_buf)
1745 goto cleanup;
1746
1747 if (info->params.mode == MGSL_MODE_HDLC) {
1748 if (count > TXBUFSIZE) {
1749 ret = -EIO;
1750 goto cleanup;
1751 }
1752 if (info->tx_active)
1753 goto cleanup;
1754 else if (info->tx_count)
1755 goto start;
1756 }
1757
1758 for (;;) {
1759 c = min(count,
1760 min(TXBUFSIZE - info->tx_count - 1,
1761 TXBUFSIZE - info->tx_put));
1762 if (c <= 0)
1763 break;
1764
1765 memcpy(info->tx_buf + info->tx_put, buf, c);
1766
1767 spin_lock_irqsave(&info->lock,flags);
1768 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1769 info->tx_count += c;
1770 spin_unlock_irqrestore(&info->lock,flags);
1771
1772 buf += c;
1773 count -= c;
1774 ret += c;
1775 }
1776 start:
1777 if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1778 spin_lock_irqsave(&info->lock,flags);
1779 if (!info->tx_active)
1780 tx_start(info);
1781 spin_unlock_irqrestore(&info->lock,flags);
1782 }
1783 cleanup:
1784 if (debug_level >= DEBUG_LEVEL_INFO)
1785 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1786 __FILE__,__LINE__,info->device_name,ret);
1787 return ret;
1788 }
1789
1790 /* Return the count of free bytes in transmit buffer
1791 */
1792 static int mgslpc_write_room(struct tty_struct *tty)
1793 {
1794 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1795 int ret;
1796
1797 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1798 return 0;
1799
1800 if (info->params.mode == MGSL_MODE_HDLC) {
1801 /* HDLC (frame oriented) mode */
1802 if (info->tx_active)
1803 return 0;
1804 else
1805 return HDLC_MAX_FRAME_SIZE;
1806 } else {
1807 ret = TXBUFSIZE - info->tx_count - 1;
1808 if (ret < 0)
1809 ret = 0;
1810 }
1811
1812 if (debug_level >= DEBUG_LEVEL_INFO)
1813 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1814 __FILE__,__LINE__, info->device_name, ret);
1815 return ret;
1816 }
1817
1818 /* Return the count of bytes in transmit buffer
1819 */
1820 static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1821 {
1822 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1823 int rc;
1824
1825 if (debug_level >= DEBUG_LEVEL_INFO)
1826 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1827 __FILE__,__LINE__, info->device_name );
1828
1829 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1830 return 0;
1831
1832 if (info->params.mode == MGSL_MODE_HDLC)
1833 rc = info->tx_active ? info->max_frame_size : 0;
1834 else
1835 rc = info->tx_count;
1836
1837 if (debug_level >= DEBUG_LEVEL_INFO)
1838 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1839 __FILE__,__LINE__, info->device_name, rc);
1840
1841 return rc;
1842 }
1843
1844 /* Discard all data in the send buffer
1845 */
1846 static void mgslpc_flush_buffer(struct tty_struct *tty)
1847 {
1848 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1849 unsigned long flags;
1850
1851 if (debug_level >= DEBUG_LEVEL_INFO)
1852 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1853 __FILE__,__LINE__, info->device_name );
1854
1855 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1856 return;
1857
1858 spin_lock_irqsave(&info->lock,flags);
1859 info->tx_count = info->tx_put = info->tx_get = 0;
1860 del_timer(&info->tx_timer);
1861 spin_unlock_irqrestore(&info->lock,flags);
1862
1863 wake_up_interruptible(&tty->write_wait);
1864 tty_wakeup(tty);
1865 }
1866
1867 /* Send a high-priority XON/XOFF character
1868 */
1869 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1870 {
1871 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1872 unsigned long flags;
1873
1874 if (debug_level >= DEBUG_LEVEL_INFO)
1875 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1876 __FILE__,__LINE__, info->device_name, ch );
1877
1878 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1879 return;
1880
1881 info->x_char = ch;
1882 if (ch) {
1883 spin_lock_irqsave(&info->lock,flags);
1884 if (!info->tx_enabled)
1885 tx_start(info);
1886 spin_unlock_irqrestore(&info->lock,flags);
1887 }
1888 }
1889
1890 /* Signal remote device to throttle send data (our receive data)
1891 */
1892 static void mgslpc_throttle(struct tty_struct * tty)
1893 {
1894 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1895 unsigned long flags;
1896
1897 if (debug_level >= DEBUG_LEVEL_INFO)
1898 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1899 __FILE__,__LINE__, info->device_name );
1900
1901 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1902 return;
1903
1904 if (I_IXOFF(tty))
1905 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1906
1907 if (tty->termios->c_cflag & CRTSCTS) {
1908 spin_lock_irqsave(&info->lock,flags);
1909 info->serial_signals &= ~SerialSignal_RTS;
1910 set_signals(info);
1911 spin_unlock_irqrestore(&info->lock,flags);
1912 }
1913 }
1914
1915 /* Signal remote device to stop throttling send data (our receive data)
1916 */
1917 static void mgslpc_unthrottle(struct tty_struct * tty)
1918 {
1919 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1920 unsigned long flags;
1921
1922 if (debug_level >= DEBUG_LEVEL_INFO)
1923 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1924 __FILE__,__LINE__, info->device_name );
1925
1926 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1927 return;
1928
1929 if (I_IXOFF(tty)) {
1930 if (info->x_char)
1931 info->x_char = 0;
1932 else
1933 mgslpc_send_xchar(tty, START_CHAR(tty));
1934 }
1935
1936 if (tty->termios->c_cflag & CRTSCTS) {
1937 spin_lock_irqsave(&info->lock,flags);
1938 info->serial_signals |= SerialSignal_RTS;
1939 set_signals(info);
1940 spin_unlock_irqrestore(&info->lock,flags);
1941 }
1942 }
1943
1944 /* get the current serial statistics
1945 */
1946 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1947 {
1948 int err;
1949 if (debug_level >= DEBUG_LEVEL_INFO)
1950 printk("get_params(%s)\n", info->device_name);
1951 if (!user_icount) {
1952 memset(&info->icount, 0, sizeof(info->icount));
1953 } else {
1954 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1955 if (err)
1956 return -EFAULT;
1957 }
1958 return 0;
1959 }
1960
1961 /* get the current serial parameters
1962 */
1963 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1964 {
1965 int err;
1966 if (debug_level >= DEBUG_LEVEL_INFO)
1967 printk("get_params(%s)\n", info->device_name);
1968 COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1969 if (err)
1970 return -EFAULT;
1971 return 0;
1972 }
1973
1974 /* set the serial parameters
1975 *
1976 * Arguments:
1977 *
1978 * info pointer to device instance data
1979 * new_params user buffer containing new serial params
1980 *
1981 * Returns: 0 if success, otherwise error code
1982 */
1983 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
1984 {
1985 unsigned long flags;
1986 MGSL_PARAMS tmp_params;
1987 int err;
1988
1989 if (debug_level >= DEBUG_LEVEL_INFO)
1990 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1991 info->device_name );
1992 COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1993 if (err) {
1994 if ( debug_level >= DEBUG_LEVEL_INFO )
1995 printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1996 __FILE__,__LINE__,info->device_name);
1997 return -EFAULT;
1998 }
1999
2000 spin_lock_irqsave(&info->lock,flags);
2001 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
2002 spin_unlock_irqrestore(&info->lock,flags);
2003
2004 mgslpc_change_params(info);
2005
2006 return 0;
2007 }
2008
2009 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
2010 {
2011 int err;
2012 if (debug_level >= DEBUG_LEVEL_INFO)
2013 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
2014 COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
2015 if (err)
2016 return -EFAULT;
2017 return 0;
2018 }
2019
2020 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
2021 {
2022 unsigned long flags;
2023 if (debug_level >= DEBUG_LEVEL_INFO)
2024 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
2025 spin_lock_irqsave(&info->lock,flags);
2026 info->idle_mode = idle_mode;
2027 tx_set_idle(info);
2028 spin_unlock_irqrestore(&info->lock,flags);
2029 return 0;
2030 }
2031
2032 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
2033 {
2034 int err;
2035 if (debug_level >= DEBUG_LEVEL_INFO)
2036 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
2037 COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
2038 if (err)
2039 return -EFAULT;
2040 return 0;
2041 }
2042
2043 static int set_interface(MGSLPC_INFO * info, int if_mode)
2044 {
2045 unsigned long flags;
2046 unsigned char val;
2047 if (debug_level >= DEBUG_LEVEL_INFO)
2048 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
2049 spin_lock_irqsave(&info->lock,flags);
2050 info->if_mode = if_mode;
2051
2052 val = read_reg(info, PVR) & 0x0f;
2053 switch (info->if_mode)
2054 {
2055 case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
2056 case MGSL_INTERFACE_V35: val |= PVR_V35; break;
2057 case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
2058 }
2059 write_reg(info, PVR, val);
2060
2061 spin_unlock_irqrestore(&info->lock,flags);
2062 return 0;
2063 }
2064
2065 static int set_txenable(MGSLPC_INFO * info, int enable)
2066 {
2067 unsigned long flags;
2068
2069 if (debug_level >= DEBUG_LEVEL_INFO)
2070 printk("set_txenable(%s,%d)\n", info->device_name, enable);
2071
2072 spin_lock_irqsave(&info->lock,flags);
2073 if (enable) {
2074 if (!info->tx_enabled)
2075 tx_start(info);
2076 } else {
2077 if (info->tx_enabled)
2078 tx_stop(info);
2079 }
2080 spin_unlock_irqrestore(&info->lock,flags);
2081 return 0;
2082 }
2083
2084 static int tx_abort(MGSLPC_INFO * info)
2085 {
2086 unsigned long flags;
2087
2088 if (debug_level >= DEBUG_LEVEL_INFO)
2089 printk("tx_abort(%s)\n", info->device_name);
2090
2091 spin_lock_irqsave(&info->lock,flags);
2092 if (info->tx_active && info->tx_count &&
2093 info->params.mode == MGSL_MODE_HDLC) {
2094 /* clear data count so FIFO is not filled on next IRQ.
2095 * This results in underrun and abort transmission.
2096 */
2097 info->tx_count = info->tx_put = info->tx_get = 0;
2098 info->tx_aborting = TRUE;
2099 }
2100 spin_unlock_irqrestore(&info->lock,flags);
2101 return 0;
2102 }
2103
2104 static int set_rxenable(MGSLPC_INFO * info, int enable)
2105 {
2106 unsigned long flags;
2107
2108 if (debug_level >= DEBUG_LEVEL_INFO)
2109 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
2110
2111 spin_lock_irqsave(&info->lock,flags);
2112 if (enable) {
2113 if (!info->rx_enabled)
2114 rx_start(info);
2115 } else {
2116 if (info->rx_enabled)
2117 rx_stop(info);
2118 }
2119 spin_unlock_irqrestore(&info->lock,flags);
2120 return 0;
2121 }
2122
2123 /* wait for specified event to occur
2124 *
2125 * Arguments: info pointer to device instance data
2126 * mask pointer to bitmask of events to wait for
2127 * Return Value: 0 if successful and bit mask updated with
2128 * of events triggerred,
2129 * otherwise error code
2130 */
2131 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
2132 {
2133 unsigned long flags;
2134 int s;
2135 int rc=0;
2136 struct mgsl_icount cprev, cnow;
2137 int events;
2138 int mask;
2139 struct _input_signal_events oldsigs, newsigs;
2140 DECLARE_WAITQUEUE(wait, current);
2141
2142 COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
2143 if (rc)
2144 return -EFAULT;
2145
2146 if (debug_level >= DEBUG_LEVEL_INFO)
2147 printk("wait_events(%s,%d)\n", info->device_name, mask);
2148
2149 spin_lock_irqsave(&info->lock,flags);
2150
2151 /* return immediately if state matches requested events */
2152 get_signals(info);
2153 s = info->serial_signals;
2154 events = mask &
2155 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
2156 ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
2157 ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
2158 ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
2159 if (events) {
2160 spin_unlock_irqrestore(&info->lock,flags);
2161 goto exit;
2162 }
2163
2164 /* save current irq counts */
2165 cprev = info->icount;
2166 oldsigs = info->input_signal_events;
2167
2168 if ((info->params.mode == MGSL_MODE_HDLC) &&
2169 (mask & MgslEvent_ExitHuntMode))
2170 irq_enable(info, CHA, IRQ_EXITHUNT);
2171
2172 set_current_state(TASK_INTERRUPTIBLE);
2173 add_wait_queue(&info->event_wait_q, &wait);
2174
2175 spin_unlock_irqrestore(&info->lock,flags);
2176
2177
2178 for(;;) {
2179 schedule();
2180 if (signal_pending(current)) {
2181 rc = -ERESTARTSYS;
2182 break;
2183 }
2184
2185 /* get current irq counts */
2186 spin_lock_irqsave(&info->lock,flags);
2187 cnow = info->icount;
2188 newsigs = info->input_signal_events;
2189 set_current_state(TASK_INTERRUPTIBLE);
2190 spin_unlock_irqrestore(&info->lock,flags);
2191
2192 /* if no change, wait aborted for some reason */
2193 if (newsigs.dsr_up == oldsigs.dsr_up &&
2194 newsigs.dsr_down == oldsigs.dsr_down &&
2195 newsigs.dcd_up == oldsigs.dcd_up &&
2196 newsigs.dcd_down == oldsigs.dcd_down &&
2197 newsigs.cts_up == oldsigs.cts_up &&
2198 newsigs.cts_down == oldsigs.cts_down &&
2199 newsigs.ri_up == oldsigs.ri_up &&
2200 newsigs.ri_down == oldsigs.ri_down &&
2201 cnow.exithunt == cprev.exithunt &&
2202 cnow.rxidle == cprev.rxidle) {
2203 rc = -EIO;
2204 break;
2205 }
2206
2207 events = mask &
2208 ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
2209 (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2210 (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
2211 (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2212 (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
2213 (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2214 (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
2215 (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
2216 (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
2217 (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
2218 if (events)
2219 break;
2220
2221 cprev = cnow;
2222 oldsigs = newsigs;
2223 }
2224
2225 remove_wait_queue(&info->event_wait_q, &wait);
2226 set_current_state(TASK_RUNNING);
2227
2228 if (mask & MgslEvent_ExitHuntMode) {
2229 spin_lock_irqsave(&info->lock,flags);
2230 if (!waitqueue_active(&info->event_wait_q))
2231 irq_disable(info, CHA, IRQ_EXITHUNT);
2232 spin_unlock_irqrestore(&info->lock,flags);
2233 }
2234 exit:
2235 if (rc == 0)
2236 PUT_USER(rc, events, mask_ptr);
2237 return rc;
2238 }
2239
2240 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2241 {
2242 unsigned long flags;
2243 int rc;
2244 struct mgsl_icount cprev, cnow;
2245 DECLARE_WAITQUEUE(wait, current);
2246
2247 /* save current irq counts */
2248 spin_lock_irqsave(&info->lock,flags);
2249 cprev = info->icount;
2250 add_wait_queue(&info->status_event_wait_q, &wait);
2251 set_current_state(TASK_INTERRUPTIBLE);
2252 spin_unlock_irqrestore(&info->lock,flags);
2253
2254 for(;;) {
2255 schedule();
2256 if (signal_pending(current)) {
2257 rc = -ERESTARTSYS;
2258 break;
2259 }
2260
2261 /* get new irq counts */
2262 spin_lock_irqsave(&info->lock,flags);
2263 cnow = info->icount;
2264 set_current_state(TASK_INTERRUPTIBLE);
2265 spin_unlock_irqrestore(&info->lock,flags);
2266
2267 /* if no change, wait aborted for some reason */
2268 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2269 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2270 rc = -EIO;
2271 break;
2272 }
2273
2274 /* check for change in caller specified modem input */
2275 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2276 (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2277 (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
2278 (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2279 rc = 0;
2280 break;
2281 }
2282
2283 cprev = cnow;
2284 }
2285 remove_wait_queue(&info->status_event_wait_q, &wait);
2286 set_current_state(TASK_RUNNING);
2287 return rc;
2288 }
2289
2290 /* return the state of the serial control and status signals
2291 */
2292 static int tiocmget(struct tty_struct *tty, struct file *file)
2293 {
2294 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2295 unsigned int result;
2296 unsigned long flags;
2297
2298 spin_lock_irqsave(&info->lock,flags);
2299 get_signals(info);
2300 spin_unlock_irqrestore(&info->lock,flags);
2301
2302 result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2303 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2304 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2305 ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
2306 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2307 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2308
2309 if (debug_level >= DEBUG_LEVEL_INFO)
2310 printk("%s(%d):%s tiocmget() value=%08X\n",
2311 __FILE__,__LINE__, info->device_name, result );
2312 return result;
2313 }
2314
2315 /* set modem control signals (DTR/RTS)
2316 */
2317 static int tiocmset(struct tty_struct *tty, struct file *file,
2318 unsigned int set, unsigned int clear)
2319 {
2320 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2321 unsigned long flags;
2322
2323 if (debug_level >= DEBUG_LEVEL_INFO)
2324 printk("%s(%d):%s tiocmset(%x,%x)\n",
2325 __FILE__,__LINE__,info->device_name, set, clear);
2326
2327 if (set & TIOCM_RTS)
2328 info->serial_signals |= SerialSignal_RTS;
2329 if (set & TIOCM_DTR)
2330 info->serial_signals |= SerialSignal_DTR;
2331 if (clear & TIOCM_RTS)
2332 info->serial_signals &= ~SerialSignal_RTS;
2333 if (clear & TIOCM_DTR)
2334 info->serial_signals &= ~SerialSignal_DTR;
2335
2336 spin_lock_irqsave(&info->lock,flags);
2337 set_signals(info);
2338 spin_unlock_irqrestore(&info->lock,flags);
2339
2340 return 0;
2341 }
2342
2343 /* Set or clear transmit break condition
2344 *
2345 * Arguments: tty pointer to tty instance data
2346 * break_state -1=set break condition, 0=clear
2347 */
2348 static void mgslpc_break(struct tty_struct *tty, int break_state)
2349 {
2350 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2351 unsigned long flags;
2352
2353 if (debug_level >= DEBUG_LEVEL_INFO)
2354 printk("%s(%d):mgslpc_break(%s,%d)\n",
2355 __FILE__,__LINE__, info->device_name, break_state);
2356
2357 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2358 return;
2359
2360 spin_lock_irqsave(&info->lock,flags);
2361 if (break_state == -1)
2362 set_reg_bits(info, CHA+DAFO, BIT6);
2363 else
2364 clear_reg_bits(info, CHA+DAFO, BIT6);
2365 spin_unlock_irqrestore(&info->lock,flags);
2366 }
2367
2368 /* Service an IOCTL request
2369 *
2370 * Arguments:
2371 *
2372 * tty pointer to tty instance data
2373 * file pointer to associated file object for device
2374 * cmd IOCTL command code
2375 * arg command argument/context
2376 *
2377 * Return Value: 0 if success, otherwise error code
2378 */
2379 static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
2380 unsigned int cmd, unsigned long arg)
2381 {
2382 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2383
2384 if (debug_level >= DEBUG_LEVEL_INFO)
2385 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2386 info->device_name, cmd );
2387
2388 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2389 return -ENODEV;
2390
2391 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2392 (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
2393 if (tty->flags & (1 << TTY_IO_ERROR))
2394 return -EIO;
2395 }
2396
2397 return ioctl_common(info, cmd, arg);
2398 }
2399
2400 int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
2401 {
2402 int error;
2403 struct mgsl_icount cnow; /* kernel counter temps */
2404 struct serial_icounter_struct __user *p_cuser; /* user space */
2405 void __user *argp = (void __user *)arg;
2406 unsigned long flags;
2407
2408 switch (cmd) {
2409 case MGSL_IOCGPARAMS:
2410 return get_params(info, argp);
2411 case MGSL_IOCSPARAMS:
2412 return set_params(info, argp);
2413 case MGSL_IOCGTXIDLE:
2414 return get_txidle(info, argp);
2415 case MGSL_IOCSTXIDLE:
2416 return set_txidle(info, (int)arg);
2417 case MGSL_IOCGIF:
2418 return get_interface(info, argp);
2419 case MGSL_IOCSIF:
2420 return set_interface(info,(int)arg);
2421 case MGSL_IOCTXENABLE:
2422 return set_txenable(info,(int)arg);
2423 case MGSL_IOCRXENABLE:
2424 return set_rxenable(info,(int)arg);
2425 case MGSL_IOCTXABORT:
2426 return tx_abort(info);
2427 case MGSL_IOCGSTATS:
2428 return get_stats(info, argp);
2429 case MGSL_IOCWAITEVENT:
2430 return wait_events(info, argp);
2431 case TIOCMIWAIT:
2432 return modem_input_wait(info,(int)arg);
2433 case TIOCGICOUNT:
2434 spin_lock_irqsave(&info->lock,flags);
2435 cnow = info->icount;
2436 spin_unlock_irqrestore(&info->lock,flags);
2437 p_cuser = argp;
2438 PUT_USER(error,cnow.cts, &p_cuser->cts);
2439 if (error) return error;
2440 PUT_USER(error,cnow.dsr, &p_cuser->dsr);
2441 if (error) return error;
2442 PUT_USER(error,cnow.rng, &p_cuser->rng);
2443 if (error) return error;
2444 PUT_USER(error,cnow.dcd, &p_cuser->dcd);
2445 if (error) return error;
2446 PUT_USER(error,cnow.rx, &p_cuser->rx);
2447 if (error) return error;
2448 PUT_USER(error,cnow.tx, &p_cuser->tx);
2449 if (error) return error;
2450 PUT_USER(error,cnow.frame, &p_cuser->frame);
2451 if (error) return error;
2452 PUT_USER(error,cnow.overrun, &p_cuser->overrun);
2453 if (error) return error;
2454 PUT_USER(error,cnow.parity, &p_cuser->parity);
2455 if (error) return error;
2456 PUT_USER(error,cnow.brk, &p_cuser->brk);
2457 if (error) return error;
2458 PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
2459 if (error) return error;
2460 return 0;
2461 default:
2462 return -ENOIOCTLCMD;
2463 }
2464 return 0;
2465 }
2466
2467 /* Set new termios settings
2468 *
2469 * Arguments:
2470 *
2471 * tty pointer to tty structure
2472 * termios pointer to buffer to hold returned old termios
2473 */
2474 static void mgslpc_set_termios(struct tty_struct *tty, struct termios *old_termios)
2475 {
2476 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2477 unsigned long flags;
2478
2479 if (debug_level >= DEBUG_LEVEL_INFO)
2480 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2481 tty->driver->name );
2482
2483 /* just return if nothing has changed */
2484 if ((tty->termios->c_cflag == old_termios->c_cflag)
2485 && (RELEVANT_IFLAG(tty->termios->c_iflag)
2486 == RELEVANT_IFLAG(old_termios->c_iflag)))
2487 return;
2488
2489 mgslpc_change_params(info);
2490
2491 /* Handle transition to B0 status */
2492 if (old_termios->c_cflag & CBAUD &&
2493 !(tty->termios->c_cflag & CBAUD)) {
2494 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2495 spin_lock_irqsave(&info->lock,flags);
2496 set_signals(info);
2497 spin_unlock_irqrestore(&info->lock,flags);
2498 }
2499
2500 /* Handle transition away from B0 status */
2501 if (!(old_termios->c_cflag & CBAUD) &&
2502 tty->termios->c_cflag & CBAUD) {
2503 info->serial_signals |= SerialSignal_DTR;
2504 if (!(tty->termios->c_cflag & CRTSCTS) ||
2505 !test_bit(TTY_THROTTLED, &tty->flags)) {
2506 info->serial_signals |= SerialSignal_RTS;
2507 }
2508 spin_lock_irqsave(&info->lock,flags);
2509 set_signals(info);
2510 spin_unlock_irqrestore(&info->lock,flags);
2511 }
2512
2513 /* Handle turning off CRTSCTS */
2514 if (old_termios->c_cflag & CRTSCTS &&
2515 !(tty->termios->c_cflag & CRTSCTS)) {
2516 tty->hw_stopped = 0;
2517 tx_release(tty);
2518 }
2519 }
2520
2521 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2522 {
2523 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2524
2525 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2526 return;
2527
2528 if (debug_level >= DEBUG_LEVEL_INFO)
2529 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2530 __FILE__,__LINE__, info->device_name, info->count);
2531
2532 if (!info->count)
2533 return;
2534
2535 if (tty_hung_up_p(filp))
2536 goto cleanup;
2537
2538 if ((tty->count == 1) && (info->count != 1)) {
2539 /*
2540 * tty->count is 1 and the tty structure will be freed.
2541 * info->count should be one in this case.
2542 * if it's not, correct it so that the port is shutdown.
2543 */
2544 printk("mgslpc_close: bad refcount; tty->count is 1, "
2545 "info->count is %d\n", info->count);
2546 info->count = 1;
2547 }
2548
2549 info->count--;
2550
2551 /* if at least one open remaining, leave hardware active */
2552 if (info->count)
2553 goto cleanup;
2554
2555 info->flags |= ASYNC_CLOSING;
2556
2557 /* set tty->closing to notify line discipline to
2558 * only process XON/XOFF characters. Only the N_TTY
2559 * discipline appears to use this (ppp does not).
2560 */
2561 tty->closing = 1;
2562
2563 /* wait for transmit data to clear all layers */
2564
2565 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
2566 if (debug_level >= DEBUG_LEVEL_INFO)
2567 printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
2568 __FILE__,__LINE__, info->device_name );
2569 tty_wait_until_sent(tty, info->closing_wait);
2570 }
2571
2572 if (info->flags & ASYNC_INITIALIZED)
2573 mgslpc_wait_until_sent(tty, info->timeout);
2574
2575 if (tty->driver->flush_buffer)
2576 tty->driver->flush_buffer(tty);
2577
2578 ldisc_flush_buffer(tty);
2579
2580 shutdown(info);
2581
2582 tty->closing = 0;
2583 info->tty = NULL;
2584
2585 if (info->blocked_open) {
2586 if (info->close_delay) {
2587 msleep_interruptible(jiffies_to_msecs(info->close_delay));
2588 }
2589 wake_up_interruptible(&info->open_wait);
2590 }
2591
2592 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
2593
2594 wake_up_interruptible(&info->close_wait);
2595
2596 cleanup:
2597 if (debug_level >= DEBUG_LEVEL_INFO)
2598 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2599 tty->driver->name, info->count);
2600 }
2601
2602 /* Wait until the transmitter is empty.
2603 */
2604 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2605 {
2606 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2607 unsigned long orig_jiffies, char_time;
2608
2609 if (!info )
2610 return;
2611
2612 if (debug_level >= DEBUG_LEVEL_INFO)
2613 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2614 __FILE__,__LINE__, info->device_name );
2615
2616 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2617 return;
2618
2619 if (!(info->flags & ASYNC_INITIALIZED))
2620 goto exit;
2621
2622 orig_jiffies = jiffies;
2623
2624 /* Set check interval to 1/5 of estimated time to
2625 * send a character, and make it at least 1. The check
2626 * interval should also be less than the timeout.
2627 * Note: use tight timings here to satisfy the NIST-PCTS.
2628 */
2629
2630 if ( info->params.data_rate ) {
2631 char_time = info->timeout/(32 * 5);
2632 if (!char_time)
2633 char_time++;
2634 } else
2635 char_time = 1;
2636
2637 if (timeout)
2638 char_time = min_t(unsigned long, char_time, timeout);
2639
2640 if (info->params.mode == MGSL_MODE_HDLC) {
2641 while (info->tx_active) {
2642 msleep_interruptible(jiffies_to_msecs(char_time));
2643 if (signal_pending(current))
2644 break;
2645 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2646 break;
2647 }
2648 } else {
2649 while ((info->tx_count || info->tx_active) &&
2650 info->tx_enabled) {
2651 msleep_interruptible(jiffies_to_msecs(char_time));
2652 if (signal_pending(current))
2653 break;
2654 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2655 break;
2656 }
2657 }
2658
2659 exit:
2660 if (debug_level >= DEBUG_LEVEL_INFO)
2661 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2662 __FILE__,__LINE__, info->device_name );
2663 }
2664
2665 /* Called by tty_hangup() when a hangup is signaled.
2666 * This is the same as closing all open files for the port.
2667 */
2668 static void mgslpc_hangup(struct tty_struct *tty)
2669 {
2670 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2671
2672 if (debug_level >= DEBUG_LEVEL_INFO)
2673 printk("%s(%d):mgslpc_hangup(%s)\n",
2674 __FILE__,__LINE__, info->device_name );
2675
2676 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2677 return;
2678
2679 mgslpc_flush_buffer(tty);
2680 shutdown(info);
2681
2682 info->count = 0;
2683 info->flags &= ~ASYNC_NORMAL_ACTIVE;
2684 info->tty = NULL;
2685
2686 wake_up_interruptible(&info->open_wait);
2687 }
2688
2689 /* Block the current process until the specified port
2690 * is ready to be opened.
2691 */
2692 static int block_til_ready(struct tty_struct *tty, struct file *filp,
2693 MGSLPC_INFO *info)
2694 {
2695 DECLARE_WAITQUEUE(wait, current);
2696 int retval;
2697 int do_clocal = 0, extra_count = 0;
2698 unsigned long flags;
2699
2700 if (debug_level >= DEBUG_LEVEL_INFO)
2701 printk("%s(%d):block_til_ready on %s\n",
2702 __FILE__,__LINE__, tty->driver->name );
2703
2704 if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
2705 /* nonblock mode is set or port is not enabled */
2706 /* just verify that callout device is not active */
2707 info->flags |= ASYNC_NORMAL_ACTIVE;
2708 return 0;
2709 }
2710
2711 if (tty->termios->c_cflag & CLOCAL)
2712 do_clocal = 1;
2713
2714 /* Wait for carrier detect and the line to become
2715 * free (i.e., not in use by the callout). While we are in
2716 * this loop, info->count is dropped by one, so that
2717 * mgslpc_close() knows when to free things. We restore it upon
2718 * exit, either normal or abnormal.
2719 */
2720
2721 retval = 0;
2722 add_wait_queue(&info->open_wait, &wait);
2723
2724 if (debug_level >= DEBUG_LEVEL_INFO)
2725 printk("%s(%d):block_til_ready before block on %s count=%d\n",
2726 __FILE__,__LINE__, tty->driver->name, info->count );
2727
2728 spin_lock_irqsave(&info->lock, flags);
2729 if (!tty_hung_up_p(filp)) {
2730 extra_count = 1;
2731 info->count--;
2732 }
2733 spin_unlock_irqrestore(&info->lock, flags);
2734 info->blocked_open++;
2735
2736 while (1) {
2737 if ((tty->termios->c_cflag & CBAUD)) {
2738 spin_lock_irqsave(&info->lock,flags);
2739 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2740 set_signals(info);
2741 spin_unlock_irqrestore(&info->lock,flags);
2742 }
2743
2744 set_current_state(TASK_INTERRUPTIBLE);
2745
2746 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
2747 retval = (info->flags & ASYNC_HUP_NOTIFY) ?
2748 -EAGAIN : -ERESTARTSYS;
2749 break;
2750 }
2751
2752 spin_lock_irqsave(&info->lock,flags);
2753 get_signals(info);
2754 spin_unlock_irqrestore(&info->lock,flags);
2755
2756 if (!(info->flags & ASYNC_CLOSING) &&
2757 (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
2758 break;
2759 }
2760
2761 if (signal_pending(current)) {
2762 retval = -ERESTARTSYS;
2763 break;
2764 }
2765
2766 if (debug_level >= DEBUG_LEVEL_INFO)
2767 printk("%s(%d):block_til_ready blocking on %s count=%d\n",
2768 __FILE__,__LINE__, tty->driver->name, info->count );
2769
2770 schedule();
2771 }
2772
2773 set_current_state(TASK_RUNNING);
2774 remove_wait_queue(&info->open_wait, &wait);
2775
2776 if (extra_count)
2777 info->count++;
2778 info->blocked_open--;
2779
2780 if (debug_level >= DEBUG_LEVEL_INFO)
2781 printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
2782 __FILE__,__LINE__, tty->driver->name, info->count );
2783
2784 if (!retval)
2785 info->flags |= ASYNC_NORMAL_ACTIVE;
2786
2787 return retval;
2788 }
2789
2790 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2791 {
2792 MGSLPC_INFO *info;
2793 int retval, line;
2794 unsigned long flags;
2795
2796 /* verify range of specified line number */
2797 line = tty->index;
2798 if ((line < 0) || (line >= mgslpc_device_count)) {
2799 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2800 __FILE__,__LINE__,line);
2801 return -ENODEV;
2802 }
2803
2804 /* find the info structure for the specified line */
2805 info = mgslpc_device_list;
2806 while(info && info->line != line)
2807 info = info->next_device;
2808 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2809 return -ENODEV;
2810
2811 tty->driver_data = info;
2812 info->tty = tty;
2813
2814 if (debug_level >= DEBUG_LEVEL_INFO)
2815 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2816 __FILE__,__LINE__,tty->driver->name, info->count);
2817
2818 /* If port is closing, signal caller to try again */
2819 if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
2820 if (info->flags & ASYNC_CLOSING)
2821 interruptible_sleep_on(&info->close_wait);
2822 retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
2823 -EAGAIN : -ERESTARTSYS);
2824 goto cleanup;
2825 }
2826
2827 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2828
2829 spin_lock_irqsave(&info->netlock, flags);
2830 if (info->netcount) {
2831 retval = -EBUSY;
2832 spin_unlock_irqrestore(&info->netlock, flags);
2833 goto cleanup;
2834 }
2835 info->count++;
2836 spin_unlock_irqrestore(&info->netlock, flags);
2837
2838 if (info->count == 1) {
2839 /* 1st open on this device, init hardware */
2840 retval = startup(info);
2841 if (retval < 0)
2842 goto cleanup;
2843 }
2844
2845 retval = block_til_ready(tty, filp, info);
2846 if (retval) {
2847 if (debug_level >= DEBUG_LEVEL_INFO)
2848 printk("%s(%d):block_til_ready(%s) returned %d\n",
2849 __FILE__,__LINE__, info->device_name, retval);
2850 goto cleanup;
2851 }
2852
2853 if (debug_level >= DEBUG_LEVEL_INFO)
2854 printk("%s(%d):mgslpc_open(%s) success\n",
2855 __FILE__,__LINE__, info->device_name);
2856 retval = 0;
2857
2858 cleanup:
2859 if (retval) {
2860 if (tty->count == 1)
2861 info->tty = NULL; /* tty layer will release tty struct */
2862 if(info->count)
2863 info->count--;
2864 }
2865
2866 return retval;
2867 }
2868
2869 /*
2870 * /proc fs routines....
2871 */
2872
2873 static inline int line_info(char *buf, MGSLPC_INFO *info)
2874 {
2875 char stat_buf[30];
2876 int ret;
2877 unsigned long flags;
2878
2879 ret = sprintf(buf, "%s:io:%04X irq:%d",
2880 info->device_name, info->io_base, info->irq_level);
2881
2882 /* output current serial signal states */
2883 spin_lock_irqsave(&info->lock,flags);
2884 get_signals(info);
2885 spin_unlock_irqrestore(&info->lock,flags);
2886
2887 stat_buf[0] = 0;
2888 stat_buf[1] = 0;
2889 if (info->serial_signals & SerialSignal_RTS)
2890 strcat(stat_buf, "|RTS");
2891 if (info->serial_signals & SerialSignal_CTS)
2892 strcat(stat_buf, "|CTS");
2893 if (info->serial_signals & SerialSignal_DTR)
2894 strcat(stat_buf, "|DTR");
2895 if (info->serial_signals & SerialSignal_DSR)
2896 strcat(stat_buf, "|DSR");
2897 if (info->serial_signals & SerialSignal_DCD)
2898 strcat(stat_buf, "|CD");
2899 if (info->serial_signals & SerialSignal_RI)
2900 strcat(stat_buf, "|RI");
2901
2902 if (info->params.mode == MGSL_MODE_HDLC) {
2903 ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
2904 info->icount.txok, info->icount.rxok);
2905 if (info->icount.txunder)
2906 ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
2907 if (info->icount.txabort)
2908 ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
2909 if (info->icount.rxshort)
2910 ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
2911 if (info->icount.rxlong)
2912 ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
2913 if (info->icount.rxover)
2914 ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
2915 if (info->icount.rxcrc)
2916 ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
2917 } else {
2918 ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
2919 info->icount.tx, info->icount.rx);
2920 if (info->icount.frame)
2921 ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
2922 if (info->icount.parity)
2923 ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
2924 if (info->icount.brk)
2925 ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
2926 if (info->icount.overrun)
2927 ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
2928 }
2929
2930 /* Append serial signal status to end */
2931 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2932
2933 ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2934 info->tx_active,info->bh_requested,info->bh_running,
2935 info->pending_bh);
2936
2937 return ret;
2938 }
2939
2940 /* Called to print information about devices
2941 */
2942 static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
2943 int *eof, void *data)
2944 {
2945 int len = 0, l;
2946 off_t begin = 0;
2947 MGSLPC_INFO *info;
2948
2949 len += sprintf(page, "synclink driver:%s\n", driver_version);
2950
2951 info = mgslpc_device_list;
2952 while( info ) {
2953 l = line_info(page + len, info);
2954 len += l;
2955 if (len+begin > off+count)
2956 goto done;
2957 if (len+begin < off) {
2958 begin += len;
2959 len = 0;
2960 }
2961 info = info->next_device;
2962 }
2963
2964 *eof = 1;
2965 done:
2966 if (off >= len+begin)
2967 return 0;
2968 *start = page + (off-begin);
2969 return ((count < begin+len-off) ? count : begin+len-off);
2970 }
2971
2972 int rx_alloc_buffers(MGSLPC_INFO *info)
2973 {
2974 /* each buffer has header and data */
2975 info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2976
2977 /* calculate total allocation size for 8 buffers */
2978 info->rx_buf_total_size = info->rx_buf_size * 8;
2979
2980 /* limit total allocated memory */
2981 if (info->rx_buf_total_size > 0x10000)
2982 info->rx_buf_total_size = 0x10000;
2983
2984 /* calculate number of buffers */
2985 info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2986
2987 info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2988 if (info->rx_buf == NULL)
2989 return -ENOMEM;
2990
2991 rx_reset_buffers(info);
2992 return 0;
2993 }
2994
2995 void rx_free_buffers(MGSLPC_INFO *info)
2996 {
2997 if (info->rx_buf)
2998 kfree(info->rx_buf);
2999 info->rx_buf = NULL;
3000 }
3001
3002 int claim_resources(MGSLPC_INFO *info)
3003 {
3004 if (rx_alloc_buffers(info) < 0 ) {
3005 printk( "Cant allocate rx buffer %s\n", info->device_name);
3006 release_resources(info);
3007 return -ENODEV;
3008 }
3009 return 0;
3010 }
3011
3012 void release_resources(MGSLPC_INFO *info)
3013 {
3014 if (debug_level >= DEBUG_LEVEL_INFO)
3015 printk("release_resources(%s)\n", info->device_name);
3016 rx_free_buffers(info);
3017 }
3018
3019 /* Add the specified device instance data structure to the
3020 * global linked list of devices and increment the device count.
3021 *
3022 * Arguments: info pointer to device instance data
3023 */
3024 void mgslpc_add_device(MGSLPC_INFO *info)
3025 {
3026 info->next_device = NULL;
3027 info->line = mgslpc_device_count;
3028 sprintf(info->device_name,"ttySLP%d",info->line);
3029
3030 if (info->line < MAX_DEVICE_COUNT) {
3031 if (maxframe[info->line])
3032 info->max_frame_size = maxframe[info->line];
3033 info->dosyncppp = dosyncppp[info->line];
3034 }
3035
3036 mgslpc_device_count++;
3037
3038 if (!mgslpc_device_list)
3039 mgslpc_device_list = info;
3040 else {
3041 MGSLPC_INFO *current_dev = mgslpc_device_list;
3042 while( current_dev->next_device )
3043 current_dev = current_dev->next_device;
3044 current_dev->next_device = info;
3045 }
3046
3047 if (info->max_frame_size < 4096)
3048 info->max_frame_size = 4096;
3049 else if (info->max_frame_size > 65535)
3050 info->max_frame_size = 65535;
3051
3052 printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
3053 info->device_name, info->io_base, info->irq_level);
3054
3055 #ifdef CONFIG_HDLC
3056 hdlcdev_init(info);
3057 #endif
3058 }
3059
3060 void mgslpc_remove_device(MGSLPC_INFO *remove_info)
3061 {
3062 MGSLPC_INFO *info = mgslpc_device_list;
3063 MGSLPC_INFO *last = NULL;
3064
3065 while(info) {
3066 if (info == remove_info) {
3067 if (last)
3068 last->next_device = info->next_device;
3069 else
3070 mgslpc_device_list = info->next_device;
3071 #ifdef CONFIG_HDLC
3072 hdlcdev_exit(info);
3073 #endif
3074 release_resources(info);
3075 kfree(info);
3076 mgslpc_device_count--;
3077 return;
3078 }
3079 last = info;
3080 info = info->next_device;
3081 }
3082 }
3083
3084 static struct pcmcia_device_id mgslpc_ids[] = {
3085 PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
3086 PCMCIA_DEVICE_NULL
3087 };
3088 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
3089
3090 static struct pcmcia_driver mgslpc_driver = {
3091 .owner = THIS_MODULE,
3092 .drv = {
3093 .name = "synclink_cs",
3094 },
3095 .attach = mgslpc_attach,
3096 .event = mgslpc_event,
3097 .detach = mgslpc_detach,
3098 .id_table = mgslpc_ids,
3099 };
3100
3101 static struct tty_operations mgslpc_ops = {
3102 .open = mgslpc_open,
3103 .close = mgslpc_close,
3104 .write = mgslpc_write,
3105 .put_char = mgslpc_put_char,
3106 .flush_chars = mgslpc_flush_chars,
3107 .write_room = mgslpc_write_room,
3108 .chars_in_buffer = mgslpc_chars_in_buffer,
3109 .flush_buffer = mgslpc_flush_buffer,
3110 .ioctl = mgslpc_ioctl,
3111 .throttle = mgslpc_throttle,
3112 .unthrottle = mgslpc_unthrottle,
3113 .send_xchar = mgslpc_send_xchar,
3114 .break_ctl = mgslpc_break,
3115 .wait_until_sent = mgslpc_wait_until_sent,
3116 .read_proc = mgslpc_read_proc,
3117 .set_termios = mgslpc_set_termios,
3118 .stop = tx_pause,
3119 .start = tx_release,
3120 .hangup = mgslpc_hangup,
3121 .tiocmget = tiocmget,
3122 .tiocmset = tiocmset,
3123 };
3124
3125 static void synclink_cs_cleanup(void)
3126 {
3127 int rc;
3128
3129 printk("Unloading %s: version %s\n", driver_name, driver_version);
3130
3131 while(mgslpc_device_list)
3132 mgslpc_remove_device(mgslpc_device_list);
3133
3134 if (serial_driver) {
3135 if ((rc = tty_unregister_driver(serial_driver)))
3136 printk("%s(%d) failed to unregister tty driver err=%d\n",
3137 __FILE__,__LINE__,rc);
3138 put_tty_driver(serial_driver);
3139 }
3140
3141 pcmcia_unregister_driver(&mgslpc_driver);
3142 BUG_ON(dev_list != NULL);
3143 }
3144
3145 static int __init synclink_cs_init(void)
3146 {
3147 int rc;
3148
3149 if (break_on_load) {
3150 mgslpc_get_text_ptr();
3151 BREAKPOINT();
3152 }
3153
3154 printk("%s %s\n", driver_name, driver_version);
3155
3156 if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
3157 return rc;
3158
3159 serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
3160 if (!serial_driver) {
3161 rc = -ENOMEM;
3162 goto error;
3163 }
3164
3165 /* Initialize the tty_driver structure */
3166
3167 serial_driver->owner = THIS_MODULE;
3168 serial_driver->driver_name = "synclink_cs";
3169 serial_driver->name = "ttySLP";
3170 serial_driver->major = ttymajor;
3171 serial_driver->minor_start = 64;
3172 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
3173 serial_driver->subtype = SERIAL_TYPE_NORMAL;
3174 serial_driver->init_termios = tty_std_termios;
3175 serial_driver->init_termios.c_cflag =
3176 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
3177 serial_driver->flags = TTY_DRIVER_REAL_RAW;
3178 tty_set_operations(serial_driver, &mgslpc_ops);
3179
3180 if ((rc = tty_register_driver(serial_driver)) < 0) {
3181 printk("%s(%d):Couldn't register serial driver\n",
3182 __FILE__,__LINE__);
3183 put_tty_driver(serial_driver);
3184 serial_driver = NULL;
3185 goto error;
3186 }
3187
3188 printk("%s %s, tty major#%d\n",
3189 driver_name, driver_version,
3190 serial_driver->major);
3191
3192 return 0;
3193
3194 error:
3195 synclink_cs_cleanup();
3196 return rc;
3197 }
3198
3199 static void __exit synclink_cs_exit(void)
3200 {
3201 synclink_cs_cleanup();
3202 }
3203
3204 module_init(synclink_cs_init);
3205 module_exit(synclink_cs_exit);
3206
3207 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
3208 {
3209 unsigned int M, N;
3210 unsigned char val;
3211
3212 /* note:standard BRG mode is broken in V3.2 chip
3213 * so enhanced mode is always used
3214 */
3215
3216 if (rate) {
3217 N = 3686400 / rate;
3218 if (!N)
3219 N = 1;
3220 N >>= 1;
3221 for (M = 1; N > 64 && M < 16; M++)
3222 N >>= 1;
3223 N--;
3224
3225 /* BGR[5..0] = N
3226 * BGR[9..6] = M
3227 * BGR[7..0] contained in BGR register
3228 * BGR[9..8] contained in CCR2[7..6]
3229 * divisor = (N+1)*2^M
3230 *
3231 * Note: M *must* not be zero (causes asymetric duty cycle)
3232 */
3233 write_reg(info, (unsigned char) (channel + BGR),
3234 (unsigned char) ((M << 6) + N));
3235 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
3236 val |= ((M << 4) & 0xc0);
3237 write_reg(info, (unsigned char) (channel + CCR2), val);
3238 }
3239 }
3240
3241 /* Enabled the AUX clock output at the specified frequency.
3242 */
3243 static void enable_auxclk(MGSLPC_INFO *info)
3244 {
3245 unsigned char val;
3246
3247 /* MODE
3248 *
3249 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3250 * 05 ADM Address Mode, 0 = no addr recognition
3251 * 04 TMD Timer Mode, 0 = external
3252 * 03 RAC Receiver Active, 0 = inactive
3253 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3254 * 01 TRS Timer Resolution, 1=512
3255 * 00 TLP Test Loop, 0 = no loop
3256 *
3257 * 1000 0010
3258 */
3259 val = 0x82;
3260
3261 /* channel B RTS is used to enable AUXCLK driver on SP505 */
3262 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3263 val |= BIT2;
3264 write_reg(info, CHB + MODE, val);
3265
3266 /* CCR0
3267 *
3268 * 07 PU Power Up, 1=active, 0=power down
3269 * 06 MCE Master Clock Enable, 1=enabled
3270 * 05 Reserved, 0
3271 * 04..02 SC[2..0] Encoding
3272 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3273 *
3274 * 11000000
3275 */
3276 write_reg(info, CHB + CCR0, 0xc0);
3277
3278 /* CCR1
3279 *
3280 * 07 SFLG Shared Flag, 0 = disable shared flags
3281 * 06 GALP Go Active On Loop, 0 = not used
3282 * 05 GLP Go On Loop, 0 = not used
3283 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3284 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3285 * 02..00 CM[2..0] Clock Mode
3286 *
3287 * 0001 0111
3288 */
3289 write_reg(info, CHB + CCR1, 0x17);
3290
3291 /* CCR2 (Channel B)
3292 *
3293 * 07..06 BGR[9..8] Baud rate bits 9..8
3294 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3295 * 04 SSEL Clock source select, 1=submode b
3296 * 03 TOE 0=TxCLK is input, 1=TxCLK is output
3297 * 02 RWX Read/Write Exchange 0=disabled
3298 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3299 * 00 DIV, data inversion 0=disabled, 1=enabled
3300 *
3301 * 0011 1000
3302 */
3303 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3304 write_reg(info, CHB + CCR2, 0x38);
3305 else
3306 write_reg(info, CHB + CCR2, 0x30);
3307
3308 /* CCR4
3309 *
3310 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3311 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3312 * 05 TST1 Test Pin, 0=normal operation
3313 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3314 * 03..02 Reserved, must be 0
3315 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3316 *
3317 * 0101 0000
3318 */
3319 write_reg(info, CHB + CCR4, 0x50);
3320
3321 /* if auxclk not enabled, set internal BRG so
3322 * CTS transitions can be detected (requires TxC)
3323 */
3324 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3325 mgslpc_set_rate(info, CHB, info->params.clock_speed);
3326 else
3327 mgslpc_set_rate(info, CHB, 921600);
3328 }
3329
3330 static void loopback_enable(MGSLPC_INFO *info)
3331 {
3332 unsigned char val;
3333
3334 /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
3335 val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3336 write_reg(info, CHA + CCR1, val);
3337
3338 /* CCR2:04 SSEL Clock source select, 1=submode b */
3339 val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3340 write_reg(info, CHA + CCR2, val);
3341
3342 /* set LinkSpeed if available, otherwise default to 2Mbps */
3343 if (info->params.clock_speed)
3344 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3345 else
3346 mgslpc_set_rate(info, CHA, 1843200);
3347
3348 /* MODE:00 TLP Test Loop, 1=loopback enabled */
3349 val = read_reg(info, CHA + MODE) | BIT0;
3350 write_reg(info, CHA + MODE, val);
3351 }
3352
3353 void hdlc_mode(MGSLPC_INFO *info)
3354 {
3355 unsigned char val;
3356 unsigned char clkmode, clksubmode;
3357
3358 /* disable all interrupts */
3359 irq_disable(info, CHA, 0xffff);
3360 irq_disable(info, CHB, 0xffff);
3361 port_irq_disable(info, 0xff);
3362
3363 /* assume clock mode 0a, rcv=RxC xmt=TxC */
3364 clkmode = clksubmode = 0;
3365 if (info->params.flags & HDLC_FLAG_RXC_DPLL
3366 && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3367 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3368 clkmode = 7;
3369 } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3370 && info->params.flags & HDLC_FLAG_TXC_BRG) {
3371 /* clock mode 7b, rcv = BRG, xmt = BRG */
3372 clkmode = 7;
3373 clksubmode = 1;
3374 } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3375 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3376 /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3377 clkmode = 6;
3378 clksubmode = 1;
3379 } else {
3380 /* clock mode 6a, rcv = DPLL, xmt = TxC */
3381 clkmode = 6;
3382 }
3383 } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3384 /* clock mode 0b, rcv = RxC, xmt = BRG */
3385 clksubmode = 1;
3386 }
3387
3388 /* MODE
3389 *
3390 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3391 * 05 ADM Address Mode, 0 = no addr recognition
3392 * 04 TMD Timer Mode, 0 = external
3393 * 03 RAC Receiver Active, 0 = inactive
3394 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3395 * 01 TRS Timer Resolution, 1=512
3396 * 00 TLP Test Loop, 0 = no loop
3397 *
3398 * 1000 0010
3399 */
3400 val = 0x82;
3401 if (info->params.loopback)
3402 val |= BIT0;
3403
3404 /* preserve RTS state */
3405 if (info->serial_signals & SerialSignal_RTS)
3406 val |= BIT2;
3407 write_reg(info, CHA + MODE, val);
3408
3409 /* CCR0
3410 *
3411 * 07 PU Power Up, 1=active, 0=power down
3412 * 06 MCE Master Clock Enable, 1=enabled
3413 * 05 Reserved, 0
3414 * 04..02 SC[2..0] Encoding
3415 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3416 *
3417 * 11000000
3418 */
3419 val = 0xc0;
3420 switch (info->params.encoding)
3421 {
3422 case HDLC_ENCODING_NRZI:
3423 val |= BIT3;
3424 break;
3425 case HDLC_ENCODING_BIPHASE_SPACE:
3426 val |= BIT4;
3427 break; // FM0
3428 case HDLC_ENCODING_BIPHASE_MARK:
3429 val |= BIT4 + BIT2;
3430 break; // FM1
3431 case HDLC_ENCODING_BIPHASE_LEVEL:
3432 val |= BIT4 + BIT3;
3433 break; // Manchester
3434 }
3435 write_reg(info, CHA + CCR0, val);
3436
3437 /* CCR1
3438 *
3439 * 07 SFLG Shared Flag, 0 = disable shared flags
3440 * 06 GALP Go Active On Loop, 0 = not used
3441 * 05 GLP Go On Loop, 0 = not used
3442 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3443 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3444 * 02..00 CM[2..0] Clock Mode
3445 *
3446 * 0001 0000
3447 */
3448 val = 0x10 + clkmode;
3449 write_reg(info, CHA + CCR1, val);
3450
3451 /* CCR2
3452 *
3453 * 07..06 BGR[9..8] Baud rate bits 9..8
3454 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3455 * 04 SSEL Clock source select, 1=submode b
3456 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3457 * 02 RWX Read/Write Exchange 0=disabled
3458 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3459 * 00 DIV, data inversion 0=disabled, 1=enabled
3460 *
3461 * 0000 0000
3462 */
3463 val = 0x00;
3464 if (clkmode == 2 || clkmode == 3 || clkmode == 6
3465 || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3466 val |= BIT5;
3467 if (clksubmode)
3468 val |= BIT4;
3469 if (info->params.crc_type == HDLC_CRC_32_CCITT)
3470 val |= BIT1;
3471 if (info->params.encoding == HDLC_ENCODING_NRZB)
3472 val |= BIT0;
3473 write_reg(info, CHA + CCR2, val);
3474
3475 /* CCR3
3476 *
3477 * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3478 * 05 EPT Enable preamble transmission, 1=enabled
3479 * 04 RADD Receive address pushed to FIFO, 0=disabled
3480 * 03 CRL CRC Reset Level, 0=FFFF
3481 * 02 RCRC Rx CRC 0=On 1=Off
3482 * 01 TCRC Tx CRC 0=On 1=Off
3483 * 00 PSD DPLL Phase Shift Disable
3484 *
3485 * 0000 0000
3486 */
3487 val = 0x00;
3488 if (info->params.crc_type == HDLC_CRC_NONE)
3489 val |= BIT2 + BIT1;
3490 if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3491 val |= BIT5;
3492 switch (info->params.preamble_length)
3493 {
3494 case HDLC_PREAMBLE_LENGTH_16BITS:
3495 val |= BIT6;
3496 break;
3497 case HDLC_PREAMBLE_LENGTH_32BITS:
3498 val |= BIT6;
3499 break;
3500 case HDLC_PREAMBLE_LENGTH_64BITS:
3501 val |= BIT7 + BIT6;
3502 break;
3503 }
3504 write_reg(info, CHA + CCR3, val);
3505
3506 /* PRE - Preamble pattern */
3507 val = 0;
3508 switch (info->params.preamble)
3509 {
3510 case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3511 case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
3512 case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
3513 case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
3514 }
3515 write_reg(info, CHA + PRE, val);
3516
3517 /* CCR4
3518 *
3519 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3520 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3521 * 05 TST1 Test Pin, 0=normal operation
3522 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3523 * 03..02 Reserved, must be 0
3524 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3525 *
3526 * 0101 0000
3527 */
3528 val = 0x50;
3529 write_reg(info, CHA + CCR4, val);
3530 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3531 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3532 else
3533 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3534
3535 /* RLCR Receive length check register
3536 *
3537 * 7 1=enable receive length check
3538 * 6..0 Max frame length = (RL + 1) * 32
3539 */
3540 write_reg(info, CHA + RLCR, 0);
3541
3542 /* XBCH Transmit Byte Count High
3543 *
3544 * 07 DMA mode, 0 = interrupt driven
3545 * 06 NRM, 0=ABM (ignored)
3546 * 05 CAS Carrier Auto Start
3547 * 04 XC Transmit Continuously (ignored)
3548 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3549 *
3550 * 0000 0000
3551 */
3552 val = 0x00;
3553 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3554 val |= BIT5;
3555 write_reg(info, CHA + XBCH, val);
3556 enable_auxclk(info);
3557 if (info->params.loopback || info->testing_irq)
3558 loopback_enable(info);
3559 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3560 {
3561 irq_enable(info, CHB, IRQ_CTS);
3562 /* PVR[3] 1=AUTO CTS active */
3563 set_reg_bits(info, CHA + PVR, BIT3);
3564 } else
3565 clear_reg_bits(info, CHA + PVR, BIT3);
3566
3567 irq_enable(info, CHA,
3568 IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3569 IRQ_UNDERRUN + IRQ_TXFIFO);
3570 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3571 wait_command_complete(info, CHA);
3572 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3573
3574 /* Master clock mode enabled above to allow reset commands
3575 * to complete even if no data clocks are present.
3576 *
3577 * Disable master clock mode for normal communications because
3578 * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3579 * IRQ when in master clock mode.
3580 *
3581 * Leave master clock mode enabled for IRQ test because the
3582 * timer IRQ used by the test can only happen in master clock mode.
3583 */
3584 if (!info->testing_irq)
3585 clear_reg_bits(info, CHA + CCR0, BIT6);
3586
3587 tx_set_idle(info);
3588
3589 tx_stop(info);
3590 rx_stop(info);
3591 }
3592
3593 void rx_stop(MGSLPC_INFO *info)
3594 {
3595 if (debug_level >= DEBUG_LEVEL_ISR)
3596 printk("%s(%d):rx_stop(%s)\n",
3597 __FILE__,__LINE__, info->device_name );
3598
3599 /* MODE:03 RAC Receiver Active, 0=inactive */
3600 clear_reg_bits(info, CHA + MODE, BIT3);
3601
3602 info->rx_enabled = 0;
3603 info->rx_overflow = 0;
3604 }
3605
3606 void rx_start(MGSLPC_INFO *info)
3607 {
3608 if (debug_level >= DEBUG_LEVEL_ISR)
3609 printk("%s(%d):rx_start(%s)\n",
3610 __FILE__,__LINE__, info->device_name );
3611
3612 rx_reset_buffers(info);
3613 info->rx_enabled = 0;
3614 info->rx_overflow = 0;
3615
3616 /* MODE:03 RAC Receiver Active, 1=active */
3617 set_reg_bits(info, CHA + MODE, BIT3);
3618
3619 info->rx_enabled = 1;
3620 }
3621
3622 void tx_start(MGSLPC_INFO *info)
3623 {
3624 if (debug_level >= DEBUG_LEVEL_ISR)
3625 printk("%s(%d):tx_start(%s)\n",
3626 __FILE__,__LINE__, info->device_name );
3627
3628 if (info->tx_count) {
3629 /* If auto RTS enabled and RTS is inactive, then assert */
3630 /* RTS and set a flag indicating that the driver should */
3631 /* negate RTS when the transmission completes. */
3632 info->drop_rts_on_tx_done = 0;
3633
3634 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3635 get_signals(info);
3636 if (!(info->serial_signals & SerialSignal_RTS)) {
3637 info->serial_signals |= SerialSignal_RTS;
3638 set_signals(info);
3639 info->drop_rts_on_tx_done = 1;
3640 }
3641 }
3642
3643 if (info->params.mode == MGSL_MODE_ASYNC) {
3644 if (!info->tx_active) {
3645 info->tx_active = 1;
3646 tx_ready(info);
3647 }
3648 } else {
3649 info->tx_active = 1;
3650 tx_ready(info);
3651 info->tx_timer.expires = jiffies + msecs_to_jiffies(5000);
3652 add_timer(&info->tx_timer);
3653 }
3654 }
3655
3656 if (!info->tx_enabled)
3657 info->tx_enabled = 1;
3658 }
3659
3660 void tx_stop(MGSLPC_INFO *info)
3661 {
3662 if (debug_level >= DEBUG_LEVEL_ISR)
3663 printk("%s(%d):tx_stop(%s)\n",
3664 __FILE__,__LINE__, info->device_name );
3665
3666 del_timer(&info->tx_timer);
3667
3668 info->tx_enabled = 0;
3669 info->tx_active = 0;
3670 }
3671
3672 /* Reset the adapter to a known state and prepare it for further use.
3673 */
3674 void reset_device(MGSLPC_INFO *info)
3675 {
3676 /* power up both channels (set BIT7) */
3677 write_reg(info, CHA + CCR0, 0x80);
3678 write_reg(info, CHB + CCR0, 0x80);
3679 write_reg(info, CHA + MODE, 0);
3680 write_reg(info, CHB + MODE, 0);
3681
3682 /* disable all interrupts */
3683 irq_disable(info, CHA, 0xffff);
3684 irq_disable(info, CHB, 0xffff);
3685 port_irq_disable(info, 0xff);
3686
3687 /* PCR Port Configuration Register
3688 *
3689 * 07..04 DEC[3..0] Serial I/F select outputs
3690 * 03 output, 1=AUTO CTS control enabled
3691 * 02 RI Ring Indicator input 0=active
3692 * 01 DSR input 0=active
3693 * 00 DTR output 0=active
3694 *
3695 * 0000 0110
3696 */
3697 write_reg(info, PCR, 0x06);
3698
3699 /* PVR Port Value Register
3700 *
3701 * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
3702 * 03 AUTO CTS output 1=enabled
3703 * 02 RI Ring Indicator input
3704 * 01 DSR input
3705 * 00 DTR output (1=inactive)
3706 *
3707 * 0000 0001
3708 */
3709 // write_reg(info, PVR, PVR_DTR);
3710
3711 /* IPC Interrupt Port Configuration
3712 *
3713 * 07 VIS 1=Masked interrupts visible
3714 * 06..05 Reserved, 0
3715 * 04..03 SLA Slave address, 00 ignored
3716 * 02 CASM Cascading Mode, 1=daisy chain
3717 * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
3718 *
3719 * 0000 0101
3720 */
3721 write_reg(info, IPC, 0x05);
3722 }
3723
3724 void async_mode(MGSLPC_INFO *info)
3725 {
3726 unsigned char val;
3727
3728 /* disable all interrupts */
3729 irq_disable(info, CHA, 0xffff);
3730 irq_disable(info, CHB, 0xffff);
3731 port_irq_disable(info, 0xff);
3732
3733 /* MODE
3734 *
3735 * 07 Reserved, 0
3736 * 06 FRTS RTS State, 0=active
3737 * 05 FCTS Flow Control on CTS
3738 * 04 FLON Flow Control Enable
3739 * 03 RAC Receiver Active, 0 = inactive
3740 * 02 RTS 0=Auto RTS, 1=manual RTS
3741 * 01 TRS Timer Resolution, 1=512
3742 * 00 TLP Test Loop, 0 = no loop
3743 *
3744 * 0000 0110
3745 */
3746 val = 0x06;
3747 if (info->params.loopback)
3748 val |= BIT0;
3749
3750 /* preserve RTS state */
3751 if (!(info->serial_signals & SerialSignal_RTS))
3752 val |= BIT6;
3753 write_reg(info, CHA + MODE, val);
3754
3755 /* CCR0
3756 *
3757 * 07 PU Power Up, 1=active, 0=power down
3758 * 06 MCE Master Clock Enable, 1=enabled
3759 * 05 Reserved, 0
3760 * 04..02 SC[2..0] Encoding, 000=NRZ
3761 * 01..00 SM[1..0] Serial Mode, 11=Async
3762 *
3763 * 1000 0011
3764 */
3765 write_reg(info, CHA + CCR0, 0x83);
3766
3767 /* CCR1
3768 *
3769 * 07..05 Reserved, 0
3770 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3771 * 03 BCR Bit Clock Rate, 1=16x
3772 * 02..00 CM[2..0] Clock Mode, 111=BRG
3773 *
3774 * 0001 1111
3775 */
3776 write_reg(info, CHA + CCR1, 0x1f);
3777
3778 /* CCR2 (channel A)
3779 *
3780 * 07..06 BGR[9..8] Baud rate bits 9..8
3781 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3782 * 04 SSEL Clock source select, 1=submode b
3783 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3784 * 02 RWX Read/Write Exchange 0=disabled
3785 * 01 Reserved, 0
3786 * 00 DIV, data inversion 0=disabled, 1=enabled
3787 *
3788 * 0001 0000
3789 */
3790 write_reg(info, CHA + CCR2, 0x10);
3791
3792 /* CCR3
3793 *
3794 * 07..01 Reserved, 0
3795 * 00 PSD DPLL Phase Shift Disable
3796 *
3797 * 0000 0000
3798 */
3799 write_reg(info, CHA + CCR3, 0);
3800
3801 /* CCR4
3802 *
3803 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3804 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3805 * 05 TST1 Test Pin, 0=normal operation
3806 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3807 * 03..00 Reserved, must be 0
3808 *
3809 * 0101 0000
3810 */
3811 write_reg(info, CHA + CCR4, 0x50);
3812 mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3813
3814 /* DAFO Data Format
3815 *
3816 * 07 Reserved, 0
3817 * 06 XBRK transmit break, 0=normal operation
3818 * 05 Stop bits (0=1, 1=2)
3819 * 04..03 PAR[1..0] Parity (01=odd, 10=even)
3820 * 02 PAREN Parity Enable
3821 * 01..00 CHL[1..0] Character Length (00=8, 01=7)
3822 *
3823 */
3824 val = 0x00;
3825 if (info->params.data_bits != 8)
3826 val |= BIT0; /* 7 bits */
3827 if (info->params.stop_bits != 1)
3828 val |= BIT5;
3829 if (info->params.parity != ASYNC_PARITY_NONE)
3830 {
3831 val |= BIT2; /* Parity enable */
3832 if (info->params.parity == ASYNC_PARITY_ODD)
3833 val |= BIT3;
3834 else
3835 val |= BIT4;
3836 }
3837 write_reg(info, CHA + DAFO, val);
3838
3839 /* RFC Rx FIFO Control
3840 *
3841 * 07 Reserved, 0
3842 * 06 DPS, 1=parity bit not stored in data byte
3843 * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
3844 * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3845 * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3846 * 01 Reserved, 0
3847 * 00 TCDE Terminate Char Detect Enable, 0=disabled
3848 *
3849 * 0101 1100
3850 */
3851 write_reg(info, CHA + RFC, 0x5c);
3852
3853 /* RLCR Receive length check register
3854 *
3855 * Max frame length = (RL + 1) * 32
3856 */
3857 write_reg(info, CHA + RLCR, 0);
3858
3859 /* XBCH Transmit Byte Count High
3860 *
3861 * 07 DMA mode, 0 = interrupt driven
3862 * 06 NRM, 0=ABM (ignored)
3863 * 05 CAS Carrier Auto Start
3864 * 04 XC Transmit Continuously (ignored)
3865 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3866 *
3867 * 0000 0000
3868 */
3869 val = 0x00;
3870 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3871 val |= BIT5;
3872 write_reg(info, CHA + XBCH, val);
3873 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3874 irq_enable(info, CHA, IRQ_CTS);
3875
3876 /* MODE:03 RAC Receiver Active, 1=active */
3877 set_reg_bits(info, CHA + MODE, BIT3);
3878 enable_auxclk(info);
3879 if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3880 irq_enable(info, CHB, IRQ_CTS);
3881 /* PVR[3] 1=AUTO CTS active */
3882 set_reg_bits(info, CHA + PVR, BIT3);
3883 } else
3884 clear_reg_bits(info, CHA + PVR, BIT3);
3885 irq_enable(info, CHA,
3886 IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3887 IRQ_ALLSENT + IRQ_TXFIFO);
3888 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3889 wait_command_complete(info, CHA);
3890 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3891 }
3892
3893 /* Set the HDLC idle mode for the transmitter.
3894 */
3895 void tx_set_idle(MGSLPC_INFO *info)
3896 {
3897 /* Note: ESCC2 only supports flags and one idle modes */
3898 if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3899 set_reg_bits(info, CHA + CCR1, BIT3);
3900 else
3901 clear_reg_bits(info, CHA + CCR1, BIT3);
3902 }
3903
3904 /* get state of the V24 status (input) signals.
3905 */
3906 void get_signals(MGSLPC_INFO *info)
3907 {
3908 unsigned char status = 0;
3909
3910 /* preserve DTR and RTS */
3911 info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3912
3913 if (read_reg(info, CHB + VSTR) & BIT7)
3914 info->serial_signals |= SerialSignal_DCD;
3915 if (read_reg(info, CHB + STAR) & BIT1)
3916 info->serial_signals |= SerialSignal_CTS;
3917
3918 status = read_reg(info, CHA + PVR);
3919 if (!(status & PVR_RI))
3920 info->serial_signals |= SerialSignal_RI;
3921 if (!(status & PVR_DSR))
3922 info->serial_signals |= SerialSignal_DSR;
3923 }
3924
3925 /* Set the state of DTR and RTS based on contents of
3926 * serial_signals member of device extension.
3927 */
3928 void set_signals(MGSLPC_INFO *info)
3929 {
3930 unsigned char val;
3931
3932 val = read_reg(info, CHA + MODE);
3933 if (info->params.mode == MGSL_MODE_ASYNC) {
3934 if (info->serial_signals & SerialSignal_RTS)
3935 val &= ~BIT6;
3936 else
3937 val |= BIT6;
3938 } else {
3939 if (info->serial_signals & SerialSignal_RTS)
3940 val |= BIT2;
3941 else
3942 val &= ~BIT2;
3943 }
3944 write_reg(info, CHA + MODE, val);
3945
3946 if (info->serial_signals & SerialSignal_DTR)
3947 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3948 else
3949 set_reg_bits(info, CHA + PVR, PVR_DTR);
3950 }
3951
3952 void rx_reset_buffers(MGSLPC_INFO *info)
3953 {
3954 RXBUF *buf;
3955 int i;
3956
3957 info->rx_put = 0;
3958 info->rx_get = 0;
3959 info->rx_frame_count = 0;
3960 for (i=0 ; i < info->rx_buf_count ; i++) {
3961 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3962 buf->status = buf->count = 0;
3963 }
3964 }
3965
3966 /* Attempt to return a received HDLC frame
3967 * Only frames received without errors are returned.
3968 *
3969 * Returns 1 if frame returned, otherwise 0
3970 */
3971 int rx_get_frame(MGSLPC_INFO *info)
3972 {
3973 unsigned short status;
3974 RXBUF *buf;
3975 unsigned int framesize = 0;
3976 unsigned long flags;
3977 struct tty_struct *tty = info->tty;
3978 int return_frame = 0;
3979
3980 if (info->rx_frame_count == 0)
3981 return 0;
3982
3983 buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3984
3985 status = buf->status;
3986
3987 /* 07 VFR 1=valid frame
3988 * 06 RDO 1=data overrun
3989 * 05 CRC 1=OK, 0=error
3990 * 04 RAB 1=frame aborted
3991 */
3992 if ((status & 0xf0) != 0xA0) {
3993 if (!(status & BIT7) || (status & BIT4))
3994 info->icount.rxabort++;
3995 else if (status & BIT6)
3996 info->icount.rxover++;
3997 else if (!(status & BIT5)) {
3998 info->icount.rxcrc++;
3999 if (info->params.crc_type & HDLC_CRC_RETURN_EX)
4000 return_frame = 1;
4001 }
4002 framesize = 0;
4003 #ifdef CONFIG_HDLC
4004 {
4005 struct net_device_stats *stats = hdlc_stats(info->netdev);
4006 stats->rx_errors++;
4007 stats->rx_frame_errors++;
4008 }
4009 #endif
4010 } else
4011 return_frame = 1;
4012
4013 if (return_frame)
4014 framesize = buf->count;
4015
4016 if (debug_level >= DEBUG_LEVEL_BH)
4017 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
4018 __FILE__,__LINE__,info->device_name,status,framesize);
4019
4020 if (debug_level >= DEBUG_LEVEL_DATA)
4021 trace_block(info, buf->data, framesize, 0);
4022
4023 if (framesize) {
4024 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
4025 framesize+1 > info->max_frame_size) ||
4026 framesize > info->max_frame_size)
4027 info->icount.rxlong++;
4028 else {
4029 if (status & BIT5)
4030 info->icount.rxok++;
4031
4032 if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
4033 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
4034 ++framesize;
4035 }
4036
4037 #ifdef CONFIG_HDLC
4038 if (info->netcount)
4039 hdlcdev_rx(info, buf->data, framesize);
4040 else
4041 #endif
4042 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
4043 }
4044 }
4045
4046 spin_lock_irqsave(&info->lock,flags);
4047 buf->status = buf->count = 0;
4048 info->rx_frame_count--;
4049 info->rx_get++;
4050 if (info->rx_get >= info->rx_buf_count)
4051 info->rx_get = 0;
4052 spin_unlock_irqrestore(&info->lock,flags);
4053
4054 return 1;
4055 }
4056
4057 BOOLEAN register_test(MGSLPC_INFO *info)
4058 {
4059 static unsigned char patterns[] =
4060 { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
4061 static unsigned int count = sizeof(patterns) / sizeof(patterns[0]);
4062 unsigned int i;
4063 BOOLEAN rc = TRUE;
4064 unsigned long flags;
4065
4066 spin_lock_irqsave(&info->lock,flags);
4067 reset_device(info);
4068
4069 for (i = 0; i < count; i++) {
4070 write_reg(info, XAD1, patterns[i]);
4071 write_reg(info, XAD2, patterns[(i + 1) % count]);
4072 if ((read_reg(info, XAD1) != patterns[i]) ||
4073 (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
4074 rc = FALSE;
4075 break;
4076 }
4077 }
4078
4079 spin_unlock_irqrestore(&info->lock,flags);
4080 return rc;
4081 }
4082
4083 BOOLEAN irq_test(MGSLPC_INFO *info)
4084 {
4085 unsigned long end_time;
4086 unsigned long flags;
4087
4088 spin_lock_irqsave(&info->lock,flags);
4089 reset_device(info);
4090
4091 info->testing_irq = TRUE;
4092 hdlc_mode(info);
4093
4094 info->irq_occurred = FALSE;
4095
4096 /* init hdlc mode */
4097
4098 irq_enable(info, CHA, IRQ_TIMER);
4099 write_reg(info, CHA + TIMR, 0); /* 512 cycles */
4100 issue_command(info, CHA, CMD_START_TIMER);
4101
4102 spin_unlock_irqrestore(&info->lock,flags);
4103
4104 end_time=100;
4105 while(end_time-- && !info->irq_occurred) {
4106 msleep_interruptible(10);
4107 }
4108
4109 info->testing_irq = FALSE;
4110
4111 spin_lock_irqsave(&info->lock,flags);
4112 reset_device(info);
4113 spin_unlock_irqrestore(&info->lock,flags);
4114
4115 return info->irq_occurred ? TRUE : FALSE;
4116 }
4117
4118 int adapter_test(MGSLPC_INFO *info)
4119 {
4120 if (!register_test(info)) {
4121 info->init_error = DiagStatus_AddressFailure;
4122 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
4123 __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
4124 return -ENODEV;
4125 }
4126
4127 if (!irq_test(info)) {
4128 info->init_error = DiagStatus_IrqFailure;
4129 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
4130 __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
4131 return -ENODEV;
4132 }
4133
4134 if (debug_level >= DEBUG_LEVEL_INFO)
4135 printk("%s(%d):device %s passed diagnostics\n",
4136 __FILE__,__LINE__,info->device_name);
4137 return 0;
4138 }
4139
4140 void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
4141 {
4142 int i;
4143 int linecount;
4144 if (xmit)
4145 printk("%s tx data:\n",info->device_name);
4146 else
4147 printk("%s rx data:\n",info->device_name);
4148
4149 while(count) {
4150 if (count > 16)
4151 linecount = 16;
4152 else
4153 linecount = count;
4154
4155 for(i=0;i<linecount;i++)
4156 printk("%02X ",(unsigned char)data[i]);
4157 for(;i<17;i++)
4158 printk(" ");
4159 for(i=0;i<linecount;i++) {
4160 if (data[i]>=040 && data[i]<=0176)
4161 printk("%c",data[i]);
4162 else
4163 printk(".");
4164 }
4165 printk("\n");
4166
4167 data += linecount;
4168 count -= linecount;
4169 }
4170 }
4171
4172 /* HDLC frame time out
4173 * update stats and do tx completion processing
4174 */
4175 void tx_timeout(unsigned long context)
4176 {
4177 MGSLPC_INFO *info = (MGSLPC_INFO*)context;
4178 unsigned long flags;
4179
4180 if ( debug_level >= DEBUG_LEVEL_INFO )
4181 printk( "%s(%d):tx_timeout(%s)\n",
4182 __FILE__,__LINE__,info->device_name);
4183 if(info->tx_active &&
4184 info->params.mode == MGSL_MODE_HDLC) {
4185 info->icount.txtimeout++;
4186 }
4187 spin_lock_irqsave(&info->lock,flags);
4188 info->tx_active = 0;
4189 info->tx_count = info->tx_put = info->tx_get = 0;
4190
4191 spin_unlock_irqrestore(&info->lock,flags);
4192
4193 #ifdef CONFIG_HDLC
4194 if (info->netcount)
4195 hdlcdev_tx_done(info);
4196 else
4197 #endif
4198 bh_transmit(info);
4199 }
4200
4201 #ifdef CONFIG_HDLC
4202
4203 /**
4204 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
4205 * set encoding and frame check sequence (FCS) options
4206 *
4207 * dev pointer to network device structure
4208 * encoding serial encoding setting
4209 * parity FCS setting
4210 *
4211 * returns 0 if success, otherwise error code
4212 */
4213 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
4214 unsigned short parity)
4215 {
4216 MGSLPC_INFO *info = dev_to_port(dev);
4217 unsigned char new_encoding;
4218 unsigned short new_crctype;
4219
4220 /* return error if TTY interface open */
4221 if (info->count)
4222 return -EBUSY;
4223
4224 switch (encoding)
4225 {
4226 case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
4227 case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
4228 case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
4229 case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
4230 case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
4231 default: return -EINVAL;
4232 }
4233
4234 switch (parity)
4235 {
4236 case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
4237 case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
4238 case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
4239 default: return -EINVAL;
4240 }
4241
4242 info->params.encoding = new_encoding;
4243 info->params.crc_type = new_crctype;;
4244
4245 /* if network interface up, reprogram hardware */
4246 if (info->netcount)
4247 mgslpc_program_hw(info);
4248
4249 return 0;
4250 }
4251
4252 /**
4253 * called by generic HDLC layer to send frame
4254 *
4255 * skb socket buffer containing HDLC frame
4256 * dev pointer to network device structure
4257 *
4258 * returns 0 if success, otherwise error code
4259 */
4260 static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
4261 {
4262 MGSLPC_INFO *info = dev_to_port(dev);
4263 struct net_device_stats *stats = hdlc_stats(dev);
4264 unsigned long flags;
4265
4266 if (debug_level >= DEBUG_LEVEL_INFO)
4267 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
4268
4269 /* stop sending until this frame completes */
4270 netif_stop_queue(dev);
4271
4272 /* copy data to device buffers */
4273 memcpy(info->tx_buf, skb->data, skb->len);
4274 info->tx_get = 0;
4275 info->tx_put = info->tx_count = skb->len;
4276
4277 /* update network statistics */
4278 stats->tx_packets++;
4279 stats->tx_bytes += skb->len;
4280
4281 /* done with socket buffer, so free it */
4282 dev_kfree_skb(skb);
4283
4284 /* save start time for transmit timeout detection */
4285 dev->trans_start = jiffies;
4286
4287 /* start hardware transmitter if necessary */
4288 spin_lock_irqsave(&info->lock,flags);
4289 if (!info->tx_active)
4290 tx_start(info);
4291 spin_unlock_irqrestore(&info->lock,flags);
4292
4293 return 0;
4294 }
4295
4296 /**
4297 * called by network layer when interface enabled
4298 * claim resources and initialize hardware
4299 *
4300 * dev pointer to network device structure
4301 *
4302 * returns 0 if success, otherwise error code
4303 */
4304 static int hdlcdev_open(struct net_device *dev)
4305 {
4306 MGSLPC_INFO *info = dev_to_port(dev);
4307 int rc;
4308 unsigned long flags;
4309
4310 if (debug_level >= DEBUG_LEVEL_INFO)
4311 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
4312
4313 /* generic HDLC layer open processing */
4314 if ((rc = hdlc_open(dev)))
4315 return rc;
4316
4317 /* arbitrate between network and tty opens */
4318 spin_lock_irqsave(&info->netlock, flags);
4319 if (info->count != 0 || info->netcount != 0) {
4320 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4321 spin_unlock_irqrestore(&info->netlock, flags);
4322 return -EBUSY;
4323 }
4324 info->netcount=1;
4325 spin_unlock_irqrestore(&info->netlock, flags);
4326
4327 /* claim resources and init adapter */
4328 if ((rc = startup(info)) != 0) {
4329 spin_lock_irqsave(&info->netlock, flags);
4330 info->netcount=0;
4331 spin_unlock_irqrestore(&info->netlock, flags);
4332 return rc;
4333 }
4334
4335 /* assert DTR and RTS, apply hardware settings */
4336 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4337 mgslpc_program_hw(info);
4338
4339 /* enable network layer transmit */
4340 dev->trans_start = jiffies;
4341 netif_start_queue(dev);
4342
4343 /* inform generic HDLC layer of current DCD status */
4344 spin_lock_irqsave(&info->lock, flags);
4345 get_signals(info);
4346 spin_unlock_irqrestore(&info->lock, flags);
4347 hdlc_set_carrier(info->serial_signals & SerialSignal_DCD, dev);
4348
4349 return 0;
4350 }
4351
4352 /**
4353 * called by network layer when interface is disabled
4354 * shutdown hardware and release resources
4355 *
4356 * dev pointer to network device structure
4357 *
4358 * returns 0 if success, otherwise error code
4359 */
4360 static int hdlcdev_close(struct net_device *dev)
4361 {
4362 MGSLPC_INFO *info = dev_to_port(dev);
4363 unsigned long flags;
4364
4365 if (debug_level >= DEBUG_LEVEL_INFO)
4366 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4367
4368 netif_stop_queue(dev);
4369
4370 /* shutdown adapter and release resources */
4371 shutdown(info);
4372
4373 hdlc_close(dev);
4374
4375 spin_lock_irqsave(&info->netlock, flags);
4376 info->netcount=0;
4377 spin_unlock_irqrestore(&info->netlock, flags);
4378
4379 return 0;
4380 }
4381
4382 /**
4383 * called by network layer to process IOCTL call to network device
4384 *
4385 * dev pointer to network device structure
4386 * ifr pointer to network interface request structure
4387 * cmd IOCTL command code
4388 *
4389 * returns 0 if success, otherwise error code
4390 */
4391 static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4392 {
4393 const size_t size = sizeof(sync_serial_settings);
4394 sync_serial_settings new_line;
4395 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4396 MGSLPC_INFO *info = dev_to_port(dev);
4397 unsigned int flags;
4398
4399 if (debug_level >= DEBUG_LEVEL_INFO)
4400 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4401
4402 /* return error if TTY interface open */
4403 if (info->count)
4404 return -EBUSY;
4405
4406 if (cmd != SIOCWANDEV)
4407 return hdlc_ioctl(dev, ifr, cmd);
4408
4409 switch(ifr->ifr_settings.type) {
4410 case IF_GET_IFACE: /* return current sync_serial_settings */
4411
4412 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4413 if (ifr->ifr_settings.size < size) {
4414 ifr->ifr_settings.size = size; /* data size wanted */
4415 return -ENOBUFS;
4416 }
4417
4418 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4419 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4420 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4421 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4422
4423 switch (flags){
4424 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4425 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
4426 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
4427 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4428 default: new_line.clock_type = CLOCK_DEFAULT;
4429 }
4430
4431 new_line.clock_rate = info->params.clock_speed;
4432 new_line.loopback = info->params.loopback ? 1:0;
4433
4434 if (copy_to_user(line, &new_line, size))
4435 return -EFAULT;
4436 return 0;
4437
4438 case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4439
4440 if(!capable(CAP_NET_ADMIN))
4441 return -EPERM;
4442 if (copy_from_user(&new_line, line, size))
4443 return -EFAULT;
4444
4445 switch (new_line.clock_type)
4446 {
4447 case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4448 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4449 case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
4450 case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
4451 case CLOCK_DEFAULT: flags = info->params.flags &
4452 (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4453 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4454 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4455 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
4456 default: return -EINVAL;
4457 }
4458
4459 if (new_line.loopback != 0 && new_line.loopback != 1)
4460 return -EINVAL;
4461
4462 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4463 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4464 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4465 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4466 info->params.flags |= flags;
4467
4468 info->params.loopback = new_line.loopback;
4469
4470 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4471 info->params.clock_speed = new_line.clock_rate;
4472 else
4473 info->params.clock_speed = 0;
4474
4475 /* if network interface up, reprogram hardware */
4476 if (info->netcount)
4477 mgslpc_program_hw(info);
4478 return 0;
4479
4480 default:
4481 return hdlc_ioctl(dev, ifr, cmd);
4482 }
4483 }
4484
4485 /**
4486 * called by network layer when transmit timeout is detected
4487 *
4488 * dev pointer to network device structure
4489 */
4490 static void hdlcdev_tx_timeout(struct net_device *dev)
4491 {
4492 MGSLPC_INFO *info = dev_to_port(dev);
4493 struct net_device_stats *stats = hdlc_stats(dev);
4494 unsigned long flags;
4495
4496 if (debug_level >= DEBUG_LEVEL_INFO)
4497 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4498
4499 stats->tx_errors++;
4500 stats->tx_aborted_errors++;
4501
4502 spin_lock_irqsave(&info->lock,flags);
4503 tx_stop(info);
4504 spin_unlock_irqrestore(&info->lock,flags);
4505
4506 netif_wake_queue(dev);
4507 }
4508
4509 /**
4510 * called by device driver when transmit completes
4511 * reenable network layer transmit if stopped
4512 *
4513 * info pointer to device instance information
4514 */
4515 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4516 {
4517 if (netif_queue_stopped(info->netdev))
4518 netif_wake_queue(info->netdev);
4519 }
4520
4521 /**
4522 * called by device driver when frame received
4523 * pass frame to network layer
4524 *
4525 * info pointer to device instance information
4526 * buf pointer to buffer contianing frame data
4527 * size count of data bytes in buf
4528 */
4529 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4530 {
4531 struct sk_buff *skb = dev_alloc_skb(size);
4532 struct net_device *dev = info->netdev;
4533 struct net_device_stats *stats = hdlc_stats(dev);
4534
4535 if (debug_level >= DEBUG_LEVEL_INFO)
4536 printk("hdlcdev_rx(%s)\n",dev->name);
4537
4538 if (skb == NULL) {
4539 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4540 stats->rx_dropped++;
4541 return;
4542 }
4543
4544 memcpy(skb_put(skb, size),buf,size);
4545
4546 skb->protocol = hdlc_type_trans(skb, info->netdev);
4547
4548 stats->rx_packets++;
4549 stats->rx_bytes += size;
4550
4551 netif_rx(skb);
4552
4553 info->netdev->last_rx = jiffies;
4554 }
4555
4556 /**
4557 * called by device driver when adding device instance
4558 * do generic HDLC initialization
4559 *
4560 * info pointer to device instance information
4561 *
4562 * returns 0 if success, otherwise error code
4563 */
4564 static int hdlcdev_init(MGSLPC_INFO *info)
4565 {
4566 int rc;
4567 struct net_device *dev;
4568 hdlc_device *hdlc;
4569
4570 /* allocate and initialize network and HDLC layer objects */
4571
4572 if (!(dev = alloc_hdlcdev(info))) {
4573 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4574 return -ENOMEM;
4575 }
4576
4577 /* for network layer reporting purposes only */
4578 dev->base_addr = info->io_base;
4579 dev->irq = info->irq_level;
4580
4581 /* network layer callbacks and settings */
4582 dev->do_ioctl = hdlcdev_ioctl;
4583 dev->open = hdlcdev_open;
4584 dev->stop = hdlcdev_close;
4585 dev->tx_timeout = hdlcdev_tx_timeout;
4586 dev->watchdog_timeo = 10*HZ;
4587 dev->tx_queue_len = 50;
4588
4589 /* generic HDLC layer callbacks and settings */
4590 hdlc = dev_to_hdlc(dev);
4591 hdlc->attach = hdlcdev_attach;
4592 hdlc->xmit = hdlcdev_xmit;
4593
4594 /* register objects with HDLC layer */
4595 if ((rc = register_hdlc_device(dev))) {
4596 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4597 free_netdev(dev);
4598 return rc;
4599 }
4600
4601 info->netdev = dev;
4602 return 0;
4603 }
4604
4605 /**
4606 * called by device driver when removing device instance
4607 * do generic HDLC cleanup
4608 *
4609 * info pointer to device instance information
4610 */
4611 static void hdlcdev_exit(MGSLPC_INFO *info)
4612 {
4613 unregister_hdlc_device(info->netdev);
4614 free_netdev(info->netdev);
4615 info->netdev = NULL;
4616 }
4617
4618 #endif /* CONFIG_HDLC */
4619
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