sound/arm/pxa2xx-ac97.c

   1 /*
   2  * linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip.
   3  *
   4  * Author:      Nicolas Pitre
   5  * Created:     Dec 02, 2004
   6  * Copyright:   MontaVista Software Inc.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <linux/init.h>
  14 #include <linux/module.h>
  15 #include <linux/kernel.h>
  16 #include <linux/device.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/wait.h>
  19 #include <linux/delay.h>
  20
  21 #include <sound/driver.h>
  22 #include <sound/core.h>
  23 #include <sound/pcm.h>
  24 #include <sound/ac97_codec.h>
  25 #include <sound/initval.h>
  26
  27 #include <asm/irq.h>
  28 #include <asm/semaphore.h>
  29 #include <asm/hardware.h>
  30 #include <asm/arch/pxa-regs.h>
  31 #include <asm/arch/audio.h>
  32
  33 #include "pxa2xx-pcm.h"
  34
  35
  36 static DECLARE_MUTEX(car_mutex);
  37 static DECLARE_WAIT_QUEUE_HEAD(gsr_wq);
  38 static volatile long gsr_bits;
  39
  40 static unsigned short pxa2xx_ac97_read(ac97_t *ac97, unsigned short reg)
  41 {
  42         unsigned short val = -1;
  43         volatile u32 *reg_addr;
  44
  45         down(&car_mutex);
  46         if (CAR & CAR_CAIP) {
  47                 printk(KERN_CRIT"%s: CAR_CAIP already set\n", __FUNCTION__);
  48                 goto out;
  49         }
  50
  51         /* set up primary or secondary codec space */
  52         reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE;
  53         reg_addr += (reg >> 1);
  54
  55         /* start read access across the ac97 link */
  56         gsr_bits = 0;
  57         val = *reg_addr;
  58         if (reg == AC97_GPIO_STATUS)
  59                 goto out;
  60         wait_event_timeout(gsr_wq, gsr_bits & GSR_SDONE, 1);
  61         if (!gsr_bits & GSR_SDONE) {
  62                 printk(KERN_ERR "%s: read error (ac97_reg=%d GSR=%#lx)\n",
  63                                 __FUNCTION__, reg, gsr_bits);
  64                 val = -1;
  65                 goto out;
  66         }
  67
  68         /* valid data now */
  69         gsr_bits = 0;
  70         val = *reg_addr;
  71         /* but we've just started another cycle... */
  72         wait_event_timeout(gsr_wq, gsr_bits & GSR_SDONE, 1);
  73
  74 out:    up(&car_mutex);
  75         return val;
  76 }
  77
  78 static void pxa2xx_ac97_write(ac97_t *ac97, unsigned short reg, unsigned short val)
  79 {
  80         volatile u32 *reg_addr;
  81
  82         down(&car_mutex);
  83
  84         if (CAR & CAR_CAIP) {
  85                 printk(KERN_CRIT "%s: CAR_CAIP already set\n", __FUNCTION__);
  86                 goto out;
  87         }
  88
  89         /* set up primary or secondary codec space */
  90         reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE;
  91         reg_addr += (reg >> 1);
  92         gsr_bits = 0;
  93         *reg_addr = val;
  94         wait_event_timeout(gsr_wq, gsr_bits & GSR_CDONE, 1);
  95         if (!gsr_bits & GSR_SDONE)
  96                 printk(KERN_ERR "%s: write error (ac97_reg=%d GSR=%#lx)\n",
  97                                 __FUNCTION__, reg, gsr_bits);
  98
  99 out:    up(&car_mutex);
 100 }
 101
 102 static void pxa2xx_ac97_reset(ac97_t *ac97)
 103 {
 104         /* First, try cold reset */
 105         GCR &=  GCR_COLD_RST;  /* clear everything but nCRST */
 106         GCR &= ~GCR_COLD_RST;  /* then assert nCRST */
 107
 108         gsr_bits = 0;
 109 #ifdef CONFIG_PXA27x
 110         /* PXA27x Developers Manual section 13.5.2.2.1 */
 111         pxa_set_cken(1 << 31, 1);
 112         udelay(5);
 113         pxa_set_cken(1 << 31, 0);
 114         GCR = GCR_COLD_RST;
 115         udelay(50);
 116 #else
 117         GCR = GCR_COLD_RST;
 118         GCR |= GCR_CDONE_IE|GCR_SDONE_IE;
 119         wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);
 120 #endif
 121
 122         if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR))) {
 123                 printk(KERN_INFO "%s: cold reset timeout (GSR=%#lx)\n",
 124                                  __FUNCTION__, gsr_bits);
 125
 126                 /* let's try warm reset */
 127                 gsr_bits = 0;
 128 #ifdef CONFIG_PXA27x
 129                 /* warm reset broken on Bulverde,
 130                    so manually keep AC97 reset high */
 131                 pxa_gpio_mode(113 | GPIO_OUT | GPIO_DFLT_HIGH);
 132                 udelay(10);
 133                 GCR |= GCR_WARM_RST;
 134                 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
 135                 udelay(500);
 136 #else
 137                 GCR |= GCR_WARM_RST|GCR_PRIRDY_IEN|GCR_SECRDY_IEN;
 138                 wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);
 139 #endif
 140
 141                 if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)))
 142                         printk(KERN_INFO "%s: warm reset timeout (GSR=%#lx)\n",
 143                                          __FUNCTION__, gsr_bits);
 144         }
 145
 146         GCR &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN);
 147         GCR |= GCR_SDONE_IE|GCR_CDONE_IE;
 148 }
 149
 150 static irqreturn_t pxa2xx_ac97_irq(int irq, void *dev_id, struct pt_regs *regs)
 151 {
 152         long status;
 153
 154         status = GSR;
 155         if (status) {
 156                 GSR = status;
 157                 gsr_bits |= status;
 158                 wake_up(&gsr_wq);
 159
 160 #ifdef CONFIG_PXA27x
 161                 /* Although we don't use those we still need to clear them
 162                    since they tend to spuriously trigger when MMC is used
 163                    (hardware bug? go figure)... */
 164                 MISR = MISR_EOC;
 165                 PISR = PISR_EOC;
 166                 MCSR = MCSR_EOC;
 167 #endif
 168
 169                 return IRQ_HANDLED;
 170         }
 171
 172         return IRQ_NONE;
 173 }
 174
 175 static ac97_bus_ops_t pxa2xx_ac97_ops = {
 176         .read   = pxa2xx_ac97_read,
 177         .write  = pxa2xx_ac97_write,
 178         .reset  = pxa2xx_ac97_reset,
 179 };
 180
 181 static pxa2xx_pcm_dma_params_t pxa2xx_ac97_pcm_out = {
 182         .name                   = "AC97 PCM out",
 183         .dev_addr               = __PREG(PCDR),
 184         .drcmr                  = &DRCMRTXPCDR,
 185         .dcmd                   = DCMD_INCSRCADDR | DCMD_FLOWTRG |
 186                                   DCMD_BURST32 | DCMD_WIDTH4,
 187 };
 188
 189 static pxa2xx_pcm_dma_params_t pxa2xx_ac97_pcm_in = {
 190         .name                   = "AC97 PCM in",
 191         .dev_addr               = __PREG(PCDR),
 192         .drcmr                  = &DRCMRRXPCDR,
 193         .dcmd                   = DCMD_INCTRGADDR | DCMD_FLOWSRC |
 194                                   DCMD_BURST32 | DCMD_WIDTH4,
 195 };
 196
 197 static snd_pcm_t *pxa2xx_ac97_pcm;
 198 static ac97_t *pxa2xx_ac97_ac97;
 199
 200 static int pxa2xx_ac97_pcm_startup(snd_pcm_substream_t *substream)
 201 {
 202         snd_pcm_runtime_t *runtime = substream->runtime;
 203         pxa2xx_audio_ops_t *platform_ops;
 204         int r;
 205
 206         runtime->hw.channels_min = 2;
 207         runtime->hw.channels_max = 2;
 208
 209         r = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
 210             AC97_RATES_FRONT_DAC : AC97_RATES_ADC;
 211         runtime->hw.rates = pxa2xx_ac97_ac97->rates[r];
 212         snd_pcm_limit_hw_rates(runtime);
 213
 214         platform_ops = substream->pcm->card->dev->platform_data;
 215         if (platform_ops && platform_ops->startup)
 216                 return platform_ops->startup(substream, platform_ops->priv);
 217         else
 218                 return 0;
 219 }
 220
 221 static void pxa2xx_ac97_pcm_shutdown(snd_pcm_substream_t *substream)
 222 {
 223         pxa2xx_audio_ops_t *platform_ops;
 224
 225         platform_ops = substream->pcm->card->dev->platform_data;
 226         if (platform_ops && platform_ops->shutdown)
 227                 platform_ops->shutdown(substream, platform_ops->priv);
 228 }
 229
 230 static int pxa2xx_ac97_pcm_prepare(snd_pcm_substream_t *substream)
 231 {
 232         snd_pcm_runtime_t *runtime = substream->runtime;
 233         int reg = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
 234                   AC97_PCM_FRONT_DAC_RATE : AC97_PCM_LR_ADC_RATE;
 235         return snd_ac97_set_rate(pxa2xx_ac97_ac97, reg, runtime->rate);
 236 }
 237
 238 static pxa2xx_pcm_client_t pxa2xx_ac97_pcm_client = {
 239         .playback_params        = &pxa2xx_ac97_pcm_out,
 240         .capture_params         = &pxa2xx_ac97_pcm_in,
 241         .startup                = pxa2xx_ac97_pcm_startup,
 242         .shutdown               = pxa2xx_ac97_pcm_shutdown,
 243         .prepare                = pxa2xx_ac97_pcm_prepare,
 244 };
 245
 246 #ifdef CONFIG_PM
 247
 248 static int pxa2xx_ac97_do_suspend(snd_card_t *card, unsigned int state)
 249 {
 250         if (card->power_state != SNDRV_CTL_POWER_D3cold) {
 251                 pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
 252                 snd_pcm_suspend_all(pxa2xx_ac97_pcm);
 253                 snd_ac97_suspend(pxa2xx_ac97_ac97);
 254                 snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
 255                 if (platform_ops && platform_ops->suspend)
 256                         platform_ops->suspend(platform_ops->priv);
 257                 GCR |= GCR_ACLINK_OFF;
 258                 pxa_set_cken(CKEN2_AC97, 0);
 259         }
 260
 261         return 0;
 262 }
 263
 264 static int pxa2xx_ac97_do_resume(snd_card_t *card)
 265 {
 266         if (card->power_state != SNDRV_CTL_POWER_D0) {
 267                 pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
 268                 pxa_set_cken(CKEN2_AC97, 1);
 269                 if (platform_ops && platform_ops->resume)
 270                         platform_ops->resume(platform_ops->priv);
 271                 snd_ac97_resume(pxa2xx_ac97_ac97);
 272                 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
 273         }
 274
 275         return 0;
 276 }
 277
 278 static int pxa2xx_ac97_suspend(struct device *_dev, pm_message_t state, u32 level)
 279 {
 280         snd_card_t *card = dev_get_drvdata(_dev);
 281         int ret = 0;
 282
 283         if (card && level == SUSPEND_DISABLE)
 284                 ret = pxa2xx_ac97_do_suspend(card, PMSG_SUSPEND);
 285
 286         return ret;
 287 }
 288
 289 static int pxa2xx_ac97_resume(struct device *_dev, u32 level)
 290 {
 291         snd_card_t *card = dev_get_drvdata(_dev);
 292         int ret = 0;
 293
 294         if (card && level == RESUME_ENABLE)
 295                 ret = pxa2xx_ac97_do_resume(card);
 296
 297         return ret;
 298 }
 299
 300 #else
 301 #define pxa2xx_ac97_suspend     NULL
 302 #define pxa2xx_ac97_resume      NULL
 303 #endif
 304
 305 static int pxa2xx_ac97_probe(struct device *dev)
 306 {
 307         snd_card_t *card;
 308         ac97_bus_t *ac97_bus;
 309         ac97_template_t ac97_template;
 310         int ret;
 311
 312         ret = -ENOMEM;
 313         card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
 314                             THIS_MODULE, 0);
 315         if (!card)
 316                 goto err;
 317
 318         card->dev = dev;
 319         strncpy(card->driver, dev->driver->name, sizeof(card->driver));
 320
 321         ret = pxa2xx_pcm_new(card, &pxa2xx_ac97_pcm_client, &pxa2xx_ac97_pcm);
 322         if (ret)
 323                 goto err;
 324
 325         ret = request_irq(IRQ_AC97, pxa2xx_ac97_irq, 0, "AC97", NULL);
 326         if (ret < 0)
 327                 goto err;
 328
 329         pxa_gpio_mode(GPIO31_SYNC_AC97_MD);
 330         pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD);
 331         pxa_gpio_mode(GPIO28_BITCLK_AC97_MD);
 332         pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD);
 333 #ifdef CONFIG_PXA27x
 334         /* Use GPIO 113 as AC97 Reset on Bulverde */
 335         pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
 336 #endif
 337         pxa_set_cken(CKEN2_AC97, 1);
 338
 339         ret = snd_ac97_bus(card, 0, &pxa2xx_ac97_ops, NULL, &ac97_bus);
 340         if (ret)
 341                 goto err;
 342         memset(&ac97_template, 0, sizeof(ac97_template));
 343         ret = snd_ac97_mixer(ac97_bus, &ac97_template, &pxa2xx_ac97_ac97);
 344         if (ret)
 345                 goto err;
 346
 347         snprintf(card->shortname, sizeof(card->shortname),
 348                  "%s", snd_ac97_get_short_name(pxa2xx_ac97_ac97));
 349         snprintf(card->longname, sizeof(card->longname),
 350                  "%s (%s)", dev->driver->name, card->mixername);
 351
 352         snd_card_set_pm_callback(card, pxa2xx_ac97_do_suspend,
 353                                  pxa2xx_ac97_do_resume, NULL);
 354         ret = snd_card_register(card);
 355         if (ret == 0) {
 356                 dev_set_drvdata(dev, card);
 357                 return 0;
 358         }
 359
 360  err:
 361         if (card)
 362                 snd_card_free(card);
 363         if (CKEN & CKEN2_AC97) {
 364                 GCR |= GCR_ACLINK_OFF;
 365                 free_irq(IRQ_AC97, NULL);
 366                 pxa_set_cken(CKEN2_AC97, 0);
 367         }
 368         return ret;
 369 }
 370
 371 static int pxa2xx_ac97_remove(struct device *dev)
 372 {
 373         snd_card_t *card = dev_get_drvdata(dev);
 374
 375         if (card) {
 376                 snd_card_free(card);
 377                 dev_set_drvdata(dev, NULL);
 378                 GCR |= GCR_ACLINK_OFF;
 379                 free_irq(IRQ_AC97, NULL);
 380                 pxa_set_cken(CKEN2_AC97, 0);
 381         }
 382
 383         return 0;
 384 }
 385
 386 static struct device_driver pxa2xx_ac97_driver = {
 387         .name           = "pxa2xx-ac97",
 388         .bus            = &platform_bus_type,
 389         .probe          = pxa2xx_ac97_probe,
 390         .remove         = pxa2xx_ac97_remove,
 391         .suspend        = pxa2xx_ac97_suspend,
 392         .resume         = pxa2xx_ac97_resume,
 393 };
 394
 395 static int __init pxa2xx_ac97_init(void)
 396 {
 397         return driver_register(&pxa2xx_ac97_driver);
 398 }
 399
 400 static void __exit pxa2xx_ac97_exit(void)
 401 {
 402         driver_unregister(&pxa2xx_ac97_driver);
 403 }
 404
 405 module_init(pxa2xx_ac97_init);
 406 module_exit(pxa2xx_ac97_exit);
 407
 408 MODULE_AUTHOR("Nicolas Pitre");
 409 MODULE_DESCRIPTION("AC97 driver for the Intel PXA2xx chip");
 410 MODULE_LICENSE("GPL");