2 * linux/arch/arm26/mach-arc/irq.c
4 * Copyright (C) 1996 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 * 24-09-1996 RMK Created
12 * 10-10-1996 RMK Brought up to date with arch-sa110eval
13 * 22-10-1996 RMK Changed interrupt numbers & uses new inb/outb macros
14 * 11-01-1998 RMK Added mask_and_ack_irq
15 * 22-08-1998 RMK Restructured IRQ routines
16 * 08-09-2002 IM Brought up to date for 2.5
17 * 01-06-2003 JMA Removed arc_fiq_chip
19 #include <linux/config.h>
20 #include <linux/init.h>
23 #include <asm/irqchip.h>
26 #include <asm/system.h>
28 extern void init_FIQ(void);
33 static void arc_ack_irq_a(unsigned int irq
)
35 unsigned int val
, mask
;
39 val
= ioc_readb(IOC_IRQMASKA
);
40 ioc_writeb(val
& ~mask
, IOC_IRQMASKA
);
41 ioc_writeb(mask
, IOC_IRQCLRA
);
45 static void arc_mask_irq_a(unsigned int irq
)
47 unsigned int val
, mask
;
51 val
= ioc_readb(IOC_IRQMASKA
);
52 ioc_writeb(val
& ~mask
, IOC_IRQMASKA
);
56 static void arc_unmask_irq_a(unsigned int irq
)
58 unsigned int val
, mask
;
62 val
= ioc_readb(IOC_IRQMASKA
);
63 ioc_writeb(val
| mask
, IOC_IRQMASKA
);
67 static struct irqchip arc_a_chip
= {
69 .mask
= arc_mask_irq_a
,
70 .unmask
= arc_unmask_irq_a
,
73 static void arc_mask_irq_b(unsigned int irq
)
75 unsigned int val
, mask
;
76 mask
= 1 << (irq
& 7);
77 val
= ioc_readb(IOC_IRQMASKB
);
78 ioc_writeb(val
& ~mask
, IOC_IRQMASKB
);
81 static void arc_unmask_irq_b(unsigned int irq
)
83 unsigned int val
, mask
;
85 mask
= 1 << (irq
& 7);
86 val
= ioc_readb(IOC_IRQMASKB
);
87 ioc_writeb(val
| mask
, IOC_IRQMASKB
);
90 static struct irqchip arc_b_chip
= {
91 .ack
= arc_mask_irq_b
,
92 .mask
= arc_mask_irq_b
,
93 .unmask
= arc_unmask_irq_b
,
96 /* FIXME - JMA none of these functions are used in arm26 currently
97 static void arc_mask_irq_fiq(unsigned int irq)
99 unsigned int val, mask;
101 mask = 1 << (irq & 7);
102 val = ioc_readb(IOC_FIQMASK);
103 ioc_writeb(val & ~mask, IOC_FIQMASK);
106 static void arc_unmask_irq_fiq(unsigned int irq)
108 unsigned int val, mask;
110 mask = 1 << (irq & 7);
111 val = ioc_readb(IOC_FIQMASK);
112 ioc_writeb(val | mask, IOC_FIQMASK);
115 static struct irqchip arc_fiq_chip = {
116 .ack = arc_mask_irq_fiq,
117 .mask = arc_mask_irq_fiq,
118 .unmask = arc_unmask_irq_fiq,
122 void __init
arc_init_irq(void)
124 unsigned int irq
, flags
;
126 /* Disable all IOC interrupt sources */
127 ioc_writeb(0, IOC_IRQMASKA
);
128 ioc_writeb(0, IOC_IRQMASKB
);
129 ioc_writeb(0, IOC_FIQMASK
);
131 for (irq
= 0; irq
< NR_IRQS
; irq
++) {
134 if (irq
<= 6 || (irq
>= 9 && irq
<= 15))
137 if (irq
== IRQ_KEYBOARDTX
)
138 flags
|= IRQF_NOAUTOEN
;
142 set_irq_chip(irq
, &arc_a_chip
);
143 set_irq_handler(irq
, do_level_IRQ
);
144 set_irq_flags(irq
, flags
);
148 set_irq_chip(irq
, &arc_b_chip
);
149 set_irq_handler(irq
, do_level_IRQ
);
150 set_irq_flags(irq
, flags
);
153 set_irq_chip(irq, &arc_fiq_chip);
154 set_irq_flags(irq, flags);
161 irq_desc
[IRQ_KEYBOARDTX
].noautoenable
= 1;