arch/i386/kernel/cpu/cpufreq/gx-suspmod.c

   1 /*
   2  *      Cyrix MediaGX and NatSemi Geode Suspend Modulation
   3  *      (C) 2002 Zwane Mwaikambo <zwane@commfireservices.com>
   4  *      (C) 2002 Hiroshi Miura   <miura@da-cha.org>
   5  *      All Rights Reserved
   6  *
   7  *      This program is free software; you can redistribute it and/or
   8  *      modify it under the terms of the GNU General Public License
   9  *      version 2 as published by the Free Software Foundation
  10  *
  11  *      The author(s) of this software shall not be held liable for damages
  12  *      of any nature resulting due to the use of this software. This
  13  *      software is provided AS-IS with no warranties.
  14  *
  15  * Theoritical note:
  16  *
  17  *      (see Geode(tm) CS5530 manual (rev.4.1) page.56)
  18  *
  19  *      CPU frequency control on NatSemi Geode GX1/GXLV processor and CS55x0
  20  *      are based on Suspend Moduration.
  21  *
  22  *      Suspend Modulation works by asserting and de-asserting the SUSP# pin
  23  *      to CPU(GX1/GXLV) for configurable durations. When asserting SUSP#
  24  *      the CPU enters an idle state. GX1 stops its core clock when SUSP# is
  25  *      asserted then power consumption is reduced.
  26  *
  27  *      Suspend Modulation's OFF/ON duration are configurable
  28  *      with 'Suspend Modulation OFF Count Register'
  29  *      and 'Suspend Modulation ON Count Register'.
  30  *      These registers are 8bit counters that represent the number of
  31  *      32us intervals which the SUSP# pin is asserted(ON)/de-asserted(OFF)
  32  *      to the processor.
  33  *
  34  *      These counters define a ratio which is the effective frequency
  35  *      of operation of the system.
  36  *
  37  *                             OFF Count
  38  *      F_eff = Fgx * ----------------------
  39  *                      OFF Count + ON Count
  40  *
  41  *      0 <= On Count, Off Count <= 255
  42  *
  43  *      From these limits, we can get register values
  44  *
  45  *      off_duration + on_duration <= MAX_DURATION
  46  *      on_duration = off_duration * (stock_freq - freq) / freq
  47  *
  48  *      off_duration  =  (freq * DURATION) / stock_freq
  49  *      on_duration = DURATION - off_duration
  50  *
  51  *
  52  *---------------------------------------------------------------------------
  53  *
  54  * ChangeLog:
  55  *      Dec. 12, 2003   Hiroshi Miura <miura@da-cha.org>
  56  *              - fix on/off register mistake
  57  *              - fix cpu_khz calc when it stops cpu modulation.
  58  *
  59  *      Dec. 11, 2002   Hiroshi Miura <miura@da-cha.org>
  60  *              - rewrite for Cyrix MediaGX Cx5510/5520 and
  61  *                NatSemi Geode Cs5530(A).
  62  *
  63  *      Jul. ??, 2002  Zwane Mwaikambo <zwane@commfireservices.com>
  64  *              - cs5530_mod patch for 2.4.19-rc1.
  65  *
  66  *---------------------------------------------------------------------------
  67  *
  68  * Todo
  69  *      Test on machines with 5510, 5530, 5530A
  70  */
  71
  72 /************************************************************************
  73  *                      Suspend Modulation - Definitions                *
  74  ************************************************************************/
  75
  76 #include <linux/kernel.h>
  77 #include <linux/module.h>
  78 #include <linux/init.h>
  79 #include <linux/smp.h>
  80 #include <linux/cpufreq.h>
  81 #include <linux/pci.h>
  82 #include <asm/processor.h>
  83 #include <asm/errno.h>
  84
  85 /* PCI config registers, all at F0 */
  86 #define PCI_PMER1              0x80    /* power management enable register 1 */
  87 #define PCI_PMER2              0x81    /* power management enable register 2 */
  88 #define PCI_PMER3              0x82    /* power management enable register 3 */
  89 #define PCI_IRQTC              0x8c    /* irq speedup timer counter register:typical 2 to 4ms */
  90 #define PCI_VIDTC              0x8d    /* video speedup timer counter register: typical 50 to 100ms */
  91 #define PCI_MODOFF             0x94    /* suspend modulation OFF counter register, 1 = 32us */
  92 #define PCI_MODON              0x95    /* suspend modulation ON counter register */
  93 #define PCI_SUSCFG             0x96    /* suspend configuration register */
  94
  95 /* PMER1 bits */
  96 #define GPM                    (1<<0)  /* global power management */
  97 #define GIT                    (1<<1)  /* globally enable PM device idle timers */
  98 #define GTR                    (1<<2)  /* globally enable IO traps */
  99 #define IRQ_SPDUP              (1<<3)  /* disable clock throttle during interrupt handling */
 100 #define VID_SPDUP              (1<<4)  /* disable clock throttle during vga video handling */
 101
 102 /* SUSCFG bits */
 103 #define SUSMOD                 (1<<0)  /* enable/disable suspend modulation */
 104 /* the belows support only with cs5530 (after rev.1.2)/cs5530A */
 105 #define SMISPDUP               (1<<1)  /* select how SMI re-enable suspend modulation: */
 106                                        /* IRQTC timer or read SMI speedup disable reg.(F1BAR[08-09h]) */
 107 #define SUSCFG                 (1<<2)  /* enable powering down a GXLV processor. "Special 3Volt Suspend" mode */
 108 /* the belows support only with cs5530A */
 109 #define PWRSVE_ISA             (1<<3)  /* stop ISA clock  */
 110 #define PWRSVE                 (1<<4)  /* active idle */
 111
 112 struct gxfreq_params {
 113         u8 on_duration;
 114         u8 off_duration;
 115         u8 pci_suscfg;
 116         u8 pci_pmer1;
 117         u8 pci_pmer2;
 118         u8 pci_rev;
 119         struct pci_dev *cs55x0;
 120 };
 121
 122 static struct gxfreq_params *gx_params;
 123 static int stock_freq;
 124
 125 /* PCI bus clock - defaults to 30.000 if cpu_khz is not available */
 126 static int pci_busclk = 0;
 127 module_param (pci_busclk, int, 0444);
 128
 129 /* maximum duration for which the cpu may be suspended
 130  * (32us * MAX_DURATION). If no parameter is given, this defaults
 131  * to 255.
 132  * Note that this leads to a maximum of 8 ms(!) where the CPU clock
 133  * is suspended -- processing power is just 0.39% of what it used to be,
 134  * though. 781.25 kHz(!) for a 200 MHz processor -- wow. */
 135 static int max_duration = 255;
 136 module_param (max_duration, int, 0444);
 137
 138 /* For the default policy, we want at least some processing power
 139  * - let's say 5%. (min = maxfreq / POLICY_MIN_DIV)
 140  */
 141 #define POLICY_MIN_DIV 20
 142
 143
 144 #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "gx-suspmod", msg)
 145
 146 /**
 147  *      we can detect a core multipiler from dir0_lsb
 148  *      from GX1 datasheet p.56,
 149  *         MULT[3:0]:
 150  *         0000 = SYSCLK multiplied by 4 (test only)
 151  *         0001 = SYSCLK multiplied by 10
 152  *         0010 = SYSCLK multiplied by 4
 153  *         0011 = SYSCLK multiplied by 6
 154  *         0100 = SYSCLK multiplied by 9
 155  *         0101 = SYSCLK multiplied by 5
 156  *         0110 = SYSCLK multiplied by 7
 157  *         0111 = SYSCLK multiplied by 8
 158  *              of 33.3MHz
 159  **/
 160 static int gx_freq_mult[16] = {
 161                 4, 10, 4, 6, 9, 5, 7, 8,
 162                 0, 0, 0, 0, 0, 0, 0, 0
 163 };
 164
 165
 166 /****************************************************************
 167  *      Low Level chipset interface                             *
 168  ****************************************************************/
 169 static struct pci_device_id gx_chipset_tbl[] __initdata = {
 170         { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY, PCI_ANY_ID, PCI_ANY_ID },
 171         { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5520, PCI_ANY_ID, PCI_ANY_ID },
 172         { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5510, PCI_ANY_ID, PCI_ANY_ID },
 173         { 0, },
 174 };
 175
 176 /**
 177  *     gx_detect_chipset:
 178  *
 179  **/
 180 static __init struct pci_dev *gx_detect_chipset(void)
 181 {
 182         struct pci_dev *gx_pci = NULL;
 183
 184         /* check if CPU is a MediaGX or a Geode. */
 185         if ((current_cpu_data.x86_vendor != X86_VENDOR_NSC) &&
 186             (current_cpu_data.x86_vendor != X86_VENDOR_CYRIX)) {
 187                 dprintk("error: no MediaGX/Geode processor found!\n");
 188                 return NULL;
 189         }
 190
 191         /* detect which companion chip is used */
 192         while ((gx_pci = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, gx_pci)) != NULL) {
 193                 if ((pci_match_device (gx_chipset_tbl, gx_pci)) != NULL) {
 194                         return gx_pci;
 195                 }
 196         }
 197
 198         dprintk("error: no supported chipset found!\n");
 199         return NULL;
 200 }
 201
 202 /**
 203  *      gx_get_cpuspeed:
 204  *
 205  * Finds out at which efficient frequency the Cyrix MediaGX/NatSemi Geode CPU runs.
 206  */
 207 static unsigned int gx_get_cpuspeed(unsigned int cpu)
 208 {
 209         if ((gx_params->pci_suscfg & SUSMOD) == 0)
 210                 return stock_freq;
 211
 212         return (stock_freq * gx_params->off_duration)
 213                 / (gx_params->on_duration + gx_params->off_duration);
 214 }
 215
 216 /**
 217  *      gx_validate_speed:
 218  *      determine current cpu speed
 219  *
 220 **/
 221
 222 static unsigned int gx_validate_speed(unsigned int khz, u8 *on_duration, u8 *off_duration)
 223 {
 224         unsigned int i;
 225         u8 tmp_on, tmp_off;
 226         int old_tmp_freq = stock_freq;
 227         int tmp_freq;
 228
 229         *off_duration=1;
 230         *on_duration=0;
 231
 232         for (i=max_duration; i>0; i--) {
 233                 tmp_off = ((khz * i) / stock_freq) & 0xff;
 234                 tmp_on = i - tmp_off;
 235                 tmp_freq = (stock_freq * tmp_off) / i;
 236                 /* if this relation is closer to khz, use this. If it's equal,
 237                  * prefer it, too - lower latency */
 238                 if (abs(tmp_freq - khz) <= abs(old_tmp_freq - khz)) {
 239                         *on_duration = tmp_on;
 240                         *off_duration = tmp_off;
 241                         old_tmp_freq = tmp_freq;
 242                 }
 243         }
 244
 245         return old_tmp_freq;
 246 }
 247
 248
 249 /**
 250  *      gx_set_cpuspeed:
 251  *              set cpu speed in khz.
 252  **/
 253
 254 static void gx_set_cpuspeed(unsigned int khz)
 255 {
 256         u8 suscfg, pmer1;
 257         unsigned int new_khz;
 258         unsigned long flags;
 259         struct cpufreq_freqs freqs;
 260
 261
 262         freqs.cpu = 0;
 263         freqs.old = gx_get_cpuspeed(0);
 264
 265         new_khz = gx_validate_speed(khz, &gx_params->on_duration, &gx_params->off_duration);
 266
 267         freqs.new = new_khz;
 268
 269         cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
 270         local_irq_save(flags);
 271
 272         if (new_khz != stock_freq) {  /* if new khz == 100% of CPU speed, it is special case */
 273                 switch (gx_params->cs55x0->device) {
 274                 case PCI_DEVICE_ID_CYRIX_5530_LEGACY:
 275                         pmer1 = gx_params->pci_pmer1 | IRQ_SPDUP | VID_SPDUP;
 276                         /* FIXME: need to test other values -- Zwane,Miura */
 277                         pci_write_config_byte(gx_params->cs55x0, PCI_IRQTC, 4); /* typical 2 to 4ms */
 278                         pci_write_config_byte(gx_params->cs55x0, PCI_VIDTC, 100);/* typical 50 to 100ms */
 279                         pci_write_config_byte(gx_params->cs55x0, PCI_PMER1, pmer1);
 280
 281                         if (gx_params->pci_rev < 0x10) {   /* CS5530(rev 1.2, 1.3) */
 282                                 suscfg = gx_params->pci_suscfg | SUSMOD;
 283                         } else {                           /* CS5530A,B.. */
 284                                 suscfg = gx_params->pci_suscfg | SUSMOD | PWRSVE;
 285                         }
 286                         break;
 287                 case PCI_DEVICE_ID_CYRIX_5520:
 288                 case PCI_DEVICE_ID_CYRIX_5510:
 289                         suscfg = gx_params->pci_suscfg | SUSMOD;
 290                         break;
 291                 default:
 292                         local_irq_restore(flags);
 293                         dprintk("fatal: try to set unknown chipset.\n");
 294                         return;
 295                 }
 296         } else {
 297                 suscfg = gx_params->pci_suscfg & ~(SUSMOD);
 298                 gx_params->off_duration = 0;
 299                 gx_params->on_duration = 0;
 300                 dprintk("suspend modulation disabled: cpu runs 100 percent speed.\n");
 301         }
 302
 303         pci_write_config_byte(gx_params->cs55x0, PCI_MODOFF, gx_params->off_duration);
 304         pci_write_config_byte(gx_params->cs55x0, PCI_MODON, gx_params->on_duration);
 305
 306         pci_write_config_byte(gx_params->cs55x0, PCI_SUSCFG, suscfg);
 307         pci_read_config_byte(gx_params->cs55x0, PCI_SUSCFG, &suscfg);
 308
 309         local_irq_restore(flags);
 310
 311         gx_params->pci_suscfg = suscfg;
 312
 313         cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 314
 315         dprintk("suspend modulation w/ duration of ON:%d us, OFF:%d us\n",
 316                 gx_params->on_duration * 32, gx_params->off_duration * 32);
 317         dprintk("suspend modulation w/ clock speed: %d kHz.\n", freqs.new);
 318 }
 319
 320 /****************************************************************
 321  *             High level functions                             *
 322  ****************************************************************/
 323
 324 /*
 325  *      cpufreq_gx_verify: test if frequency range is valid
 326  *
 327  *      This function checks if a given frequency range in kHz is valid
 328  *      for the hardware supported by the driver.
 329  */
 330
 331 static int cpufreq_gx_verify(struct cpufreq_policy *policy)
 332 {
 333         unsigned int tmp_freq = 0;
 334         u8 tmp1, tmp2;
 335
 336         if (!stock_freq || !policy)
 337                 return -EINVAL;
 338
 339         policy->cpu = 0;
 340         cpufreq_verify_within_limits(policy, (stock_freq / max_duration), stock_freq);
 341
 342         /* it needs to be assured that at least one supported frequency is
 343          * within policy->min and policy->max. If it is not, policy->max
 344          * needs to be increased until one freuqency is supported.
 345          * policy->min may not be decreased, though. This way we guarantee a
 346          * specific processing capacity.
 347          */
 348         tmp_freq = gx_validate_speed(policy->min, &tmp1, &tmp2);
 349         if (tmp_freq < policy->min)
 350                 tmp_freq += stock_freq / max_duration;
 351         policy->min = tmp_freq;
 352         if (policy->min > policy->max)
 353                 policy->max = tmp_freq;
 354         tmp_freq = gx_validate_speed(policy->max, &tmp1, &tmp2);
 355         if (tmp_freq > policy->max)
 356                 tmp_freq -= stock_freq / max_duration;
 357         policy->max = tmp_freq;
 358         if (policy->max < policy->min)
 359                 policy->max = policy->min;
 360         cpufreq_verify_within_limits(policy, (stock_freq / max_duration), stock_freq);
 361
 362         return 0;
 363 }
 364
 365 /*
 366  *      cpufreq_gx_target:
 367  *
 368  */
 369 static int cpufreq_gx_target(struct cpufreq_policy *policy,
 370                              unsigned int target_freq,
 371                              unsigned int relation)
 372 {
 373         u8 tmp1, tmp2;
 374         unsigned int tmp_freq;
 375
 376         if (!stock_freq || !policy)
 377                 return -EINVAL;
 378
 379         policy->cpu = 0;
 380
 381         tmp_freq = gx_validate_speed(target_freq, &tmp1, &tmp2);
 382         while (tmp_freq < policy->min) {
 383                 tmp_freq += stock_freq / max_duration;
 384                 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2);
 385         }
 386         while (tmp_freq > policy->max) {
 387                 tmp_freq -= stock_freq / max_duration;
 388                 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2);
 389         }
 390
 391         gx_set_cpuspeed(tmp_freq);
 392
 393         return 0;
 394 }
 395
 396 static int cpufreq_gx_cpu_init(struct cpufreq_policy *policy)
 397 {
 398         unsigned int maxfreq, curfreq;
 399
 400         if (!policy || policy->cpu != 0)
 401                 return -ENODEV;
 402
 403         /* determine maximum frequency */
 404         if (pci_busclk) {
 405                 maxfreq = pci_busclk * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f];
 406         } else if (cpu_khz) {
 407                 maxfreq = cpu_khz;
 408         } else {
 409                 maxfreq = 30000 * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f];
 410         }
 411         stock_freq = maxfreq;
 412         curfreq = gx_get_cpuspeed(0);
 413
 414         dprintk("cpu max frequency is %d.\n", maxfreq);
 415         dprintk("cpu current frequency is %dkHz.\n",curfreq);
 416
 417         /* setup basic struct for cpufreq API */
 418         policy->cpu = 0;
 419
 420         if (max_duration < POLICY_MIN_DIV)
 421                 policy->min = maxfreq / max_duration;
 422         else
 423                 policy->min = maxfreq / POLICY_MIN_DIV;
 424         policy->max = maxfreq;
 425         policy->cur = curfreq;
 426         policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
 427         policy->cpuinfo.min_freq = maxfreq / max_duration;
 428         policy->cpuinfo.max_freq = maxfreq;
 429         policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
 430
 431         return 0;
 432 }
 433
 434 /*
 435  * cpufreq_gx_init:
 436  *   MediaGX/Geode GX initialize cpufreq driver
 437  */
 438 static struct cpufreq_driver gx_suspmod_driver = {
 439         .get            = gx_get_cpuspeed,
 440         .verify         = cpufreq_gx_verify,
 441         .target         = cpufreq_gx_target,
 442         .init           = cpufreq_gx_cpu_init,
 443         .name           = "gx-suspmod",
 444         .owner          = THIS_MODULE,
 445 };
 446
 447 static int __init cpufreq_gx_init(void)
 448 {
 449         int ret;
 450         struct gxfreq_params *params;
 451         struct pci_dev *gx_pci;
 452         u32 class_rev;
 453
 454         /* Test if we have the right hardware */
 455         if ((gx_pci = gx_detect_chipset()) == NULL)
 456                 return -ENODEV;
 457
 458         /* check whether module parameters are sane */
 459         if (max_duration > 0xff)
 460                 max_duration = 0xff;
 461
 462         dprintk("geode suspend modulation available.\n");
 463
 464         params = kmalloc(sizeof(struct gxfreq_params), GFP_KERNEL);
 465         if (params == NULL)
 466                 return -ENOMEM;
 467         memset(params, 0, sizeof(struct gxfreq_params));
 468
 469         params->cs55x0 = gx_pci;
 470         gx_params = params;
 471
 472         /* keep cs55x0 configurations */
 473         pci_read_config_byte(params->cs55x0, PCI_SUSCFG, &(params->pci_suscfg));
 474         pci_read_config_byte(params->cs55x0, PCI_PMER1, &(params->pci_pmer1));
 475         pci_read_config_byte(params->cs55x0, PCI_PMER2, &(params->pci_pmer2));
 476         pci_read_config_byte(params->cs55x0, PCI_MODON, &(params->on_duration));
 477         pci_read_config_byte(params->cs55x0, PCI_MODOFF, &(params->off_duration));
 478         pci_read_config_dword(params->cs55x0, PCI_CLASS_REVISION, &class_rev);
 479         params->pci_rev = class_rev && 0xff;
 480
 481         if ((ret = cpufreq_register_driver(&gx_suspmod_driver))) {
 482                 kfree(params);
 483                 return ret;                   /* register error! */
 484         }
 485
 486         return 0;
 487 }
 488
 489 static void __exit cpufreq_gx_exit(void)
 490 {
 491         cpufreq_unregister_driver(&gx_suspmod_driver);
 492         pci_dev_put(gx_params->cs55x0);
 493         kfree(gx_params);
 494 }
 495
 496 MODULE_AUTHOR ("Hiroshi Miura <miura@da-cha.org>");
 497 MODULE_DESCRIPTION ("Cpufreq driver for Cyrix MediaGX and NatSemi Geode");
 498 MODULE_LICENSE ("GPL");
 499
 500 module_init(cpufreq_gx_init);
 501 module_exit(cpufreq_gx_exit);
 502