arch/mips/au1000/csb250/board_setup.c

   1 /*
   2  *
   3  * BRIEF MODULE DESCRIPTION
   4  *      Cogent CSB250 board setup.
   5  *
   6  * Copyright 2002 Cogent Computer Systems, Inc.
   7  *      dan@embeddededge.com
   8  *
   9  *  This program is free software; you can redistribute  it and/or modify it
  10  *  under  the terms of  the GNU General  Public License as published by the
  11  *  Free Software Foundation;  either version 2 of the  License, or (at your
  12  *  option) any later version.
  13  *
  14  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  15  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  16  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  17  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  18  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  19  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  20  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  21  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  22  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  23  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24  *
  25  *  You should have received a copy of the  GNU General Public License along
  26  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  27  *  675 Mass Ave, Cambridge, MA 02139, USA.
  28  */
  29 #include <linux/config.h>
  30 #include <linux/init.h>
  31 #include <linux/sched.h>
  32 #include <linux/ioport.h>
  33 #include <linux/mm.h>
  34 #include <linux/console.h>
  35 #include <linux/mc146818rtc.h>
  36 #include <linux/delay.h>
  37
  38 #include <asm/cpu.h>
  39 #include <asm/bootinfo.h>
  40 #include <asm/irq.h>
  41 #include <asm/keyboard.h>
  42 #include <asm/mipsregs.h>
  43 #include <asm/reboot.h>
  44 #include <asm/pgtable.h>
  45 #include <asm/au1000.h>
  46 #include <asm/csb250.h>
  47
  48 extern int (*board_pci_idsel)(unsigned int devsel, int assert);
  49 int     csb250_pci_idsel(unsigned int devsel, int assert);
  50
  51 void __init board_setup(void)
  52 {
  53         u32 pin_func, pin_val;
  54         u32 sys_freqctrl, sys_clksrc;
  55
  56
  57         // set AUX clock to 12MHz * 8 = 96 MHz
  58         au_writel(8, SYS_AUXPLL);
  59         au_writel(0, SYS_PINSTATERD);
  60         udelay(100);
  61
  62 #if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
  63
  64         /* GPIO201 is input for PCMCIA card detect */
  65         /* GPIO203 is input for PCMCIA interrupt request */
  66         au_writel(au_readl(GPIO2_DIR) & (u32)(~((1<<1)|(1<<3))), GPIO2_DIR);
  67
  68         /* zero and disable FREQ2 */
  69         sys_freqctrl = au_readl(SYS_FREQCTRL0);
  70         sys_freqctrl &= ~0xFFF00000;
  71         au_writel(sys_freqctrl, SYS_FREQCTRL0);
  72
  73         /* zero and disable USBH/USBD clocks */
  74         sys_clksrc = au_readl(SYS_CLKSRC);
  75         sys_clksrc &= ~0x00007FE0;
  76         au_writel(sys_clksrc, SYS_CLKSRC);
  77
  78         sys_freqctrl = au_readl(SYS_FREQCTRL0);
  79         sys_freqctrl &= ~0xFFF00000;
  80
  81         sys_clksrc = au_readl(SYS_CLKSRC);
  82         sys_clksrc &= ~0x00007FE0;
  83
  84         // FREQ2 = aux/2 = 48 MHz
  85         sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
  86         au_writel(sys_freqctrl, SYS_FREQCTRL0);
  87
  88         /*
  89          * Route 48MHz FREQ2 into USB Host and/or Device
  90          */
  91 #ifdef CONFIG_USB_OHCI
  92         sys_clksrc |= ((4<<12) | (0<<11) | (0<<10));
  93 #endif
  94 #ifdef CONFIG_AU1X00_USB_DEVICE
  95         sys_clksrc |= ((4<<7) | (0<<6) | (0<<5));
  96 #endif
  97         au_writel(sys_clksrc, SYS_CLKSRC);
  98
  99
 100         pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
 101 #ifndef CONFIG_AU1X00_USB_DEVICE
 102         // 2nd USB port is USB host
 103         pin_func |= 0x8000;
 104 #endif
 105         au_writel(pin_func, SYS_PINFUNC);
 106 #endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
 107
 108         /* Configure GPIO2....it's used by PCI among other things.
 109         */
 110
 111         /* Make everything but GP200 (PCI RST) an input until we get
 112          * the pins set correctly.
 113          */
 114         au_writel(0x00000001, GPIO2_DIR);
 115
 116         /* Set the pins used for output.
 117          * A zero bit will leave PCI reset, LEDs off, power up USB,
 118          * IDSEL disabled.
 119          */
 120         pin_val = ((3 << 30) | (7 << 19) | (1 << 17) | (1 << 16));
 121         au_writel(pin_val, GPIO2_OUTPUT);
 122
 123         /* Set the output direction.
 124         */
 125         pin_val = ((3 << 14) | (7 << 3) | (1 << 1) | (1 << 0));
 126         au_writel(pin_val, GPIO2_DIR);
 127
 128 #ifdef CONFIG_PCI
 129         /* Use FREQ1 for the PCI output clock.  We use the
 130          * CPU clock of 384 MHz divided by 12 to get 32 MHz PCI.
 131          * If Michael changes the CPU speed, we need to adjust
 132          * that here as well :-).
 133          */
 134
 135         /* zero and disable FREQ1
 136         */
 137         sys_freqctrl = au_readl(SYS_FREQCTRL0);
 138         sys_freqctrl &= ~0x000ffc00;
 139         au_writel(sys_freqctrl, SYS_FREQCTRL0);
 140
 141         /* zero and disable PCI clock
 142         */
 143         sys_clksrc = au_readl(SYS_CLKSRC);
 144         sys_clksrc &= ~0x000f8000;
 145         au_writel(sys_clksrc, SYS_CLKSRC);
 146
 147         /* Get current values (which really should match above).
 148         */
 149         sys_freqctrl = au_readl(SYS_FREQCTRL0);
 150         sys_freqctrl &= ~0x000ffc00;
 151
 152         sys_clksrc = au_readl(SYS_CLKSRC);
 153         sys_clksrc &= ~0x000f8000;
 154
 155         /* FREQ1 = cpu/12 = 32 MHz
 156         */
 157         sys_freqctrl |= ((5<<12) | (1<<11) | (0<<10));
 158         au_writel(sys_freqctrl, SYS_FREQCTRL0);
 159
 160         /* Just connect the clock without further dividing.
 161         */
 162         sys_clksrc |= ((3<<17) | (0<<16) | (0<<15));
 163         au_writel(sys_clksrc, SYS_CLKSRC);
 164
 165         udelay(1);
 166
 167         /* Now that clocks should be running, take PCI out of reset.
 168         */
 169         pin_val = au_readl(GPIO2_OUTPUT);
 170         pin_val |= ((1 << 16) | 1);
 171         au_writel(pin_val, GPIO2_OUTPUT);
 172
 173         // Setup PCI bus controller
 174         au_writel(0, Au1500_PCI_CMEM);
 175         au_writel(0x00003fff, Au1500_CFG_BASE);
 176
 177         /* We run big endian without any of the software byte swapping,
 178          * so configure the PCI bridge to help us out.
 179          */
 180         au_writel(0xf | (2<<6) | (1<<5) | (1<<4), Au1500_PCI_CFG);
 181
 182         au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV);
 183         au_writel(0, Au1500_PCI_MWBASE_REV_CCL);
 184         au_writel(0x02a00356, Au1500_PCI_STATCMD);
 185         au_writel(0x00003c04, Au1500_PCI_HDRTYPE);
 186         au_writel(0x00000008, Au1500_PCI_MBAR);
 187         au_sync();
 188
 189         board_pci_idsel = csb250_pci_idsel;
 190 #endif
 191
 192         /* Enable sys bus clock divider when IDLE state or no bus activity. */
 193         au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
 194
 195 #ifdef CONFIG_RTC
 196         // Enable the RTC if not already enabled
 197         if (!(au_readl(0xac000028) & 0x20)) {
 198                 printk("enabling clock ...\n");
 199                 au_writel((au_readl(0xac000028) | 0x20), 0xac000028);
 200         }
 201         // Put the clock in BCD mode
 202         if (readl(0xac00002C) & 0x4) { /* reg B */
 203                 au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c);
 204                 au_sync();
 205         }
 206 #endif
 207 }
 208
 209 /* The IDSEL is selected in the GPIO2 register.  We will make device
 210  * 12 appear in slot 0 and device 13 appear in slot 1.
 211  */
 212 int
 213 csb250_pci_idsel(unsigned int devsel, int assert)
 214 {
 215         int             retval;
 216         unsigned int    gpio2_pins;
 217
 218         retval = 1;
 219
 220         /* First, disable both selects, then assert the one requested.
 221         */
 222         au_writel(0xc000c000, GPIO2_OUTPUT);
 223         au_sync();
 224
 225         if (assert) {
 226                 if (devsel == 12)
 227                         gpio2_pins = 0x40000000;
 228                 else if (devsel == 13)
 229                         gpio2_pins = 0x80000000;
 230                 else {
 231                         gpio2_pins = 0xc000c000;
 232                         retval = 0;
 233                 }
 234                 au_writel(gpio2_pins, GPIO2_OUTPUT);
 235         }
 236         au_sync();
 237
 238         return retval;
 239 }