2 * arch/mips/ddb5074/setup.c -- NEC DDB Vrc-5074 setup routines
4 * Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com>
5 * Sony Software Development Center Europe (SDCE), Brussels
7 #include <linux/init.h>
8 #include <linux/kbd_ll.h>
9 #include <linux/kernel.h>
10 #include <linux/kdev_t.h>
11 #include <linux/types.h>
12 #include <linux/sched.h>
13 #include <linux/pci.h>
14 #include <linux/ide.h>
15 #include <linux/ioport.h>
16 #include <linux/irq.h>
18 #include <asm/addrspace.h>
19 #include <asm/bcache.h>
21 #include <asm/reboot.h>
22 #include <asm/gdb-stub.h>
24 #include <asm/nile4.h>
25 #include <asm/ddb5xxx/ddb5074.h>
26 #include <asm/ddb5xxx/ddb5xxx.h>
28 static void (*back_to_prom
) (void) = (void (*)(void)) 0xbfc00000;
30 static void ddb_machine_restart(char *command
)
35 t
= nile4_in32(NILE4_PCICTRL
+ 4);
37 nile4_out32(NILE4_PCICTRL
+ 4, t
);
39 t
= nile4_in32(NILE4_CPUSTAT
);
41 nile4_out32(NILE4_CPUSTAT
, t
);
46 static void ddb_machine_halt(void)
48 printk("DDB Vrc-5074 halted.\n");
53 static void ddb_machine_power_off(void)
55 printk("DDB Vrc-5074 halted. Please turn off the power.\n");
60 extern void rtc_ds1386_init(unsigned long base
);
62 extern void (*board_timer_setup
) (struct irqaction
* irq
);
64 static void __init
ddb_timer_init(struct irqaction
*irq
)
66 /* set the clock to 1 Hz */
67 nile4_out32(NILE4_T2CTRL
, 1000000);
68 /* enable the General-Purpose Timer */
69 nile4_out32(NILE4_T2CTRL
+ 4, 0x00000001);
71 nile4_out32(NILE4_T2CNTR
, 0);
72 /* enable interrupt */
73 setup_irq(nile4_to_irq(NILE4_INT_GPT
), irq
);
74 nile4_enable_irq(nile4_to_irq(NILE4_INT_GPT
));
75 change_c0_status(ST0_IM
,
76 IE_IRQ0
| IE_IRQ1
| IE_IRQ2
| IE_IRQ3
| IE_IRQ4
);
80 static void __init
ddb_time_init(void)
82 /* we have ds1396 RTC chip */
83 rtc_ds1386_init(KSEG1ADDR(DDB_PCI_MEM_BASE
));
88 static void __init
ddb5074_setup(void)
90 set_io_port_base(NILE4_PCI_IO_BASE
);
91 isa_slot_offset
= NILE4_PCI_MEM_BASE
;
92 board_timer_setup
= ddb_timer_init
;
93 board_time_init
= ddb_time_init
;
96 _machine_restart
= ddb_machine_restart
;
97 _machine_halt
= ddb_machine_halt
;
98 _machine_power_off
= ddb_machine_power_off
;
100 ddb_out32(DDB_BAR0
, 0);
102 ddb_set_pmr(DDB_PCIINIT0
, DDB_PCICMD_IO
, 0, 0x10);
103 ddb_set_pmr(DDB_PCIINIT1
, DDB_PCICMD_MEM
, DDB_PCI_MEM_BASE
, 0x10);
105 /* Reboot on panic */
109 early_initcall(ddb5074_setup
);
111 #define USE_NILE4_SERIAL 0
114 #define ns16550_in(reg) nile4_in8((reg)*8)
115 #define ns16550_out(reg, val) nile4_out8((reg)*8, (val))
117 #define NS16550_BASE (NILE4_PCI_IO_BASE+0x03f8)
118 static inline u8
ns16550_in(u32 reg
)
120 return *(volatile u8
*) (NS16550_BASE
+ reg
);
123 static inline void ns16550_out(u32 reg
, u8 val
)
125 *(volatile u8
*) (NS16550_BASE
+ reg
) = val
;
129 #define NS16550_RBR 0
130 #define NS16550_THR 0
131 #define NS16550_DLL 0
132 #define NS16550_IER 1
133 #define NS16550_DLM 1
134 #define NS16550_FCR 2
135 #define NS16550_IIR 2
136 #define NS16550_LCR 3
137 #define NS16550_MCR 4
138 #define NS16550_LSR 5
139 #define NS16550_MSR 6
140 #define NS16550_SCR 7
142 #define NS16550_LSR_DR 0x01 /* Data ready */
143 #define NS16550_LSR_OE 0x02 /* Overrun */
144 #define NS16550_LSR_PE 0x04 /* Parity error */
145 #define NS16550_LSR_FE 0x08 /* Framing error */
146 #define NS16550_LSR_BI 0x10 /* Break */
147 #define NS16550_LSR_THRE 0x20 /* Xmit holding register empty */
148 #define NS16550_LSR_TEMT 0x40 /* Xmitter empty */
149 #define NS16550_LSR_ERR 0x80 /* Error */
155 ns16550_out(NS16550_LCR
, 0x80);
156 ns16550_out(NS16550_DLM
, 0x00);
157 ns16550_out(NS16550_DLL
, 0x36); /* 9600 baud */
158 ns16550_out(NS16550_LCR
, 0x00);
159 ns16550_out(NS16550_LCR
, 0x03);
160 ns16550_out(NS16550_FCR
, 0x47);
168 while (!(ns16550_in(NS16550_LSR
) & NS16550_LSR_THRE
));
169 ns16550_out(NS16550_THR
, c
);
171 while (!(ns16550_in(NS16550_LSR
) & NS16550_LSR_THRE
));
172 ns16550_out(NS16550_THR
, '\r');
176 void _puts(const char *s
)
185 while (!(ns16550_in(NS16550_LSR
) & NS16550_LSR_DR
));
186 return ns16550_in(NS16550_RBR
);
191 return (ns16550_in(NS16550_LSR
) & NS16550_LSR_DR
) != 0;
196 * Hexadecimal 7-segment LED
198 void ddb5074_led_hex(int hex
)
205 * LEDs D2 and D3, connected to the GPIO pins of the PMU in the ALi M1543
207 struct pci_dev
*pci_pmu
= NULL
;
209 void ddb5074_led_d2(int on
)
214 pci_read_config_byte(pci_pmu
, 0x7e, &t
);
219 pci_write_config_byte(pci_pmu
, 0x7e, t
);
223 void ddb5074_led_d3(int on
)
228 pci_read_config_byte(pci_pmu
, 0x7e, &t
);
233 pci_write_config_byte(pci_pmu
, 0x7e, t
);