5 * VIA IDE driver for Linux. Supported southbridges:
7 * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
8 * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
9 * vt8235, vt8237, vt8237a
11 * Copyright (c) 2000-2002 Vojtech Pavlik
12 * Copyright (c) 2007 Bartlomiej Zolnierkiewicz
14 * Based on the work of:
20 * Obsolete device documentation publically available from via.com.tw
21 * Current device documentation available under NDA only
25 * This program is free software; you can redistribute it and/or modify it
26 * under the terms of the GNU General Public License version 2 as published by
27 * the Free Software Foundation.
30 #include <linux/module.h>
31 #include <linux/kernel.h>
32 #include <linux/ioport.h>
33 #include <linux/blkdev.h>
34 #include <linux/pci.h>
35 #include <linux/init.h>
36 #include <linux/ide.h>
37 #include <linux/dmi.h>
41 #ifdef CONFIG_PPC_CHRP
42 #include <asm/processor.h>
45 #include "ide-timing.h"
47 #define VIA_IDE_ENABLE 0x40
48 #define VIA_IDE_CONFIG 0x41
49 #define VIA_FIFO_CONFIG 0x43
50 #define VIA_MISC_1 0x44
51 #define VIA_MISC_2 0x45
52 #define VIA_MISC_3 0x46
53 #define VIA_DRIVE_TIMING 0x48
54 #define VIA_8BIT_TIMING 0x4e
55 #define VIA_ADDRESS_SETUP 0x4c
56 #define VIA_UDMA_TIMING 0x50
58 #define VIA_BAD_PREQ 0x01 /* Crashes if PREQ# till DDACK# set */
59 #define VIA_BAD_CLK66 0x02 /* 66 MHz clock doesn't work correctly */
60 #define VIA_SET_FIFO 0x04 /* Needs to have FIFO split set */
61 #define VIA_NO_UNMASK 0x08 /* Doesn't work with IRQ unmasking on */
62 #define VIA_BAD_ID 0x10 /* Has wrong vendor ID (0x1107) */
63 #define VIA_BAD_AST 0x20 /* Don't touch Address Setup Timing */
66 * VIA SouthBridge chips.
69 static struct via_isa_bridge
{
76 } via_isa_bridges
[] = {
77 { "vx800", PCI_DEVICE_ID_VIA_VX800
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
78 { "cx700", PCI_DEVICE_ID_VIA_CX700
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
79 { "vt8237s", PCI_DEVICE_ID_VIA_8237S
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
80 { "vt6410", PCI_DEVICE_ID_VIA_6410
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
81 { "vt8251", PCI_DEVICE_ID_VIA_8251
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
82 { "vt8237", PCI_DEVICE_ID_VIA_8237
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
83 { "vt8237a", PCI_DEVICE_ID_VIA_8237A
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
84 { "vt8235", PCI_DEVICE_ID_VIA_8235
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
85 { "vt8233a", PCI_DEVICE_ID_VIA_8233A
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
86 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0
, 0x00, 0x2f, ATA_UDMA5
, },
87 { "vt8233", PCI_DEVICE_ID_VIA_8233_0
, 0x00, 0x2f, ATA_UDMA5
, },
88 { "vt8231", PCI_DEVICE_ID_VIA_8231
, 0x00, 0x2f, ATA_UDMA5
, },
89 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686
, 0x40, 0x4f, ATA_UDMA5
, },
90 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686
, 0x10, 0x2f, ATA_UDMA4
, },
91 { "vt82c686", PCI_DEVICE_ID_VIA_82C686
, 0x00, 0x0f, ATA_UDMA2
, VIA_BAD_CLK66
},
92 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596
, 0x10, 0x2f, ATA_UDMA4
, },
93 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596
, 0x00, 0x0f, ATA_UDMA2
, VIA_BAD_CLK66
},
94 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0
, 0x47, 0x4f, ATA_UDMA2
, VIA_SET_FIFO
},
95 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0
, 0x40, 0x46, ATA_UDMA2
, VIA_SET_FIFO
| VIA_BAD_PREQ
},
96 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0
, 0x30, 0x3f, ATA_UDMA2
, VIA_SET_FIFO
},
97 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0
, 0x20, 0x2f, ATA_UDMA2
, VIA_SET_FIFO
},
98 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0
, 0x00, 0x0f, 0x00, VIA_SET_FIFO
},
99 { "vt82c576", PCI_DEVICE_ID_VIA_82C576
, 0x00, 0x2f, 0x00, VIA_SET_FIFO
| VIA_NO_UNMASK
},
100 { "vt82c576", PCI_DEVICE_ID_VIA_82C576
, 0x00, 0x2f, 0x00, VIA_SET_FIFO
| VIA_NO_UNMASK
| VIA_BAD_ID
},
104 static unsigned int via_clock
;
105 static char *via_dma
[] = { "16", "25", "33", "44", "66", "100", "133" };
109 struct via_isa_bridge
*via_config
;
110 unsigned int via_80w
;
114 * via_set_speed - write timing registers
117 * @timing: IDE timing data to use
119 * via_set_speed writes timing values to the chipset registers
122 static void via_set_speed(ide_hwif_t
*hwif
, u8 dn
, struct ide_timing
*timing
)
124 struct pci_dev
*dev
= hwif
->pci_dev
;
125 struct via82cxxx_dev
*vdev
= pci_get_drvdata(hwif
->pci_dev
);
128 if (~vdev
->via_config
->flags
& VIA_BAD_AST
) {
129 pci_read_config_byte(dev
, VIA_ADDRESS_SETUP
, &t
);
130 t
= (t
& ~(3 << ((3 - dn
) << 1))) | ((FIT(timing
->setup
, 1, 4) - 1) << ((3 - dn
) << 1));
131 pci_write_config_byte(dev
, VIA_ADDRESS_SETUP
, t
);
134 pci_write_config_byte(dev
, VIA_8BIT_TIMING
+ (1 - (dn
>> 1)),
135 ((FIT(timing
->act8b
, 1, 16) - 1) << 4) | (FIT(timing
->rec8b
, 1, 16) - 1));
137 pci_write_config_byte(dev
, VIA_DRIVE_TIMING
+ (3 - dn
),
138 ((FIT(timing
->active
, 1, 16) - 1) << 4) | (FIT(timing
->recover
, 1, 16) - 1));
140 switch (vdev
->via_config
->udma_mask
) {
141 case ATA_UDMA2
: t
= timing
->udma
? (0xe0 | (FIT(timing
->udma
, 2, 5) - 2)) : 0x03; break;
142 case ATA_UDMA4
: t
= timing
->udma
? (0xe8 | (FIT(timing
->udma
, 2, 9) - 2)) : 0x0f; break;
143 case ATA_UDMA5
: t
= timing
->udma
? (0xe0 | (FIT(timing
->udma
, 2, 9) - 2)) : 0x07; break;
144 case ATA_UDMA6
: t
= timing
->udma
? (0xe0 | (FIT(timing
->udma
, 2, 9) - 2)) : 0x07; break;
148 pci_write_config_byte(dev
, VIA_UDMA_TIMING
+ (3 - dn
), t
);
152 * via_set_drive - configure transfer mode
153 * @drive: Drive to set up
154 * @speed: desired speed
156 * via_set_drive() computes timing values configures the chipset to
157 * a desired transfer mode. It also can be called by upper layers.
160 static void via_set_drive(ide_drive_t
*drive
, const u8 speed
)
162 ide_drive_t
*peer
= HWIF(drive
)->drives
+ (~drive
->dn
& 1);
163 struct via82cxxx_dev
*vdev
= pci_get_drvdata(drive
->hwif
->pci_dev
);
164 struct ide_timing t
, p
;
167 T
= 1000000000 / via_clock
;
169 switch (vdev
->via_config
->udma_mask
) {
170 case ATA_UDMA2
: UT
= T
; break;
171 case ATA_UDMA4
: UT
= T
/2; break;
172 case ATA_UDMA5
: UT
= T
/3; break;
173 case ATA_UDMA6
: UT
= T
/4; break;
177 ide_timing_compute(drive
, speed
, &t
, T
, UT
);
180 ide_timing_compute(peer
, peer
->current_speed
, &p
, T
, UT
);
181 ide_timing_merge(&p
, &t
, &t
, IDE_TIMING_8BIT
);
184 via_set_speed(HWIF(drive
), drive
->dn
, &t
);
188 * via_set_pio_mode - set host controller for PIO mode
190 * @pio: PIO mode number
192 * A callback from the upper layers for PIO-only tuning.
195 static void via_set_pio_mode(ide_drive_t
*drive
, const u8 pio
)
197 via_set_drive(drive
, XFER_PIO_0
+ pio
);
201 * via82cxxx_ide_dma_check - set up for DMA if possible
202 * @drive: IDE drive to set up
204 * Set up the drive for the highest supported speed considering the
205 * driver, controller and cable
208 static int via82cxxx_ide_dma_check (ide_drive_t
*drive
)
210 if (ide_tune_dma(drive
))
213 ide_set_max_pio(drive
);
218 static struct via_isa_bridge
*via_config_find(struct pci_dev
**isa
)
220 struct via_isa_bridge
*via_config
;
222 for (via_config
= via_isa_bridges
; via_config
->id
; via_config
++)
223 if ((*isa
= pci_get_device(PCI_VENDOR_ID_VIA
+
224 !!(via_config
->flags
& VIA_BAD_ID
),
225 via_config
->id
, NULL
))) {
227 if ((*isa
)->revision
>= via_config
->rev_min
&&
228 (*isa
)->revision
<= via_config
->rev_max
)
237 * Check and handle 80-wire cable presence
239 static void __devinit
via_cable_detect(struct via82cxxx_dev
*vdev
, u32 u
)
243 switch (vdev
->via_config
->udma_mask
) {
245 for (i
= 24; i
>= 0; i
-= 8)
246 if (((u
>> (i
& 16)) & 8) &&
248 (((u
>> i
) & 7) < 2)) {
253 vdev
->via_80w
|= (1 << (1 - (i
>> 4)));
258 for (i
= 24; i
>= 0; i
-= 8)
259 if (((u
>> i
) & 0x10) ||
260 (((u
>> i
) & 0x20) &&
261 (((u
>> i
) & 7) < 4))) {
262 /* BIOS 80-wire bit or
263 * UDMA w/ < 60ns/cycle
265 vdev
->via_80w
|= (1 << (1 - (i
>> 4)));
270 for (i
= 24; i
>= 0; i
-= 8)
271 if (((u
>> i
) & 0x10) ||
272 (((u
>> i
) & 0x20) &&
273 (((u
>> i
) & 7) < 6))) {
274 /* BIOS 80-wire bit or
275 * UDMA w/ < 60ns/cycle
277 vdev
->via_80w
|= (1 << (1 - (i
>> 4)));
284 * init_chipset_via82cxxx - initialization handler
286 * @name: Name of interface
288 * The initialization callback. Here we determine the IDE chip type
289 * and initialize its drive independent registers.
292 static unsigned int __devinit
init_chipset_via82cxxx(struct pci_dev
*dev
, const char *name
)
294 struct pci_dev
*isa
= NULL
;
295 struct via82cxxx_dev
*vdev
;
296 struct via_isa_bridge
*via_config
;
300 vdev
= kzalloc(sizeof(*vdev
), GFP_KERNEL
);
302 printk(KERN_ERR
"VP_IDE: out of memory :(\n");
305 pci_set_drvdata(dev
, vdev
);
308 * Find the ISA bridge to see how good the IDE is.
310 vdev
->via_config
= via_config
= via_config_find(&isa
);
312 /* We checked this earlier so if it fails here deeep badness
315 BUG_ON(!via_config
->id
);
318 * Detect cable and configure Clk66
320 pci_read_config_dword(dev
, VIA_UDMA_TIMING
, &u
);
322 via_cable_detect(vdev
, u
);
324 if (via_config
->udma_mask
== ATA_UDMA4
) {
326 pci_write_config_dword(dev
, VIA_UDMA_TIMING
, u
|0x80008);
327 } else if (via_config
->flags
& VIA_BAD_CLK66
) {
328 /* Would cause trouble on 596a and 686 */
329 pci_write_config_dword(dev
, VIA_UDMA_TIMING
, u
& ~0x80008);
333 * Check whether interfaces are enabled.
336 pci_read_config_byte(dev
, VIA_IDE_ENABLE
, &v
);
339 * Set up FIFO sizes and thresholds.
342 pci_read_config_byte(dev
, VIA_FIFO_CONFIG
, &t
);
344 /* Disable PREQ# till DDACK# */
345 if (via_config
->flags
& VIA_BAD_PREQ
) {
346 /* Would crash on 586b rev 41 */
350 /* Fix FIFO split between channels */
351 if (via_config
->flags
& VIA_SET_FIFO
) {
354 case 2: t
|= 0x00; break; /* 16 on primary */
355 case 1: t
|= 0x60; break; /* 16 on secondary */
356 case 3: t
|= 0x20; break; /* 8 pri 8 sec */
360 pci_write_config_byte(dev
, VIA_FIFO_CONFIG
, t
);
363 * Determine system bus clock.
366 via_clock
= system_bus_clock() * 1000;
369 case 33000: via_clock
= 33333; break;
370 case 37000: via_clock
= 37500; break;
371 case 41000: via_clock
= 41666; break;
374 if (via_clock
< 20000 || via_clock
> 50000) {
375 printk(KERN_WARNING
"VP_IDE: User given PCI clock speed "
376 "impossible (%d), using 33 MHz instead.\n", via_clock
);
377 printk(KERN_WARNING
"VP_IDE: Use ide0=ata66 if you want "
378 "to assume 80-wire cable.\n");
383 * Print the boot message.
386 printk(KERN_INFO
"VP_IDE: VIA %s (rev %02x) IDE %sDMA%s "
387 "controller on pci%s\n",
388 via_config
->name
, isa
->revision
,
389 via_config
->udma_mask
? "U" : "MW",
390 via_dma
[via_config
->udma_mask
?
391 (fls(via_config
->udma_mask
) - 1) : 0],
399 * Cable special cases
402 static const struct dmi_system_id cable_dmi_table
[] = {
404 .ident
= "Acer Ferrari 3400",
406 DMI_MATCH(DMI_BOARD_VENDOR
, "Acer,Inc."),
407 DMI_MATCH(DMI_BOARD_NAME
, "Ferrari 3400"),
413 static int via_cable_override(struct pci_dev
*pdev
)
416 if (dmi_check_system(cable_dmi_table
))
419 /* Arima W730-K8/Targa Visionary 811/... */
420 if (pdev
->subsystem_vendor
== 0x161F &&
421 pdev
->subsystem_device
== 0x2032)
427 static u8 __devinit
via82cxxx_cable_detect(ide_hwif_t
*hwif
)
429 struct pci_dev
*pdev
= hwif
->pci_dev
;
430 struct via82cxxx_dev
*vdev
= pci_get_drvdata(pdev
);
432 if (via_cable_override(pdev
))
433 return ATA_CBL_PATA40_SHORT
;
435 if ((vdev
->via_80w
>> hwif
->channel
) & 1)
436 return ATA_CBL_PATA80
;
438 return ATA_CBL_PATA40
;
441 static void __devinit
init_hwif_via82cxxx(ide_hwif_t
*hwif
)
443 struct via82cxxx_dev
*vdev
= pci_get_drvdata(hwif
->pci_dev
);
448 hwif
->set_pio_mode
= &via_set_pio_mode
;
449 hwif
->set_dma_mode
= &via_set_drive
;
451 #ifdef CONFIG_PPC_CHRP
452 if(machine_is(chrp
) && _chrp_type
== _CHRP_Pegasos
) {
453 hwif
->irq
= hwif
->channel
? 15 : 14;
457 for (i
= 0; i
< 2; i
++) {
458 hwif
->drives
[i
].io_32bit
= 1;
459 hwif
->drives
[i
].unmask
= (vdev
->via_config
->flags
& VIA_NO_UNMASK
) ? 0 : 1;
460 hwif
->drives
[i
].autotune
= 1;
461 hwif
->drives
[i
].dn
= hwif
->channel
* 2 + i
;
469 hwif
->ultra_mask
= vdev
->via_config
->udma_mask
;
470 hwif
->mwdma_mask
= 0x07;
471 hwif
->swdma_mask
= 0x07;
473 if (hwif
->cbl
!= ATA_CBL_PATA40_SHORT
)
474 hwif
->cbl
= via82cxxx_cable_detect(hwif
);
476 hwif
->ide_dma_check
= &via82cxxx_ide_dma_check
;
479 hwif
->drives
[0].autodma
= hwif
->autodma
;
480 hwif
->drives
[1].autodma
= hwif
->autodma
;
483 static ide_pci_device_t via82cxxx_chipsets
[] __devinitdata
= {
486 .init_chipset
= init_chipset_via82cxxx
,
487 .init_hwif
= init_hwif_via82cxxx
,
488 .autodma
= NOAUTODMA
,
489 .enablebits
= {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
490 .bootable
= ON_BOARD
,
491 .host_flags
= IDE_HFLAG_PIO_NO_BLACKLIST
492 | IDE_HFLAG_PIO_NO_DOWNGRADE
493 | IDE_HFLAG_POST_SET_MODE
,
494 .pio_mask
= ATA_PIO5
,
497 .init_chipset
= init_chipset_via82cxxx
,
498 .init_hwif
= init_hwif_via82cxxx
,
500 .enablebits
= {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
501 .bootable
= ON_BOARD
,
502 .host_flags
= IDE_HFLAG_PIO_NO_BLACKLIST
503 | IDE_HFLAG_PIO_NO_DOWNGRADE
504 | IDE_HFLAG_POST_SET_MODE
,
505 .pio_mask
= ATA_PIO5
,
509 static int __devinit
via_init_one(struct pci_dev
*dev
, const struct pci_device_id
*id
)
511 struct pci_dev
*isa
= NULL
;
512 struct via_isa_bridge
*via_config
;
514 * Find the ISA bridge and check we know what it is.
516 via_config
= via_config_find(&isa
);
518 if (!via_config
->id
) {
519 printk(KERN_WARNING
"VP_IDE: Unknown VIA SouthBridge, disabling DMA.\n");
522 return ide_setup_pci_device(dev
, &via82cxxx_chipsets
[id
->driver_data
]);
525 static struct pci_device_id via_pci_tbl
[] = {
526 { PCI_VENDOR_ID_VIA
, PCI_DEVICE_ID_VIA_82C576_1
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
527 { PCI_VENDOR_ID_VIA
, PCI_DEVICE_ID_VIA_82C586_1
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
528 { PCI_VENDOR_ID_VIA
, PCI_DEVICE_ID_VIA_6410
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 1},
529 { PCI_VENDOR_ID_VIA
, PCI_DEVICE_ID_VIA_SATA_EIDE
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 1},
532 MODULE_DEVICE_TABLE(pci
, via_pci_tbl
);
534 static struct pci_driver driver
= {
536 .id_table
= via_pci_tbl
,
537 .probe
= via_init_one
,
540 static int __init
via_ide_init(void)
542 return ide_pci_register_driver(&driver
);
545 module_init(via_ide_init
);
547 MODULE_AUTHOR("Vojtech Pavlik, Michel Aubry, Jeff Garzik, Andre Hedrick");
548 MODULE_DESCRIPTION("PCI driver module for VIA IDE");
549 MODULE_LICENSE("GPL");