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pasemi_mac: Improve RX interrupt mitigation
[linux-2.6/verdex.git] / drivers / net / pasemi_mac.c
blobe78aac488f3c589832d54c643dbd3f28de0e83d9
1 /*
2 * Copyright (C) 2006-2007 PA Semi, Inc
3 *
4 * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/pci.h>
23 #include <linux/interrupt.h>
24 #include <linux/dmaengine.h>
25 #include <linux/delay.h>
26 #include <linux/netdevice.h>
27 #include <linux/etherdevice.h>
28 #include <asm/dma-mapping.h>
29 #include <linux/in.h>
30 #include <linux/skbuff.h>
31
32 #include <linux/ip.h>
33 #include <linux/tcp.h>
34 #include <net/checksum.h>
35
36 #include <asm/irq.h>
37 #include <asm/firmware.h>
38 #include <asm/pasemi_dma.h>
39
40 #include "pasemi_mac.h"
41
42 /* We have our own align, since ppc64 in general has it at 0 because
43 * of design flaws in some of the server bridge chips. However, for
44 * PWRficient doing the unaligned copies is more expensive than doing
45 * unaligned DMA, so make sure the data is aligned instead.
46 */
47 #define LOCAL_SKB_ALIGN 2
48
49 /* TODO list
50 *
51 * - Multicast support
52 * - Large MTU support
53 * - SW LRO
54 * - Multiqueue RX/TX
55 */
56
57
58 /* Must be a power of two */
59 #define RX_RING_SIZE 1024
60 #define TX_RING_SIZE 4096
61
62 #define DEFAULT_MSG_ENABLE \
63 (NETIF_MSG_DRV | \
64 NETIF_MSG_PROBE | \
65 NETIF_MSG_LINK | \
66 NETIF_MSG_TIMER | \
67 NETIF_MSG_IFDOWN | \
68 NETIF_MSG_IFUP | \
69 NETIF_MSG_RX_ERR | \
70 NETIF_MSG_TX_ERR)
71
72 #define TX_DESC(tx, num) ((tx)->chan.ring_virt[(num) & (TX_RING_SIZE-1)])
73 #define TX_DESC_INFO(tx, num) ((tx)->ring_info[(num) & (TX_RING_SIZE-1)])
74 #define RX_DESC(rx, num) ((rx)->chan.ring_virt[(num) & (RX_RING_SIZE-1)])
75 #define RX_DESC_INFO(rx, num) ((rx)->ring_info[(num) & (RX_RING_SIZE-1)])
76 #define RX_BUFF(rx, num) ((rx)->buffers[(num) & (RX_RING_SIZE-1)])
77
78 #define RING_USED(ring) (((ring)->next_to_fill - (ring)->next_to_clean) \
79 & ((ring)->size - 1))
80 #define RING_AVAIL(ring) ((ring->size) - RING_USED(ring))
81
82 #define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
83
84 MODULE_LICENSE("GPL");
85 MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
86 MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
87
88 static int debug = -1; /* -1 == use DEFAULT_MSG_ENABLE as value */
89 module_param(debug, int, 0);
90 MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
91
92 static int translation_enabled(void)
93 {
94 #if defined(CONFIG_PPC_PASEMI_IOMMU_DMA_FORCE)
95 return 1;
96 #else
97 return firmware_has_feature(FW_FEATURE_LPAR);
98 #endif
99 }
100
101 static void write_iob_reg(unsigned int reg, unsigned int val)
102 {
103 pasemi_write_iob_reg(reg, val);
104 }
105
106 static unsigned int read_mac_reg(const struct pasemi_mac *mac, unsigned int reg)
107 {
108 return pasemi_read_mac_reg(mac->dma_if, reg);
109 }
110
111 static void write_mac_reg(const struct pasemi_mac *mac, unsigned int reg,
112 unsigned int val)
113 {
114 pasemi_write_mac_reg(mac->dma_if, reg, val);
115 }
116
117 static unsigned int read_dma_reg(unsigned int reg)
118 {
119 return pasemi_read_dma_reg(reg);
120 }
121
122 static void write_dma_reg(unsigned int reg, unsigned int val)
123 {
124 pasemi_write_dma_reg(reg, val);
125 }
126
127 static struct pasemi_mac_rxring *rx_ring(const struct pasemi_mac *mac)
128 {
129 return mac->rx;
130 }
131
132 static struct pasemi_mac_txring *tx_ring(const struct pasemi_mac *mac)
133 {
134 return mac->tx;
135 }
136
137 static inline void prefetch_skb(const struct sk_buff *skb)
138 {
139 const void *d = skb;
140
141 prefetch(d);
142 prefetch(d+64);
143 prefetch(d+128);
144 prefetch(d+192);
145 }
146
147 static int mac_to_intf(struct pasemi_mac *mac)
148 {
149 struct pci_dev *pdev = mac->pdev;
150 u32 tmp;
151 int nintf, off, i, j;
152 int devfn = pdev->devfn;
153
154 tmp = read_dma_reg(PAS_DMA_CAP_IFI);
155 nintf = (tmp & PAS_DMA_CAP_IFI_NIN_M) >> PAS_DMA_CAP_IFI_NIN_S;
156 off = (tmp & PAS_DMA_CAP_IFI_IOFF_M) >> PAS_DMA_CAP_IFI_IOFF_S;
157
158 /* IOFF contains the offset to the registers containing the
159 * DMA interface-to-MAC-pci-id mappings, and NIN contains number
160 * of total interfaces. Each register contains 4 devfns.
161 * Just do a linear search until we find the devfn of the MAC
162 * we're trying to look up.
163 */
164
165 for (i = 0; i < (nintf+3)/4; i++) {
166 tmp = read_dma_reg(off+4*i);
167 for (j = 0; j < 4; j++) {
168 if (((tmp >> (8*j)) & 0xff) == devfn)
169 return i*4 + j;
170 }
171 }
172 return -1;
173 }
174
175 static int pasemi_get_mac_addr(struct pasemi_mac *mac)
176 {
177 struct pci_dev *pdev = mac->pdev;
178 struct device_node *dn = pci_device_to_OF_node(pdev);
179 int len;
180 const u8 *maddr;
181 u8 addr[6];
182
183 if (!dn) {
184 dev_dbg(&pdev->dev,
185 "No device node for mac, not configuring\n");
186 return -ENOENT;
187 }
188
189 maddr = of_get_property(dn, "local-mac-address", &len);
190
191 if (maddr && len == 6) {
192 memcpy(mac->mac_addr, maddr, 6);
193 return 0;
194 }
195
196 /* Some old versions of firmware mistakenly uses mac-address
197 * (and as a string) instead of a byte array in local-mac-address.
198 */
199
200 if (maddr == NULL)
201 maddr = of_get_property(dn, "mac-address", NULL);
202
203 if (maddr == NULL) {
204 dev_warn(&pdev->dev,
205 "no mac address in device tree, not configuring\n");
206 return -ENOENT;
207 }
208
209
210 if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
211 &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
212 dev_warn(&pdev->dev,
213 "can't parse mac address, not configuring\n");
214 return -EINVAL;
215 }
216
217 memcpy(mac->mac_addr, addr, 6);
218
219 return 0;
220 }
221
222 static int pasemi_mac_unmap_tx_skb(struct pasemi_mac *mac,
223 struct sk_buff *skb,
224 const dma_addr_t *dmas)
225 {
226 int f;
227 int nfrags = skb_shinfo(skb)->nr_frags;
228 struct pci_dev *pdev = mac->dma_pdev;
229
230 pci_unmap_single(pdev, dmas[0], skb_headlen(skb), PCI_DMA_TODEVICE);
231
232 for (f = 0; f < nfrags; f++) {
233 skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
234
235 pci_unmap_page(pdev, dmas[f+1], frag->size, PCI_DMA_TODEVICE);
236 }
237 dev_kfree_skb_irq(skb);
238
239 /* Freed descriptor slot + main SKB ptr + nfrags additional ptrs,
240 * aligned up to a power of 2
241 */
242 return (nfrags + 3) & ~1;
243 }
244
245 static int pasemi_mac_setup_rx_resources(const struct net_device *dev)
246 {
247 struct pasemi_mac_rxring *ring;
248 struct pasemi_mac *mac = netdev_priv(dev);
249 int chno;
250 unsigned int cfg;
251
252 ring = pasemi_dma_alloc_chan(RXCHAN, sizeof(struct pasemi_mac_rxring),
253 offsetof(struct pasemi_mac_rxring, chan));
254
255 if (!ring) {
256 dev_err(&mac->pdev->dev, "Can't allocate RX channel\n");
257 goto out_chan;
258 }
259 chno = ring->chan.chno;
260
261 spin_lock_init(&ring->lock);
262
263 ring->size = RX_RING_SIZE;
264 ring->ring_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
265 RX_RING_SIZE, GFP_KERNEL);
266
267 if (!ring->ring_info)
268 goto out_ring_info;
269
270 /* Allocate descriptors */
271 if (pasemi_dma_alloc_ring(&ring->chan, RX_RING_SIZE))
272 goto out_ring_desc;
273
274 ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
275 RX_RING_SIZE * sizeof(u64),
276 &ring->buf_dma, GFP_KERNEL);
277 if (!ring->buffers)
278 goto out_ring_desc;
279
280 memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
281
282 write_dma_reg(PAS_DMA_RXCHAN_BASEL(chno),
283 PAS_DMA_RXCHAN_BASEL_BRBL(ring->chan.ring_dma));
284
285 write_dma_reg(PAS_DMA_RXCHAN_BASEU(chno),
286 PAS_DMA_RXCHAN_BASEU_BRBH(ring->chan.ring_dma >> 32) |
287 PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 3));
288
289 cfg = PAS_DMA_RXCHAN_CFG_HBU(2);
290
291 if (translation_enabled())
292 cfg |= PAS_DMA_RXCHAN_CFG_CTR;
293
294 write_dma_reg(PAS_DMA_RXCHAN_CFG(chno), cfg);
295
296 write_dma_reg(PAS_DMA_RXINT_BASEL(mac->dma_if),
297 PAS_DMA_RXINT_BASEL_BRBL(ring->buf_dma));
298
299 write_dma_reg(PAS_DMA_RXINT_BASEU(mac->dma_if),
300 PAS_DMA_RXINT_BASEU_BRBH(ring->buf_dma >> 32) |
301 PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
302
303 cfg = PAS_DMA_RXINT_CFG_DHL(2) | PAS_DMA_RXINT_CFG_L2 |
304 PAS_DMA_RXINT_CFG_LW | PAS_DMA_RXINT_CFG_RBP |
305 PAS_DMA_RXINT_CFG_HEN;
306
307 if (translation_enabled())
308 cfg |= PAS_DMA_RXINT_CFG_ITRR | PAS_DMA_RXINT_CFG_ITR;
309
310 write_dma_reg(PAS_DMA_RXINT_CFG(mac->dma_if), cfg);
311
312 ring->next_to_fill = 0;
313 ring->next_to_clean = 0;
314 ring->mac = mac;
315 mac->rx = ring;
316
317 return 0;
318
319 out_ring_desc:
320 kfree(ring->ring_info);
321 out_ring_info:
322 pasemi_dma_free_chan(&ring->chan);
323 out_chan:
324 return -ENOMEM;
325 }
326
327 static struct pasemi_mac_txring *
328 pasemi_mac_setup_tx_resources(const struct net_device *dev)
329 {
330 struct pasemi_mac *mac = netdev_priv(dev);
331 u32 val;
332 struct pasemi_mac_txring *ring;
333 unsigned int cfg;
334 int chno;
335
336 ring = pasemi_dma_alloc_chan(TXCHAN, sizeof(struct pasemi_mac_txring),
337 offsetof(struct pasemi_mac_txring, chan));
338
339 if (!ring) {
340 dev_err(&mac->pdev->dev, "Can't allocate TX channel\n");
341 goto out_chan;
342 }
343
344 chno = ring->chan.chno;
345
346 spin_lock_init(&ring->lock);
347
348 ring->size = TX_RING_SIZE;
349 ring->ring_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
350 TX_RING_SIZE, GFP_KERNEL);
351 if (!ring->ring_info)
352 goto out_ring_info;
353
354 /* Allocate descriptors */
355 if (pasemi_dma_alloc_ring(&ring->chan, TX_RING_SIZE))
356 goto out_ring_desc;
357
358 write_dma_reg(PAS_DMA_TXCHAN_BASEL(chno),
359 PAS_DMA_TXCHAN_BASEL_BRBL(ring->chan.ring_dma));
360 val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->chan.ring_dma >> 32);
361 val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 3);
362
363 write_dma_reg(PAS_DMA_TXCHAN_BASEU(chno), val);
364
365 cfg = PAS_DMA_TXCHAN_CFG_TY_IFACE |
366 PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
367 PAS_DMA_TXCHAN_CFG_UP |
368 PAS_DMA_TXCHAN_CFG_WT(2);
369
370 if (translation_enabled())
371 cfg |= PAS_DMA_TXCHAN_CFG_TRD | PAS_DMA_TXCHAN_CFG_TRR;
372
373 write_dma_reg(PAS_DMA_TXCHAN_CFG(chno), cfg);
374
375 ring->next_to_fill = 0;
376 ring->next_to_clean = 0;
377 ring->mac = mac;
378
379 return ring;
380
381 out_ring_desc:
382 kfree(ring->ring_info);
383 out_ring_info:
384 pasemi_dma_free_chan(&ring->chan);
385 out_chan:
386 return NULL;
387 }
388
389 static void pasemi_mac_free_tx_resources(struct pasemi_mac *mac)
390 {
391 struct pasemi_mac_txring *txring = tx_ring(mac);
392 unsigned int i, j;
393 struct pasemi_mac_buffer *info;
394 dma_addr_t dmas[MAX_SKB_FRAGS+1];
395 int freed;
396 int start, limit;
397
398 start = txring->next_to_clean;
399 limit = txring->next_to_fill;
400
401 /* Compensate for when fill has wrapped and clean has not */
402 if (start > limit)
403 limit += TX_RING_SIZE;
404
405 for (i = start; i < limit; i += freed) {
406 info = &txring->ring_info[(i+1) & (TX_RING_SIZE-1)];
407 if (info->dma && info->skb) {
408 for (j = 0; j <= skb_shinfo(info->skb)->nr_frags; j++)
409 dmas[j] = txring->ring_info[(i+1+j) &
410 (TX_RING_SIZE-1)].dma;
411 freed = pasemi_mac_unmap_tx_skb(mac, info->skb, dmas);
412 } else
413 freed = 2;
414 }
415
416 kfree(txring->ring_info);
417 pasemi_dma_free_chan(&txring->chan);
418
419 }
420
421 static void pasemi_mac_free_rx_resources(struct pasemi_mac *mac)
422 {
423 struct pasemi_mac_rxring *rx = rx_ring(mac);
424 unsigned int i;
425 struct pasemi_mac_buffer *info;
426
427 for (i = 0; i < RX_RING_SIZE; i++) {
428 info = &RX_DESC_INFO(rx, i);
429 if (info->skb && info->dma) {
430 pci_unmap_single(mac->dma_pdev,
431 info->dma,
432 info->skb->len,
433 PCI_DMA_FROMDEVICE);
434 dev_kfree_skb_any(info->skb);
435 }
436 info->dma = 0;
437 info->skb = NULL;
438 }
439
440 for (i = 0; i < RX_RING_SIZE; i++)
441 RX_DESC(rx, i) = 0;
442
443 dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
444 rx_ring(mac)->buffers, rx_ring(mac)->buf_dma);
445
446 kfree(rx_ring(mac)->ring_info);
447 pasemi_dma_free_chan(&rx_ring(mac)->chan);
448 mac->rx = NULL;
449 }
450
451 static void pasemi_mac_replenish_rx_ring(const struct net_device *dev,
452 const int limit)
453 {
454 const struct pasemi_mac *mac = netdev_priv(dev);
455 struct pasemi_mac_rxring *rx = rx_ring(mac);
456 int fill, count;
457
458 if (limit <= 0)
459 return;
460
461 fill = rx_ring(mac)->next_to_fill;
462 for (count = 0; count < limit; count++) {
463 struct pasemi_mac_buffer *info = &RX_DESC_INFO(rx, fill);
464 u64 *buff = &RX_BUFF(rx, fill);
465 struct sk_buff *skb;
466 dma_addr_t dma;
467
468 /* Entry in use? */
469 WARN_ON(*buff);
470
471 /* skb might still be in there for recycle on short receives */
472 if (info->skb)
473 skb = info->skb;
474 else {
475 skb = dev_alloc_skb(BUF_SIZE);
476 skb_reserve(skb, LOCAL_SKB_ALIGN);
477 }
478
479 if (unlikely(!skb))
480 break;
481
482 dma = pci_map_single(mac->dma_pdev, skb->data,
483 BUF_SIZE - LOCAL_SKB_ALIGN,
484 PCI_DMA_FROMDEVICE);
485
486 if (unlikely(dma_mapping_error(dma))) {
487 dev_kfree_skb_irq(info->skb);
488 break;
489 }
490
491 info->skb = skb;
492 info->dma = dma;
493 *buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
494 fill++;
495 }
496
497 wmb();
498
499 write_dma_reg(PAS_DMA_RXINT_INCR(mac->dma_if), count);
500
501 rx_ring(mac)->next_to_fill = (rx_ring(mac)->next_to_fill + count) &
502 (RX_RING_SIZE - 1);
503 }
504
505 static void pasemi_mac_restart_rx_intr(const struct pasemi_mac *mac)
506 {
507 struct pasemi_mac_rxring *rx = rx_ring(mac);
508 unsigned int reg, pcnt;
509 /* Re-enable packet count interrupts: finally
510 * ack the packet count interrupt we got in rx_intr.
511 */
512
513 pcnt = *rx->chan.status & PAS_STATUS_PCNT_M;
514
515 reg = PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_RXCH_RESET_PINTC;
516
517 if (*rx->chan.status & PAS_STATUS_TIMER)
518 reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
519
520 write_iob_reg(PAS_IOB_DMA_RXCH_RESET(mac->rx->chan.chno), reg);
521 }
522
523 static void pasemi_mac_restart_tx_intr(const struct pasemi_mac *mac)
524 {
525 unsigned int reg, pcnt;
526
527 /* Re-enable packet count interrupts */
528 pcnt = *tx_ring(mac)->chan.status & PAS_STATUS_PCNT_M;
529
530 reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
531
532 write_iob_reg(PAS_IOB_DMA_TXCH_RESET(tx_ring(mac)->chan.chno), reg);
533 }
534
535
536 static inline void pasemi_mac_rx_error(const struct pasemi_mac *mac,
537 const u64 macrx)
538 {
539 unsigned int rcmdsta, ccmdsta;
540 struct pasemi_dmachan *chan = &rx_ring(mac)->chan;
541
542 if (!netif_msg_rx_err(mac))
543 return;
544
545 rcmdsta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
546 ccmdsta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(chan->chno));
547
548 printk(KERN_ERR "pasemi_mac: rx error. macrx %016lx, rx status %lx\n",
549 macrx, *chan->status);
550
551 printk(KERN_ERR "pasemi_mac: rcmdsta %08x ccmdsta %08x\n",
552 rcmdsta, ccmdsta);
553 }
554
555 static inline void pasemi_mac_tx_error(const struct pasemi_mac *mac,
556 const u64 mactx)
557 {
558 unsigned int cmdsta;
559 struct pasemi_dmachan *chan = &tx_ring(mac)->chan;
560
561 if (!netif_msg_tx_err(mac))
562 return;
563
564 cmdsta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(chan->chno));
565
566 printk(KERN_ERR "pasemi_mac: tx error. mactx 0x%016lx, "\
567 "tx status 0x%016lx\n", mactx, *chan->status);
568
569 printk(KERN_ERR "pasemi_mac: tcmdsta 0x%08x\n", cmdsta);
570 }
571
572 static int pasemi_mac_clean_rx(struct pasemi_mac_rxring *rx,
573 const int limit)
574 {
575 const struct pasemi_dmachan *chan = &rx->chan;
576 struct pasemi_mac *mac = rx->mac;
577 struct pci_dev *pdev = mac->dma_pdev;
578 unsigned int n;
579 int count, buf_index, tot_bytes, packets;
580 struct pasemi_mac_buffer *info;
581 struct sk_buff *skb;
582 unsigned int len;
583 u64 macrx, eval;
584 dma_addr_t dma;
585
586 tot_bytes = 0;
587 packets = 0;
588
589 spin_lock(&rx->lock);
590
591 n = rx->next_to_clean;
592
593 prefetch(&RX_DESC(rx, n));
594
595 for (count = 0; count < limit; count++) {
596 macrx = RX_DESC(rx, n);
597 prefetch(&RX_DESC(rx, n+4));
598
599 if ((macrx & XCT_MACRX_E) ||
600 (*chan->status & PAS_STATUS_ERROR))
601 pasemi_mac_rx_error(mac, macrx);
602
603 if (!(macrx & XCT_MACRX_O))
604 break;
605
606 info = NULL;
607
608 BUG_ON(!(macrx & XCT_MACRX_RR_8BRES));
609
610 eval = (RX_DESC(rx, n+1) & XCT_RXRES_8B_EVAL_M) >>
611 XCT_RXRES_8B_EVAL_S;
612 buf_index = eval-1;
613
614 dma = (RX_DESC(rx, n+2) & XCT_PTR_ADDR_M);
615 info = &RX_DESC_INFO(rx, buf_index);
616
617 skb = info->skb;
618
619 prefetch_skb(skb);
620
621 len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
622
623 pci_unmap_single(pdev, dma, BUF_SIZE-LOCAL_SKB_ALIGN,
624 PCI_DMA_FROMDEVICE);
625
626 if (macrx & XCT_MACRX_CRC) {
627 /* CRC error flagged */
628 mac->netdev->stats.rx_errors++;
629 mac->netdev->stats.rx_crc_errors++;
630 /* No need to free skb, it'll be reused */
631 goto next;
632 }
633
634 if (len < 256) {
635 struct sk_buff *new_skb;
636
637 new_skb = netdev_alloc_skb(mac->netdev,
638 len + LOCAL_SKB_ALIGN);
639 if (new_skb) {
640 skb_reserve(new_skb, LOCAL_SKB_ALIGN);
641 memcpy(new_skb->data, skb->data, len);
642 /* save the skb in buffer_info as good */
643 skb = new_skb;
644 }
645 /* else just continue with the old one */
646 } else
647 info->skb = NULL;
648
649 info->dma = 0;
650
651 if (likely((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK)) {
652 skb->ip_summed = CHECKSUM_UNNECESSARY;
653 skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
654 XCT_MACRX_CSUM_S;
655 } else
656 skb->ip_summed = CHECKSUM_NONE;
657
658 packets++;
659 tot_bytes += len;
660
661 /* Don't include CRC */
662 skb_put(skb, len-4);
663
664 skb->protocol = eth_type_trans(skb, mac->netdev);
665 netif_receive_skb(skb);
666
667 next:
668 RX_DESC(rx, n) = 0;
669 RX_DESC(rx, n+1) = 0;
670
671 /* Need to zero it out since hardware doesn't, since the
672 * replenish loop uses it to tell when it's done.
673 */
674 RX_BUFF(rx, buf_index) = 0;
675
676 n += 4;
677 }
678
679 if (n > RX_RING_SIZE) {
680 /* Errata 5971 workaround: L2 target of headers */
681 write_iob_reg(PAS_IOB_COM_PKTHDRCNT, 0);
682 n &= (RX_RING_SIZE-1);
683 }
684
685 rx_ring(mac)->next_to_clean = n;
686
687 /* Increase is in number of 16-byte entries, and since each descriptor
688 * with an 8BRES takes up 3x8 bytes (padded to 4x8), increase with
689 * count*2.
690 */
691 write_dma_reg(PAS_DMA_RXCHAN_INCR(mac->rx->chan.chno), count << 1);
692
693 pasemi_mac_replenish_rx_ring(mac->netdev, count);
694
695 mac->netdev->stats.rx_bytes += tot_bytes;
696 mac->netdev->stats.rx_packets += packets;
697
698 spin_unlock(&rx_ring(mac)->lock);
699
700 return count;
701 }
702
703 /* Can't make this too large or we blow the kernel stack limits */
704 #define TX_CLEAN_BATCHSIZE (128/MAX_SKB_FRAGS)
705
706 static int pasemi_mac_clean_tx(struct pasemi_mac_txring *txring)
707 {
708 struct pasemi_dmachan *chan = &txring->chan;
709 struct pasemi_mac *mac = txring->mac;
710 int i, j;
711 unsigned int start, descr_count, buf_count, batch_limit;
712 unsigned int ring_limit;
713 unsigned int total_count;
714 unsigned long flags;
715 struct sk_buff *skbs[TX_CLEAN_BATCHSIZE];
716 dma_addr_t dmas[TX_CLEAN_BATCHSIZE][MAX_SKB_FRAGS+1];
717
718 total_count = 0;
719 batch_limit = TX_CLEAN_BATCHSIZE;
720 restart:
721 spin_lock_irqsave(&txring->lock, flags);
722
723 start = txring->next_to_clean;
724 ring_limit = txring->next_to_fill;
725
726 /* Compensate for when fill has wrapped but clean has not */
727 if (start > ring_limit)
728 ring_limit += TX_RING_SIZE;
729
730 buf_count = 0;
731 descr_count = 0;
732
733 for (i = start;
734 descr_count < batch_limit && i < ring_limit;
735 i += buf_count) {
736 u64 mactx = TX_DESC(txring, i);
737 struct sk_buff *skb;
738
739 if ((mactx & XCT_MACTX_E) ||
740 (*chan->status & PAS_STATUS_ERROR))
741 pasemi_mac_tx_error(mac, mactx);
742
743 if (unlikely(mactx & XCT_MACTX_O))
744 /* Not yet transmitted */
745 break;
746
747 skb = TX_DESC_INFO(txring, i+1).skb;
748 skbs[descr_count] = skb;
749
750 buf_count = 2 + skb_shinfo(skb)->nr_frags;
751 for (j = 0; j <= skb_shinfo(skb)->nr_frags; j++)
752 dmas[descr_count][j] = TX_DESC_INFO(txring, i+1+j).dma;
753
754 TX_DESC(txring, i) = 0;
755 TX_DESC(txring, i+1) = 0;
756
757 /* Since we always fill with an even number of entries, make
758 * sure we skip any unused one at the end as well.
759 */
760 if (buf_count & 1)
761 buf_count++;
762 descr_count++;
763 }
764 txring->next_to_clean = i & (TX_RING_SIZE-1);
765
766 spin_unlock_irqrestore(&txring->lock, flags);
767 netif_wake_queue(mac->netdev);
768
769 for (i = 0; i < descr_count; i++)
770 pasemi_mac_unmap_tx_skb(mac, skbs[i], dmas[i]);
771
772 total_count += descr_count;
773
774 /* If the batch was full, try to clean more */
775 if (descr_count == batch_limit)
776 goto restart;
777
778 return total_count;
779 }
780
781
782 static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
783 {
784 const struct pasemi_mac_rxring *rxring = data;
785 struct pasemi_mac *mac = rxring->mac;
786 struct net_device *dev = mac->netdev;
787 const struct pasemi_dmachan *chan = &rxring->chan;
788 unsigned int reg;
789
790 if (!(*chan->status & PAS_STATUS_CAUSE_M))
791 return IRQ_NONE;
792
793 /* Don't reset packet count so it won't fire again but clear
794 * all others.
795 */
796
797 reg = 0;
798 if (*chan->status & PAS_STATUS_SOFT)
799 reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
800 if (*chan->status & PAS_STATUS_ERROR)
801 reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
802
803 netif_rx_schedule(dev, &mac->napi);
804
805 write_iob_reg(PAS_IOB_DMA_RXCH_RESET(chan->chno), reg);
806
807 return IRQ_HANDLED;
808 }
809
810 #define TX_CLEAN_INTERVAL HZ
811
812 static void pasemi_mac_tx_timer(unsigned long data)
813 {
814 struct pasemi_mac_txring *txring = (struct pasemi_mac_txring *)data;
815 struct pasemi_mac *mac = txring->mac;
816
817 pasemi_mac_clean_tx(txring);
818
819 mod_timer(&txring->clean_timer, jiffies + TX_CLEAN_INTERVAL);
820
821 pasemi_mac_restart_tx_intr(mac);
822 }
823
824 static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
825 {
826 struct pasemi_mac_txring *txring = data;
827 const struct pasemi_dmachan *chan = &txring->chan;
828 struct pasemi_mac *mac = txring->mac;
829 unsigned int reg;
830
831 if (!(*chan->status & PAS_STATUS_CAUSE_M))
832 return IRQ_NONE;
833
834 reg = 0;
835
836 if (*chan->status & PAS_STATUS_SOFT)
837 reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
838 if (*chan->status & PAS_STATUS_ERROR)
839 reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
840
841 mod_timer(&txring->clean_timer, jiffies + (TX_CLEAN_INTERVAL)*2);
842
843 netif_rx_schedule(mac->netdev, &mac->napi);
844
845 if (reg)
846 write_iob_reg(PAS_IOB_DMA_TXCH_RESET(chan->chno), reg);
847
848 return IRQ_HANDLED;
849 }
850
851 static void pasemi_adjust_link(struct net_device *dev)
852 {
853 struct pasemi_mac *mac = netdev_priv(dev);
854 int msg;
855 unsigned int flags;
856 unsigned int new_flags;
857
858 if (!mac->phydev->link) {
859 /* If no link, MAC speed settings don't matter. Just report
860 * link down and return.
861 */
862 if (mac->link && netif_msg_link(mac))
863 printk(KERN_INFO "%s: Link is down.\n", dev->name);
864
865 netif_carrier_off(dev);
866 mac->link = 0;
867
868 return;
869 } else
870 netif_carrier_on(dev);
871
872 flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
873 new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M |
874 PAS_MAC_CFG_PCFG_TSR_M);
875
876 if (!mac->phydev->duplex)
877 new_flags |= PAS_MAC_CFG_PCFG_HD;
878
879 switch (mac->phydev->speed) {
880 case 1000:
881 new_flags |= PAS_MAC_CFG_PCFG_SPD_1G |
882 PAS_MAC_CFG_PCFG_TSR_1G;
883 break;
884 case 100:
885 new_flags |= PAS_MAC_CFG_PCFG_SPD_100M |
886 PAS_MAC_CFG_PCFG_TSR_100M;
887 break;
888 case 10:
889 new_flags |= PAS_MAC_CFG_PCFG_SPD_10M |
890 PAS_MAC_CFG_PCFG_TSR_10M;
891 break;
892 default:
893 printk("Unsupported speed %d\n", mac->phydev->speed);
894 }
895
896 /* Print on link or speed/duplex change */
897 msg = mac->link != mac->phydev->link || flags != new_flags;
898
899 mac->duplex = mac->phydev->duplex;
900 mac->speed = mac->phydev->speed;
901 mac->link = mac->phydev->link;
902
903 if (new_flags != flags)
904 write_mac_reg(mac, PAS_MAC_CFG_PCFG, new_flags);
905
906 if (msg && netif_msg_link(mac))
907 printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
908 dev->name, mac->speed, mac->duplex ? "full" : "half");
909 }
910
911 static int pasemi_mac_phy_init(struct net_device *dev)
912 {
913 struct pasemi_mac *mac = netdev_priv(dev);
914 struct device_node *dn, *phy_dn;
915 struct phy_device *phydev;
916 unsigned int phy_id;
917 const phandle *ph;
918 const unsigned int *prop;
919 struct resource r;
920 int ret;
921
922 dn = pci_device_to_OF_node(mac->pdev);
923 ph = of_get_property(dn, "phy-handle", NULL);
924 if (!ph)
925 return -ENODEV;
926 phy_dn = of_find_node_by_phandle(*ph);
927
928 prop = of_get_property(phy_dn, "reg", NULL);
929 ret = of_address_to_resource(phy_dn->parent, 0, &r);
930 if (ret)
931 goto err;
932
933 phy_id = *prop;
934 snprintf(mac->phy_id, BUS_ID_SIZE, PHY_ID_FMT, (int)r.start, phy_id);
935
936 of_node_put(phy_dn);
937
938 mac->link = 0;
939 mac->speed = 0;
940 mac->duplex = -1;
941
942 phydev = phy_connect(dev, mac->phy_id, &pasemi_adjust_link, 0, PHY_INTERFACE_MODE_SGMII);
943
944 if (IS_ERR(phydev)) {
945 printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
946 return PTR_ERR(phydev);
947 }
948
949 mac->phydev = phydev;
950
951 return 0;
952
953 err:
954 of_node_put(phy_dn);
955 return -ENODEV;
956 }
957
958
959 static int pasemi_mac_open(struct net_device *dev)
960 {
961 struct pasemi_mac *mac = netdev_priv(dev);
962 unsigned int flags;
963 int ret;
964
965 /* enable rx section */
966 write_dma_reg(PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN);
967
968 /* enable tx section */
969 write_dma_reg(PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN);
970
971 flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
972 PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
973 PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
974
975 write_mac_reg(mac, PAS_MAC_CFG_TXP, flags);
976
977 ret = pasemi_mac_setup_rx_resources(dev);
978 if (ret)
979 goto out_rx_resources;
980
981 mac->tx = pasemi_mac_setup_tx_resources(dev);
982
983 if (!mac->tx)
984 goto out_tx_ring;
985
986 /* 0x3ff with 33MHz clock is about 31us */
987 write_iob_reg(PAS_IOB_DMA_COM_TIMEOUTCFG,
988 PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0x3ff));
989
990 write_iob_reg(PAS_IOB_DMA_RXCH_CFG(mac->rx->chan.chno),
991 PAS_IOB_DMA_RXCH_CFG_CNTTH(128));
992
993 write_iob_reg(PAS_IOB_DMA_TXCH_CFG(mac->tx->chan.chno),
994 PAS_IOB_DMA_TXCH_CFG_CNTTH(32));
995
996 write_mac_reg(mac, PAS_MAC_IPC_CHNL,
997 PAS_MAC_IPC_CHNL_DCHNO(mac->rx->chan.chno) |
998 PAS_MAC_IPC_CHNL_BCH(mac->rx->chan.chno));
999
1000 /* enable rx if */
1001 write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
1002 PAS_DMA_RXINT_RCMDSTA_EN |
1003 PAS_DMA_RXINT_RCMDSTA_DROPS_M |
1004 PAS_DMA_RXINT_RCMDSTA_BP |
1005 PAS_DMA_RXINT_RCMDSTA_OO |
1006 PAS_DMA_RXINT_RCMDSTA_BT);
1007
1008 /* enable rx channel */
1009 pasemi_dma_start_chan(&rx_ring(mac)->chan, PAS_DMA_RXCHAN_CCMDSTA_DU |
1010 PAS_DMA_RXCHAN_CCMDSTA_OD |
1011 PAS_DMA_RXCHAN_CCMDSTA_FD |
1012 PAS_DMA_RXCHAN_CCMDSTA_DT);
1013
1014 /* enable tx channel */
1015 pasemi_dma_start_chan(&tx_ring(mac)->chan, PAS_DMA_TXCHAN_TCMDSTA_SZ |
1016 PAS_DMA_TXCHAN_TCMDSTA_DB |
1017 PAS_DMA_TXCHAN_TCMDSTA_DE |
1018 PAS_DMA_TXCHAN_TCMDSTA_DA);
1019
1020 pasemi_mac_replenish_rx_ring(dev, RX_RING_SIZE);
1021
1022 write_dma_reg(PAS_DMA_RXCHAN_INCR(rx_ring(mac)->chan.chno),
1023 RX_RING_SIZE>>1);
1024
1025 /* Clear out any residual packet count state from firmware */
1026 pasemi_mac_restart_rx_intr(mac);
1027 pasemi_mac_restart_tx_intr(mac);
1028
1029 flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PE |
1030 PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
1031
1032 if (mac->type == MAC_TYPE_GMAC)
1033 flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
1034 else
1035 flags |= PAS_MAC_CFG_PCFG_TSR_10G | PAS_MAC_CFG_PCFG_SPD_10G;
1036
1037 /* Enable interface in MAC */
1038 write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
1039
1040 ret = pasemi_mac_phy_init(dev);
1041 /* Some configs don't have PHYs (XAUI etc), so don't complain about
1042 * failed init due to -ENODEV.
1043 */
1044 if (ret && ret != -ENODEV)
1045 dev_warn(&mac->pdev->dev, "phy init failed: %d\n", ret);
1046
1047 netif_start_queue(dev);
1048 napi_enable(&mac->napi);
1049
1050 snprintf(mac->tx_irq_name, sizeof(mac->tx_irq_name), "%s tx",
1051 dev->name);
1052
1053 ret = request_irq(mac->tx->chan.irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
1054 mac->tx_irq_name, mac->tx);
1055 if (ret) {
1056 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
1057 mac->tx->chan.irq, ret);
1058 goto out_tx_int;
1059 }
1060
1061 snprintf(mac->rx_irq_name, sizeof(mac->rx_irq_name), "%s rx",
1062 dev->name);
1063
1064 ret = request_irq(mac->rx->chan.irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
1065 mac->rx_irq_name, mac->rx);
1066 if (ret) {
1067 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
1068 mac->rx->chan.irq, ret);
1069 goto out_rx_int;
1070 }
1071
1072 if (mac->phydev)
1073 phy_start(mac->phydev);
1074
1075 init_timer(&mac->tx->clean_timer);
1076 mac->tx->clean_timer.function = pasemi_mac_tx_timer;
1077 mac->tx->clean_timer.data = (unsigned long)mac->tx;
1078 mac->tx->clean_timer.expires = jiffies+HZ;
1079 add_timer(&mac->tx->clean_timer);
1080
1081 return 0;
1082
1083 out_rx_int:
1084 free_irq(mac->tx->chan.irq, mac->tx);
1085 out_tx_int:
1086 napi_disable(&mac->napi);
1087 netif_stop_queue(dev);
1088 out_tx_ring:
1089 if (mac->tx)
1090 pasemi_mac_free_tx_resources(mac);
1091 pasemi_mac_free_rx_resources(mac);
1092 out_rx_resources:
1093
1094 return ret;
1095 }
1096
1097 #define MAX_RETRIES 5000
1098
1099 static int pasemi_mac_close(struct net_device *dev)
1100 {
1101 struct pasemi_mac *mac = netdev_priv(dev);
1102 unsigned int sta;
1103 int retries;
1104 int rxch, txch;
1105
1106 rxch = rx_ring(mac)->chan.chno;
1107 txch = tx_ring(mac)->chan.chno;
1108
1109 if (mac->phydev) {
1110 phy_stop(mac->phydev);
1111 phy_disconnect(mac->phydev);
1112 }
1113
1114 del_timer_sync(&mac->tx->clean_timer);
1115
1116 netif_stop_queue(dev);
1117 napi_disable(&mac->napi);
1118
1119 sta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1120 if (sta & (PAS_DMA_RXINT_RCMDSTA_BP |
1121 PAS_DMA_RXINT_RCMDSTA_OO |
1122 PAS_DMA_RXINT_RCMDSTA_BT))
1123 printk(KERN_DEBUG "pasemi_mac: rcmdsta error: 0x%08x\n", sta);
1124
1125 sta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch));
1126 if (sta & (PAS_DMA_RXCHAN_CCMDSTA_DU |
1127 PAS_DMA_RXCHAN_CCMDSTA_OD |
1128 PAS_DMA_RXCHAN_CCMDSTA_FD |
1129 PAS_DMA_RXCHAN_CCMDSTA_DT))
1130 printk(KERN_DEBUG "pasemi_mac: ccmdsta error: 0x%08x\n", sta);
1131
1132 sta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch));
1133 if (sta & (PAS_DMA_TXCHAN_TCMDSTA_SZ | PAS_DMA_TXCHAN_TCMDSTA_DB |
1134 PAS_DMA_TXCHAN_TCMDSTA_DE | PAS_DMA_TXCHAN_TCMDSTA_DA))
1135 printk(KERN_DEBUG "pasemi_mac: tcmdsta error: 0x%08x\n", sta);
1136
1137 /* Clean out any pending buffers */
1138 pasemi_mac_clean_tx(tx_ring(mac));
1139 pasemi_mac_clean_rx(rx_ring(mac), RX_RING_SIZE);
1140
1141 /* Disable interface */
1142 write_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch),
1143 PAS_DMA_TXCHAN_TCMDSTA_ST);
1144 write_dma_reg( PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
1145 PAS_DMA_RXINT_RCMDSTA_ST);
1146 write_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch),
1147 PAS_DMA_RXCHAN_CCMDSTA_ST);
1148
1149 for (retries = 0; retries < MAX_RETRIES; retries++) {
1150 sta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(rxch));
1151 if (!(sta & PAS_DMA_TXCHAN_TCMDSTA_ACT))
1152 break;
1153 cond_resched();
1154 }
1155
1156 if (sta & PAS_DMA_TXCHAN_TCMDSTA_ACT)
1157 dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
1158
1159 for (retries = 0; retries < MAX_RETRIES; retries++) {
1160 sta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch));
1161 if (!(sta & PAS_DMA_RXCHAN_CCMDSTA_ACT))
1162 break;
1163 cond_resched();
1164 }
1165
1166 if (sta & PAS_DMA_RXCHAN_CCMDSTA_ACT)
1167 dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
1168
1169 for (retries = 0; retries < MAX_RETRIES; retries++) {
1170 sta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1171 if (!(sta & PAS_DMA_RXINT_RCMDSTA_ACT))
1172 break;
1173 cond_resched();
1174 }
1175
1176 if (sta & PAS_DMA_RXINT_RCMDSTA_ACT)
1177 dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
1178
1179 /* Then, disable the channel. This must be done separately from
1180 * stopping, since you can't disable when active.
1181 */
1182
1183 write_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch), 0);
1184 write_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch), 0);
1185 write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
1186
1187 free_irq(mac->tx->chan.irq, mac->tx);
1188 free_irq(mac->rx->chan.irq, mac->rx);
1189
1190 /* Free resources */
1191 pasemi_mac_free_rx_resources(mac);
1192 pasemi_mac_free_tx_resources(mac);
1193
1194 return 0;
1195 }
1196
1197 static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
1198 {
1199 struct pasemi_mac *mac = netdev_priv(dev);
1200 struct pasemi_mac_txring *txring;
1201 u64 dflags, mactx;
1202 dma_addr_t map[MAX_SKB_FRAGS+1];
1203 unsigned int map_size[MAX_SKB_FRAGS+1];
1204 unsigned long flags;
1205 int i, nfrags;
1206 int fill;
1207
1208 dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_CRC_PAD;
1209
1210 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1211 const unsigned char *nh = skb_network_header(skb);
1212
1213 switch (ip_hdr(skb)->protocol) {
1214 case IPPROTO_TCP:
1215 dflags |= XCT_MACTX_CSUM_TCP;
1216 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
1217 dflags |= XCT_MACTX_IPO(nh - skb->data);
1218 break;
1219 case IPPROTO_UDP:
1220 dflags |= XCT_MACTX_CSUM_UDP;
1221 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
1222 dflags |= XCT_MACTX_IPO(nh - skb->data);
1223 break;
1224 }
1225 }
1226
1227 nfrags = skb_shinfo(skb)->nr_frags;
1228
1229 map[0] = pci_map_single(mac->dma_pdev, skb->data, skb_headlen(skb),
1230 PCI_DMA_TODEVICE);
1231 map_size[0] = skb_headlen(skb);
1232 if (dma_mapping_error(map[0]))
1233 goto out_err_nolock;
1234
1235 for (i = 0; i < nfrags; i++) {
1236 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1237
1238 map[i+1] = pci_map_page(mac->dma_pdev, frag->page,
1239 frag->page_offset, frag->size,
1240 PCI_DMA_TODEVICE);
1241 map_size[i+1] = frag->size;
1242 if (dma_mapping_error(map[i+1])) {
1243 nfrags = i;
1244 goto out_err_nolock;
1245 }
1246 }
1247
1248 mactx = dflags | XCT_MACTX_LLEN(skb->len);
1249
1250 txring = tx_ring(mac);
1251
1252 spin_lock_irqsave(&txring->lock, flags);
1253
1254 fill = txring->next_to_fill;
1255
1256 /* Avoid stepping on the same cache line that the DMA controller
1257 * is currently about to send, so leave at least 8 words available.
1258 * Total free space needed is mactx + fragments + 8
1259 */
1260 if (RING_AVAIL(txring) < nfrags + 10) {
1261 /* no room -- stop the queue and wait for tx intr */
1262 netif_stop_queue(dev);
1263 goto out_err;
1264 }
1265
1266 TX_DESC(txring, fill) = mactx;
1267 fill++;
1268 TX_DESC_INFO(txring, fill).skb = skb;
1269 for (i = 0; i <= nfrags; i++) {
1270 TX_DESC(txring, fill+i) =
1271 XCT_PTR_LEN(map_size[i]) | XCT_PTR_ADDR(map[i]);
1272 TX_DESC_INFO(txring, fill+i).dma = map[i];
1273 }
1274
1275 /* We have to add an even number of 8-byte entries to the ring
1276 * even if the last one is unused. That means always an odd number
1277 * of pointers + one mactx descriptor.
1278 */
1279 if (nfrags & 1)
1280 nfrags++;
1281
1282 txring->next_to_fill = (fill + nfrags + 1) & (TX_RING_SIZE-1);
1283
1284 dev->stats.tx_packets++;
1285 dev->stats.tx_bytes += skb->len;
1286
1287 spin_unlock_irqrestore(&txring->lock, flags);
1288
1289 write_dma_reg(PAS_DMA_TXCHAN_INCR(txring->chan.chno), (nfrags+2) >> 1);
1290
1291 return NETDEV_TX_OK;
1292
1293 out_err:
1294 spin_unlock_irqrestore(&txring->lock, flags);
1295 out_err_nolock:
1296 while (nfrags--)
1297 pci_unmap_single(mac->dma_pdev, map[nfrags], map_size[nfrags],
1298 PCI_DMA_TODEVICE);
1299
1300 return NETDEV_TX_BUSY;
1301 }
1302
1303 static void pasemi_mac_set_rx_mode(struct net_device *dev)
1304 {
1305 const struct pasemi_mac *mac = netdev_priv(dev);
1306 unsigned int flags;
1307
1308 flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
1309
1310 /* Set promiscuous */
1311 if (dev->flags & IFF_PROMISC)
1312 flags |= PAS_MAC_CFG_PCFG_PR;
1313 else
1314 flags &= ~PAS_MAC_CFG_PCFG_PR;
1315
1316 write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
1317 }
1318
1319
1320 static int pasemi_mac_poll(struct napi_struct *napi, int budget)
1321 {
1322 struct pasemi_mac *mac = container_of(napi, struct pasemi_mac, napi);
1323 struct net_device *dev = mac->netdev;
1324 int pkts;
1325
1326 pasemi_mac_clean_tx(tx_ring(mac));
1327 pkts = pasemi_mac_clean_rx(rx_ring(mac), budget);
1328 if (pkts < budget) {
1329 /* all done, no more packets present */
1330 netif_rx_complete(dev, napi);
1331
1332 pasemi_mac_restart_rx_intr(mac);
1333 pasemi_mac_restart_tx_intr(mac);
1334 }
1335 return pkts;
1336 }
1337
1338 static int __devinit
1339 pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1340 {
1341 struct net_device *dev;
1342 struct pasemi_mac *mac;
1343 int err;
1344 DECLARE_MAC_BUF(mac_buf);
1345
1346 err = pci_enable_device(pdev);
1347 if (err)
1348 return err;
1349
1350 dev = alloc_etherdev(sizeof(struct pasemi_mac));
1351 if (dev == NULL) {
1352 dev_err(&pdev->dev,
1353 "pasemi_mac: Could not allocate ethernet device.\n");
1354 err = -ENOMEM;
1355 goto out_disable_device;
1356 }
1357
1358 pci_set_drvdata(pdev, dev);
1359 SET_NETDEV_DEV(dev, &pdev->dev);
1360
1361 mac = netdev_priv(dev);
1362
1363 mac->pdev = pdev;
1364 mac->netdev = dev;
1365
1366 netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64);
1367
1368 dev->features = NETIF_F_IP_CSUM | NETIF_F_LLTX | NETIF_F_SG |
1369 NETIF_F_HIGHDMA;
1370
1371 mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
1372 if (!mac->dma_pdev) {
1373 dev_err(&mac->pdev->dev, "Can't find DMA Controller\n");
1374 err = -ENODEV;
1375 goto out;
1376 }
1377
1378 mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
1379 if (!mac->iob_pdev) {
1380 dev_err(&mac->pdev->dev, "Can't find I/O Bridge\n");
1381 err = -ENODEV;
1382 goto out;
1383 }
1384
1385 /* get mac addr from device tree */
1386 if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
1387 err = -ENODEV;
1388 goto out;
1389 }
1390 memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
1391
1392 mac->dma_if = mac_to_intf(mac);
1393 if (mac->dma_if < 0) {
1394 dev_err(&mac->pdev->dev, "Can't map DMA interface\n");
1395 err = -ENODEV;
1396 goto out;
1397 }
1398
1399 switch (pdev->device) {
1400 case 0xa005:
1401 mac->type = MAC_TYPE_GMAC;
1402 break;
1403 case 0xa006:
1404 mac->type = MAC_TYPE_XAUI;
1405 break;
1406 default:
1407 err = -ENODEV;
1408 goto out;
1409 }
1410
1411 dev->open = pasemi_mac_open;
1412 dev->stop = pasemi_mac_close;
1413 dev->hard_start_xmit = pasemi_mac_start_tx;
1414 dev->set_multicast_list = pasemi_mac_set_rx_mode;
1415
1416 if (err)
1417 goto out;
1418
1419 mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
1420
1421 /* Enable most messages by default */
1422 mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
1423
1424 err = register_netdev(dev);
1425
1426 if (err) {
1427 dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
1428 err);
1429 goto out;
1430 } else if netif_msg_probe(mac)
1431 printk(KERN_INFO "%s: PA Semi %s: intf %d, hw addr %s\n",
1432 dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
1433 mac->dma_if, print_mac(mac_buf, dev->dev_addr));
1434
1435 return err;
1436
1437 out:
1438 if (mac->iob_pdev)
1439 pci_dev_put(mac->iob_pdev);
1440 if (mac->dma_pdev)
1441 pci_dev_put(mac->dma_pdev);
1442
1443 free_netdev(dev);
1444 out_disable_device:
1445 pci_disable_device(pdev);
1446 return err;
1447
1448 }
1449
1450 static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
1451 {
1452 struct net_device *netdev = pci_get_drvdata(pdev);
1453 struct pasemi_mac *mac;
1454
1455 if (!netdev)
1456 return;
1457
1458 mac = netdev_priv(netdev);
1459
1460 unregister_netdev(netdev);
1461
1462 pci_disable_device(pdev);
1463 pci_dev_put(mac->dma_pdev);
1464 pci_dev_put(mac->iob_pdev);
1465
1466 pasemi_dma_free_chan(&mac->tx->chan);
1467 pasemi_dma_free_chan(&mac->rx->chan);
1468
1469 pci_set_drvdata(pdev, NULL);
1470 free_netdev(netdev);
1471 }
1472
1473 static struct pci_device_id pasemi_mac_pci_tbl[] = {
1474 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
1475 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
1476 { },
1477 };
1478
1479 MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
1480
1481 static struct pci_driver pasemi_mac_driver = {
1482 .name = "pasemi_mac",
1483 .id_table = pasemi_mac_pci_tbl,
1484 .probe = pasemi_mac_probe,
1485 .remove = __devexit_p(pasemi_mac_remove),
1486 };
1487
1488 static void __exit pasemi_mac_cleanup_module(void)
1489 {
1490 pci_unregister_driver(&pasemi_mac_driver);
1491 }
1492
1493 int pasemi_mac_init_module(void)
1494 {
1495 int err;
1496
1497 err = pasemi_dma_init();
1498 if (err)
1499 return err;
1500
1501 return pci_register_driver(&pasemi_mac_driver);
1502 }
1503
1504 module_init(pasemi_mac_init_module);
1505 module_exit(pasemi_mac_cleanup_module);
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