2 * linux/arch/i386/kernel/head.S -- the 32-bit startup code.
4 * Copyright (C) 1991, 1992 Linus Torvalds
6 * Enhanced CPU detection and feature setting code by Mike Jagdis
7 * and Martin Mares, November 1997.
11 #include <linux/threads.h>
12 #include <linux/linkage.h>
13 #include <asm/segment.h>
15 #include <asm/pgtable.h>
17 #include <asm/cache.h>
18 #include <asm/thread_info.h>
19 #include <asm/asm-offsets.h>
20 #include <asm/setup.h>
23 * References to members of the new_cpu_data structure.
26 #define X86 new_cpu_data+CPUINFO_x86
27 #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
28 #define X86_MODEL new_cpu_data+CPUINFO_x86_model
29 #define X86_MASK new_cpu_data+CPUINFO_x86_mask
30 #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
31 #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
32 #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
33 #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
36 * This is how much memory *in addition to the memory covered up to
37 * and including _end* we need mapped initially. We need one bit for
38 * each possible page, but only in low memory, which means
39 * 2^32/4096/8 = 128K worst case (4G/4G split.)
41 * Modulo rounding, each megabyte assigned here requires a kilobyte of
42 * memory, which is currently unreclaimed.
44 * This should be a multiple of a page.
46 #define INIT_MAP_BEYOND_END (128*1024)
50 * 32-bit kernel entrypoint; only used by the boot CPU. On entry,
51 * %esi points to the real-mode code as a 32-bit pointer.
52 * CS and DS must be 4 GB flat segments, but we don't depend on
53 * any particular GDT layout, because we load our own as soon as we
56 .section .text.head,"ax",@progbits
59 #ifdef CONFIG_PARAVIRT
66 * Set segments to known values.
69 lgdt boot_gdt_descr - __PAGE_OFFSET
70 movl $(__BOOT_DS),%eax
77 * Clear BSS first so that there are no surprises...
78 * No need to cld as DF is already clear from cld above...
81 movl $__bss_start - __PAGE_OFFSET,%edi
82 movl $__bss_stop - __PAGE_OFFSET,%ecx
87 * Copy bootup parameters out of the way.
88 * Note: %esi still has the pointer to the real-mode data.
89 * With the kexec as boot loader, parameter segment might be loaded beyond
90 * kernel image and might not even be addressable by early boot page tables.
91 * (kexec on panic case). Hence copy out the parameters before initializing
94 movl $(boot_params - __PAGE_OFFSET),%edi
95 movl $(PARAM_SIZE/4),%ecx
99 movl boot_params - __PAGE_OFFSET + NEW_CL_POINTER,%esi
101 jnz 2f # New command line protocol
102 cmpw $(OLD_CL_MAGIC),OLD_CL_MAGIC_ADDR
104 movzwl OLD_CL_OFFSET,%esi
105 addl $(OLD_CL_BASE_ADDR),%esi
107 movl $(boot_command_line - __PAGE_OFFSET),%edi
108 movl $(COMMAND_LINE_SIZE/4),%ecx
114 * Initialize page tables. This creates a PDE and a set of page
115 * tables, which are located immediately beyond _end. The variable
116 * init_pg_tables_end is set up to point to the first "safe" location.
117 * Mappings are created both at virtual address 0 (identity mapping)
118 * and PAGE_OFFSET for up to _end+sizeof(page tables)+INIT_MAP_BEYOND_END.
120 * Warning: don't use %esi or the stack in this code. However, %esp
121 * can be used as a GPR if you really need it...
123 page_pde_offset = (__PAGE_OFFSET >> 20);
125 movl $(pg0 - __PAGE_OFFSET), %edi
126 movl $(swapper_pg_dir - __PAGE_OFFSET), %edx
127 movl $0x007, %eax /* 0x007 = PRESENT+RW+USER */
129 leal 0x007(%edi),%ecx /* Create PDE entry */
130 movl %ecx,(%edx) /* Store identity PDE entry */
131 movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */
138 /* End condition: we must map up to and including INIT_MAP_BEYOND_END */
139 /* bytes beyond the end of our own page tables; the +0x007 is the attribute bits */
140 leal (INIT_MAP_BEYOND_END+0x007)(%edi),%ebp
143 movl %edi,(init_pg_tables_end - __PAGE_OFFSET)
145 xorl %ebx,%ebx /* This is the boot CPU (BSP) */
148 * Non-boot CPU entry point; entered from trampoline.S
149 * We can't lgdt here, because lgdt itself uses a data segment, but
150 * we know the trampoline has already loaded the boot_gdt_table GDT
153 * If cpu hotplug is not supported then this code can go in init section
154 * which will be freed later
157 #ifdef CONFIG_HOTPLUG_CPU
158 .section .text,"ax",@progbits
160 .section .init.text,"ax",@progbits
164 ENTRY(startup_32_smp)
166 movl $(__BOOT_DS),%eax
173 * New page tables may be in 4Mbyte page mode and may
174 * be using the global pages.
176 * NOTE! If we are on a 486 we may have no cr4 at all!
177 * So we do not try to touch it unless we really have
178 * some bits in it to set. This won't work if the BSP
179 * implements cr4 but this AP does not -- very unlikely
180 * but be warned! The same applies to the pse feature
181 * if not equally supported. --macro
183 * NOTE! We have to correct for the fact that we're
184 * not yet offset PAGE_OFFSET..
186 #define cr4_bits mmu_cr4_features-__PAGE_OFFSET
190 movl %cr4,%eax # Turn on paging options (PSE,PAE,..)
194 btl $5, %eax # check if PAE is enabled
197 /* Check if extended functions are implemented */
198 movl $0x80000000, %eax
200 cmpl $0x80000000, %eax
202 mov $0x80000001, %eax
204 /* Execute Disable bit supported? */
208 /* Setup EFER (Extended Feature Enable Register) */
209 movl $0xc0000080, %ecx
213 /* Make changes effective */
217 /* This is a secondary processor (AP) */
221 #endif /* CONFIG_SMP */
227 movl $swapper_pg_dir-__PAGE_OFFSET,%eax
228 movl %eax,%cr3 /* set the page table pointer.. */
231 movl %eax,%cr0 /* ..and set paging (PG) bit */
232 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
234 /* Set up the stack pointer */
238 * Initialize eflags. Some BIOS's leave bits like NT set. This would
239 * confuse the debugger if this code is traced.
240 * XXX - best to initialize before switching to protected mode.
247 jz 1f /* Initial CPU cleans BSS */
250 #endif /* CONFIG_SMP */
253 * start system 32-bit setup. We need to re-do some of the things done
254 * in 16-bit mode for the "real" operations.
260 movl $-1,X86_CPUID # -1 for no CPUID initially
262 /* check if it is 486 or 386. */
264 * XXX - this does a lot of unnecessary setup. Alignment checks don't
265 * apply at our cpl of 0 and the stack ought to be aligned already, and
266 * we don't need to preserve eflags.
269 movb $3,X86 # at least 386
271 popl %eax # get EFLAGS
272 movl %eax,%ecx # save original EFLAGS
273 xorl $0x240000,%eax # flip AC and ID bits in EFLAGS
274 pushl %eax # copy to EFLAGS
276 pushfl # get new EFLAGS
277 popl %eax # put it in eax
278 xorl %ecx,%eax # change in flags
279 pushl %ecx # restore original EFLAGS
281 testl $0x40000,%eax # check if AC bit changed
284 movb $4,X86 # at least 486
285 testl $0x200000,%eax # check if ID bit changed
288 /* get vendor info */
289 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
291 movl %eax,X86_CPUID # save CPUID level
292 movl %ebx,X86_VENDOR_ID # lo 4 chars
293 movl %edx,X86_VENDOR_ID+4 # next 4 chars
294 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
296 orl %eax,%eax # do we have processor info as well?
299 movl $1,%eax # Use the CPUID instruction to get CPU type
301 movb %al,%cl # save reg for future use
302 andb $0x0f,%ah # mask processor family
304 andb $0xf0,%al # mask model
307 andb $0x0f,%cl # mask mask revision
309 movl %edx,X86_CAPABILITY
311 is486: movl $0x50022,%ecx # set AM, WP, NE and MP
314 is386: movl $2,%ecx # set MP
316 andl $0x80000011,%eax # Save PG,PE,ET
324 ljmp $(__KERNEL_CS),$1f
325 1: movl $(__KERNEL_DS),%eax # reload all the segment registers
326 movl %eax,%ss # after changing gdt.
328 movl $(__USER_DS),%eax # DS/ES contains default USER segment
332 xorl %eax,%eax # Clear GS and LDT
336 movl $(__KERNEL_PDA),%eax
339 cld # gcc2 wants the direction flag cleared at all times
340 pushl $0 # fake return address for unwinder
344 cmpb $0,%cl # the first CPU calls start_kernel
345 jne initialize_secondary # all other CPUs call initialize_secondary
346 #endif /* CONFIG_SMP */
350 * We depend on ET to be correct. This checks for 287/387.
353 movb $0,X86_HARD_MATH
359 movl %cr0,%eax /* no coprocessor: have to set bits */
360 xorl $4,%eax /* set EM */
364 1: movb $1,X86_HARD_MATH
365 .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */
369 * Point the GDT at this CPU's PDA. On boot this will be
370 * cpu_gdt_table and boot_pda; for secondary CPUs, these will be
371 * that CPU's GDT and PDA.
374 /* get the PDA pointer */
377 /* slot the PDA address into the GDT */
378 mov cpu_gdt_descr+2, %ecx
379 mov %ax, (__KERNEL_PDA+0+2)(%ecx) /* base & 0x0000ffff */
381 mov %al, (__KERNEL_PDA+4+0)(%ecx) /* base & 0x00ff0000 */
382 mov %ah, (__KERNEL_PDA+4+3)(%ecx) /* base & 0xff000000 */
388 * sets up a idt with 256 entries pointing to
389 * ignore_int, interrupt gates. It doesn't actually load
390 * idt - that can be done only after paging has been enabled
391 * and the kernel moved to PAGE_OFFSET. Interrupts
392 * are enabled elsewhere, when we can be relatively
393 * sure everything is ok.
395 * Warning: %esi is live across this function.
399 movl $(__KERNEL_CS << 16),%eax
400 movw %dx,%ax /* selector = 0x0010 = cs */
401 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
412 .macro set_early_handler handler,trapno
414 movl $(__KERNEL_CS << 16),%eax
416 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
418 movl %eax,8*\trapno(%edi)
419 movl %edx,8*\trapno+4(%edi)
422 set_early_handler handler=early_divide_err,trapno=0
423 set_early_handler handler=early_illegal_opcode,trapno=6
424 set_early_handler handler=early_protection_fault,trapno=13
425 set_early_handler handler=early_page_fault,trapno=14
431 pushl $0 /* fake errcode */
434 early_illegal_opcode:
436 pushl $0 /* fake errcode */
439 early_protection_fault:
450 movl $(__KERNEL_DS),%eax
453 cmpl $2,early_recursion_flag
455 incl early_recursion_flag
458 pushl %edx /* trapno */
460 #ifdef CONFIG_EARLY_PRINTK
470 /* This is the default interrupt "handler" :-) */
480 movl $(__KERNEL_DS),%eax
483 cmpl $2,early_recursion_flag
485 incl early_recursion_flag
491 #ifdef CONFIG_EARLY_PRINTK
506 #ifdef CONFIG_PARAVIRT
509 movl $(init_thread_union+THREAD_SIZE),%esp
511 /* We take pains to preserve all the regs. */
516 pushl $__start_paravirtprobe
519 cmpl $__stop_paravirtprobe, %eax
520 je unhandled_paravirt
534 /* Nothing wanted us: we're screwed. */
539 * Real beginning of normal "text" segment
547 .section ".bss.page_aligned","w"
548 ENTRY(swapper_pg_dir)
550 ENTRY(empty_zero_page)
554 * This starts the data section.
561 .long init_thread_union+THREAD_SIZE
566 early_recursion_flag:
570 .asciz "Unknown interrupt or fault at EIP %p %p %p\n"
573 .ascii "Int %d: CR2 %p err %p EIP %p CS %p flags %p\n"
574 .asciz "Stack: %p %p %p %p %p %p %p %p\n"
577 * The IDT and GDT 'descriptors' are a strange 48-bit object
578 * only used by the lidt and lgdt instructions. They are not
579 * like usual segment descriptors - they consist of a 16-bit
580 * segment size, and 32-bit linear address value:
583 .globl boot_gdt_descr
587 # early boot GDT descriptor (must use 1:1 address mapping)
588 .word 0 # 32 bit align gdt_desc.address
591 .long boot_gdt_table - __PAGE_OFFSET
593 .word 0 # 32-bit align idt_desc.address
595 .word IDT_ENTRIES*8-1 # idt contains 256 entries
598 # boot GDT descriptor (later on used by CPU#0):
599 .word 0 # 32 bit align gdt_desc.address
601 .word GDT_ENTRIES*8-1
605 * The boot_gdt_table must mirror the equivalent in setup.S and is
606 * used only for booting.
608 .align L1_CACHE_BYTES
609 ENTRY(boot_gdt_table)
610 .fill GDT_ENTRY_BOOT_CS,8,0
611 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
612 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */
615 * The Global Descriptor Table contains 28 quadwords, per-CPU.
617 .align L1_CACHE_BYTES
619 .quad 0x0000000000000000 /* NULL descriptor */
620 .quad 0x0000000000000000 /* 0x0b reserved */
621 .quad 0x0000000000000000 /* 0x13 reserved */
622 .quad 0x0000000000000000 /* 0x1b reserved */
623 .quad 0x0000000000000000 /* 0x20 unused */
624 .quad 0x0000000000000000 /* 0x28 unused */
625 .quad 0x0000000000000000 /* 0x33 TLS entry 1 */
626 .quad 0x0000000000000000 /* 0x3b TLS entry 2 */
627 .quad 0x0000000000000000 /* 0x43 TLS entry 3 */
628 .quad 0x0000000000000000 /* 0x4b reserved */
629 .quad 0x0000000000000000 /* 0x53 reserved */
630 .quad 0x0000000000000000 /* 0x5b reserved */
632 .quad 0x00cf9a000000ffff /* 0x60 kernel 4GB code at 0x00000000 */
633 .quad 0x00cf92000000ffff /* 0x68 kernel 4GB data at 0x00000000 */
634 .quad 0x00cffa000000ffff /* 0x73 user 4GB code at 0x00000000 */
635 .quad 0x00cff2000000ffff /* 0x7b user 4GB data at 0x00000000 */
637 .quad 0x0000000000000000 /* 0x80 TSS descriptor */
638 .quad 0x0000000000000000 /* 0x88 LDT descriptor */
641 * Segments used for calling PnP BIOS have byte granularity.
642 * They code segments and data segments have fixed 64k limits,
643 * the transfer segment sizes are set at run time.
645 .quad 0x00409a000000ffff /* 0x90 32-bit code */
646 .quad 0x00009a000000ffff /* 0x98 16-bit code */
647 .quad 0x000092000000ffff /* 0xa0 16-bit data */
648 .quad 0x0000920000000000 /* 0xa8 16-bit data */
649 .quad 0x0000920000000000 /* 0xb0 16-bit data */
652 * The APM segments have byte granularity and their bases
653 * are set at run time. All have 64k limits.
655 .quad 0x00409a000000ffff /* 0xb8 APM CS code */
656 .quad 0x00009a000000ffff /* 0xc0 APM CS 16 code (16 bit) */
657 .quad 0x004092000000ffff /* 0xc8 APM DS data */
659 .quad 0x00c0920000000000 /* 0xd0 - ESPFIX SS */
660 .quad 0x00cf92000000ffff /* 0xd8 - PDA */
661 .quad 0x0000000000000000 /* 0xe0 - unused */
662 .quad 0x0000000000000000 /* 0xe8 - unused */
663 .quad 0x0000000000000000 /* 0xf0 - unused */
664 .quad 0x0000000000000000 /* 0xf8 - GDT entry 31: double-fault TSS */