arch/arm/mach-pxa/cpufreq-pxa3xx.c

   1 /*
   2  * linux/arch/arm/mach-pxa/cpufreq-pxa3xx.c
   3  *
   4  * Copyright (C) 2008 Marvell International Ltd.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/sched.h>
  15 #include <linux/init.h>
  16 #include <linux/cpufreq.h>
  17
  18 #include <mach/pxa3xx-regs.h>
  19
  20 #include "generic.h"
  21
  22 #define HSS_104M        (0)
  23 #define HSS_156M        (1)
  24 #define HSS_208M        (2)
  25 #define HSS_312M        (3)
  26
  27 #define SMCFS_78M       (0)
  28 #define SMCFS_104M      (2)
  29 #define SMCFS_208M      (5)
  30
  31 #define SFLFS_104M      (0)
  32 #define SFLFS_156M      (1)
  33 #define SFLFS_208M      (2)
  34 #define SFLFS_312M      (3)
  35
  36 #define XSPCLK_156M     (0)
  37 #define XSPCLK_NONE     (3)
  38
  39 #define DMCFS_26M       (0)
  40 #define DMCFS_260M      (3)
  41
  42 struct pxa3xx_freq_info {
  43         unsigned int cpufreq_mhz;
  44         unsigned int core_xl : 5;
  45         unsigned int core_xn : 3;
  46         unsigned int hss : 2;
  47         unsigned int dmcfs : 2;
  48         unsigned int smcfs : 3;
  49         unsigned int sflfs : 2;
  50         unsigned int df_clkdiv : 3;
  51
  52         int     vcc_core;       /* in mV */
  53         int     vcc_sram;       /* in mV */
  54 };
  55
  56 #define OP(cpufreq, _xl, _xn, _hss, _dmc, _smc, _sfl, _dfi, vcore, vsram) \
  57 {                                                                       \
  58         .cpufreq_mhz    = cpufreq,                                      \
  59         .core_xl        = _xl,                                          \
  60         .core_xn        = _xn,                                          \
  61         .hss            = HSS_##_hss##M,                                \
  62         .dmcfs          = DMCFS_##_dmc##M,                              \
  63         .smcfs          = SMCFS_##_smc##M,                              \
  64         .sflfs          = SFLFS_##_sfl##M,                              \
  65         .df_clkdiv      = _dfi,                                         \
  66         .vcc_core       = vcore,                                        \
  67         .vcc_sram       = vsram,                                        \
  68 }
  69
  70 static struct pxa3xx_freq_info pxa300_freqs[] = {
  71         /*  CPU XL XN  HSS DMEM SMEM SRAM DFI VCC_CORE VCC_SRAM */
  72         OP(104,  8, 1, 104, 260,  78, 104, 3, 1000, 1100), /* 104MHz */
  73         OP(208, 16, 1, 104, 260, 104, 156, 2, 1000, 1100), /* 208MHz */
  74         OP(416, 16, 2, 156, 260, 104, 208, 2, 1100, 1200), /* 416MHz */
  75         OP(624, 24, 2, 208, 260, 208, 312, 3, 1375, 1400), /* 624MHz */
  76 };
  77
  78 static struct pxa3xx_freq_info pxa320_freqs[] = {
  79         /*  CPU XL XN  HSS DMEM SMEM SRAM DFI VCC_CORE VCC_SRAM */
  80         OP(104,  8, 1, 104, 260,  78, 104, 3, 1000, 1100), /* 104MHz */
  81         OP(208, 16, 1, 104, 260, 104, 156, 2, 1000, 1100), /* 208MHz */
  82         OP(416, 16, 2, 156, 260, 104, 208, 2, 1100, 1200), /* 416MHz */
  83         OP(624, 24, 2, 208, 260, 208, 312, 3, 1375, 1400), /* 624MHz */
  84         OP(806, 31, 2, 208, 260, 208, 312, 3, 1400, 1400), /* 806MHz */
  85 };
  86
  87 static unsigned int pxa3xx_freqs_num;
  88 static struct pxa3xx_freq_info *pxa3xx_freqs;
  89 static struct cpufreq_frequency_table *pxa3xx_freqs_table;
  90
  91 static int setup_freqs_table(struct cpufreq_policy *policy,
  92                              struct pxa3xx_freq_info *freqs, int num)
  93 {
  94         struct cpufreq_frequency_table *table;
  95         int i;
  96
  97         table = kzalloc((num + 1) * sizeof(*table), GFP_KERNEL);
  98         if (table == NULL)
  99                 return -ENOMEM;
 100
 101         for (i = 0; i < num; i++) {
 102                 table[i].index = i;
 103                 table[i].frequency = freqs[i].cpufreq_mhz * 1000;
 104         }
 105         table[num].frequency = i;
 106         table[num].frequency = CPUFREQ_TABLE_END;
 107
 108         pxa3xx_freqs = freqs;
 109         pxa3xx_freqs_num = num;
 110         pxa3xx_freqs_table = table;
 111
 112         return cpufreq_frequency_table_cpuinfo(policy, table);
 113 }
 114
 115 static void __update_core_freq(struct pxa3xx_freq_info *info)
 116 {
 117         uint32_t mask = ACCR_XN_MASK | ACCR_XL_MASK;
 118         uint32_t accr = ACCR;
 119         uint32_t xclkcfg;
 120
 121         accr &= ~(ACCR_XN_MASK | ACCR_XL_MASK | ACCR_XSPCLK_MASK);
 122         accr |= ACCR_XN(info->core_xn) | ACCR_XL(info->core_xl);
 123
 124         /* No clock until core PLL is re-locked */
 125         accr |= ACCR_XSPCLK(XSPCLK_NONE);
 126
 127         xclkcfg = (info->core_xn == 2) ? 0x3 : 0x2;     /* turbo bit */
 128
 129         ACCR = accr;
 130         __asm__("mcr p14, 0, %0, c6, c0, 0\n" : : "r"(xclkcfg));
 131
 132         while ((ACSR & mask) != (accr & mask))
 133                 cpu_relax();
 134 }
 135
 136 static void __update_bus_freq(struct pxa3xx_freq_info *info)
 137 {
 138         uint32_t mask;
 139         uint32_t accr = ACCR;
 140
 141         mask = ACCR_SMCFS_MASK | ACCR_SFLFS_MASK | ACCR_HSS_MASK |
 142                 ACCR_DMCFS_MASK;
 143
 144         accr &= ~mask;
 145         accr |= ACCR_SMCFS(info->smcfs) | ACCR_SFLFS(info->sflfs) |
 146                 ACCR_HSS(info->hss) | ACCR_DMCFS(info->dmcfs);
 147
 148         ACCR = accr;
 149
 150         while ((ACSR & mask) != (accr & mask))
 151                 cpu_relax();
 152 }
 153
 154 static int pxa3xx_cpufreq_verify(struct cpufreq_policy *policy)
 155 {
 156         return cpufreq_frequency_table_verify(policy, pxa3xx_freqs_table);
 157 }
 158
 159 static unsigned int pxa3xx_cpufreq_get(unsigned int cpu)
 160 {
 161         return get_clk_frequency_khz(0);
 162 }
 163
 164 static int pxa3xx_cpufreq_set(struct cpufreq_policy *policy,
 165                               unsigned int target_freq,
 166                               unsigned int relation)
 167 {
 168         struct pxa3xx_freq_info *next;
 169         struct cpufreq_freqs freqs;
 170         unsigned long flags;
 171         int idx;
 172
 173         if (policy->cpu != 0)
 174                 return -EINVAL;
 175
 176         /* Lookup the next frequency */
 177         if (cpufreq_frequency_table_target(policy, pxa3xx_freqs_table,
 178                                 target_freq, relation, &idx))
 179                 return -EINVAL;
 180
 181         next = &pxa3xx_freqs[idx];
 182
 183         freqs.old = policy->cur;
 184         freqs.new = next->cpufreq_mhz * 1000;
 185         freqs.cpu = policy->cpu;
 186
 187         pr_debug("CPU frequency from %d MHz to %d MHz%s\n",
 188                         freqs.old / 1000, freqs.new / 1000,
 189                         (freqs.old == freqs.new) ? " (skipped)" : "");
 190
 191         if (freqs.old == target_freq)
 192                 return 0;
 193
 194         cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
 195
 196         local_irq_save(flags);
 197         __update_core_freq(next);
 198         __update_bus_freq(next);
 199         local_irq_restore(flags);
 200
 201         cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 202
 203         return 0;
 204 }
 205
 206 static __init int pxa3xx_cpufreq_init(struct cpufreq_policy *policy)
 207 {
 208         int ret = -EINVAL;
 209
 210         /* set default policy and cpuinfo */
 211         policy->cpuinfo.min_freq = 104000;
 212         policy->cpuinfo.max_freq = (cpu_is_pxa320()) ? 806000 : 624000;
 213         policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
 214         policy->cur = policy->min = policy->max = get_clk_frequency_khz(0);
 215
 216         if (cpu_is_pxa300() || cpu_is_pxa310())
 217                 ret = setup_freqs_table(policy, ARRAY_AND_SIZE(pxa300_freqs));
 218
 219         if (cpu_is_pxa320())
 220                 ret = setup_freqs_table(policy, ARRAY_AND_SIZE(pxa320_freqs));
 221
 222         if (ret) {
 223                 pr_err("failed to setup frequency table\n");
 224                 return ret;
 225         }
 226
 227         pr_info("CPUFREQ support for PXA3xx initialized\n");
 228         return 0;
 229 }
 230
 231 static struct cpufreq_driver pxa3xx_cpufreq_driver = {
 232         .verify         = pxa3xx_cpufreq_verify,
 233         .target         = pxa3xx_cpufreq_set,
 234         .init           = pxa3xx_cpufreq_init,
 235         .get            = pxa3xx_cpufreq_get,
 236         .name           = "pxa3xx-cpufreq",
 237 };
 238
 239 static int __init cpufreq_init(void)
 240 {
 241         if (cpu_is_pxa3xx())
 242                 return cpufreq_register_driver(&pxa3xx_cpufreq_driver);
 243
 244         return 0;
 245 }
 246 module_init(cpufreq_init);
 247
 248 static void __exit cpufreq_exit(void)
 249 {
 250         cpufreq_unregister_driver(&pxa3xx_cpufreq_driver);
 251 }
 252 module_exit(cpufreq_exit);
 253
 254 MODULE_DESCRIPTION("CPU frequency scaling driver for PXA3xx");
 255 MODULE_LICENSE("GPL");