2 * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #ifndef __ASM_ARCH_MXC_BOARD_MX31PDK_H__
12 #define __ASM_ARCH_MXC_BOARD_MX31PDK_H__
14 /* Definitions for components on the Debug board */
16 /* Base address of CPLD controller on the Debug board */
17 #define DEBUG_BASE_ADDRESS CS5_IO_ADDRESS(CS5_BASE_ADDR)
19 /* LAN9217 ethernet base address */
20 #define LAN9217_BASE_ADDR CS5_BASE_ADDR
22 /* CPLD config and interrupt base address */
23 #define CPLD_ADDR (DEBUG_BASE_ADDRESS + 0x20000)
26 #define CPLD_LED_REG (CPLD_ADDR + 0x00)
28 #define CPLD_SWITCH_BUTTONS_REG (EXPIO_ADDR + 0x08)
29 /* status, interrupt */
30 #define CPLD_INT_STATUS_REG (CPLD_ADDR + 0x10)
31 #define CPLD_INT_MASK_REG (CPLD_ADDR + 0x38)
32 #define CPLD_INT_RESET_REG (CPLD_ADDR + 0x20)
33 /* magic word for debug CPLD */
34 #define CPLD_MAGIC_NUMBER1_REG (CPLD_ADDR + 0x40)
35 #define CPLD_MAGIC_NUMBER2_REG (CPLD_ADDR + 0x48)
36 /* CPLD code version */
37 #define CPLD_CODE_VER_REG (CPLD_ADDR + 0x50)
38 /* magic word for debug CPLD */
39 #define CPLD_MAGIC_NUMBER3_REG (CPLD_ADDR + 0x58)
40 /* module reset register */
41 #define CPLD_MODULE_RESET_REG (CPLD_ADDR + 0x60)
42 /* CPU ID and Personality ID */
43 #define CPLD_MCU_BOARD_ID_REG (CPLD_ADDR + 0x68)
45 /* CPLD IRQ line for external uart, external ethernet etc */
46 #define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_1)
48 #define MXC_EXP_IO_BASE (MXC_BOARD_IRQ_START)
49 #define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_EXP_IO_BASE)
51 #define EXPIO_INT_ENET (MXC_EXP_IO_BASE + 0)
52 #define EXPIO_INT_XUART_A (MXC_EXP_IO_BASE + 1)
53 #define EXPIO_INT_XUART_B (MXC_EXP_IO_BASE + 2)
54 #define EXPIO_INT_BUTTON_A (MXC_EXP_IO_BASE + 3)
55 #define EXPIO_INT_BUTTON_B (MXC_EXP_IO_BASE + 4)
57 #define MXC_MAX_EXP_IO_LINES 16
59 #endif /* __ASM_ARCH_MXC_BOARD_MX31PDK_H__ */