arch/m68knommu/platform/5249/config.c

   1 /***************************************************************************/
   2
   3 /*
   4  *      linux/arch/m68knommu/platform/5249/config.c
   5  *
   6  *      Copyright (C) 2002, Greg Ungerer (gerg@snapgear.com)
   7  */
   8
   9 /***************************************************************************/
  10
  11 #include <linux/kernel.h>
  12 #include <linux/param.h>
  13 #include <linux/init.h>
  14 #include <linux/io.h>
  15 #include <asm/machdep.h>
  16 #include <asm/coldfire.h>
  17 #include <asm/mcfsim.h>
  18 #include <asm/mcfuart.h>
  19
  20 /***************************************************************************/
  21
  22 static struct mcf_platform_uart m5249_uart_platform[] = {
  23         {
  24                 .mapbase        = MCF_MBAR + MCFUART_BASE1,
  25                 .irq            = 73,
  26         },
  27         {
  28                 .mapbase        = MCF_MBAR + MCFUART_BASE2,
  29                 .irq            = 74,
  30         },
  31         { },
  32 };
  33
  34 static struct platform_device m5249_uart = {
  35         .name                   = "mcfuart",
  36         .id                     = 0,
  37         .dev.platform_data      = m5249_uart_platform,
  38 };
  39
  40 static struct platform_device *m5249_devices[] __initdata = {
  41         &m5249_uart,
  42 };
  43
  44 /***************************************************************************/
  45
  46 static void __init m5249_uart_init_line(int line, int irq)
  47 {
  48         if (line == 0) {
  49                 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
  50                 writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
  51                 mcf_mapirq2imr(irq, MCFINTC_UART0);
  52         } else if (line == 1) {
  53                 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
  54                 writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
  55                 mcf_mapirq2imr(irq, MCFINTC_UART1);
  56         }
  57 }
  58
  59 static void __init m5249_uarts_init(void)
  60 {
  61         const int nrlines = ARRAY_SIZE(m5249_uart_platform);
  62         int line;
  63
  64         for (line = 0; (line < nrlines); line++)
  65                 m5249_uart_init_line(line, m5249_uart_platform[line].irq);
  66 }
  67
  68 /***************************************************************************/
  69
  70 static void __init m5249_timers_init(void)
  71 {
  72         /* Timer1 is always used as system timer */
  73         writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
  74                 MCF_MBAR + MCFSIM_TIMER1ICR);
  75         mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
  76
  77 #ifdef CONFIG_HIGHPROFILE
  78         /* Timer2 is to be used as a high speed profile timer  */
  79         writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
  80                 MCF_MBAR + MCFSIM_TIMER2ICR);
  81         mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
  82 #endif
  83 }
  84
  85 /***************************************************************************/
  86
  87 void m5249_cpu_reset(void)
  88 {
  89         local_irq_disable();
  90         /* Set watchdog to soft reset, and enabled */
  91         __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
  92         for (;;)
  93                 /* wait for watchdog to timeout */;
  94 }
  95
  96 /***************************************************************************/
  97
  98 void __init config_BSP(char *commandp, int size)
  99 {
 100         mach_reset = m5249_cpu_reset;
 101         m5249_timers_init();
 102         m5249_uarts_init();
 103 }
 104
 105 /***************************************************************************/
 106
 107 static int __init init_BSP(void)
 108 {
 109         platform_add_devices(m5249_devices, ARRAY_SIZE(m5249_devices));
 110         return 0;
 111 }
 112
 113 arch_initcall(init_BSP);
 114
 115 /***************************************************************************/