arch/powerpc/boot/dts/digsy_mtc.dts

   1 /*
   2  * Digsy MTC board Device Tree Source
   3  *
   4  * Copyright (C) 2009 Semihalf
   5  *
   6  * Based on the CM5200 by M. Balakowicz
   7  *
   8  * This program is free software; you can redistribute  it and/or modify it
   9  * under  the terms of  the GNU General  Public License as published by the
  10  * Free Software Foundation;  either version 2 of the  License, or (at your
  11  * option) any later version.
  12  */
  13
  14 /dts-v1/;
  15
  16 / {
  17         model = "intercontrol,digsy-mtc";
  18         compatible = "intercontrol,digsy-mtc";
  19         #address-cells = <1>;
  20         #size-cells = <1>;
  21         interrupt-parent = <&mpc5200_pic>;
  22
  23         cpus {
  24                 #address-cells = <1>;
  25                 #size-cells = <0>;
  26
  27                 PowerPC,5200@0 {
  28                         device_type = "cpu";
  29                         reg = <0>;
  30                         d-cache-line-size = <32>;
  31                         i-cache-line-size = <32>;
  32                         d-cache-size = <0x4000>;                // L1, 16K
  33                         i-cache-size = <0x4000>;                // L1, 16K
  34                         timebase-frequency = <0>;       // from bootloader
  35                         bus-frequency = <0>;            // from bootloader
  36                         clock-frequency = <0>;          // from bootloader
  37                 };
  38         };
  39
  40         memory {
  41                 device_type = "memory";
  42                 reg = <0x00000000 0x02000000>;  // 32MB
  43         };
  44
  45         soc5200@f0000000 {
  46                 #address-cells = <1>;
  47                 #size-cells = <1>;
  48                 compatible = "fsl,mpc5200b-immr";
  49                 ranges = <0 0xf0000000 0x0000c000>;
  50                 reg = <0xf0000000 0x00000100>;
  51                 bus-frequency = <0>;            // from bootloader
  52                 system-frequency = <0>;         // from bootloader
  53
  54                 cdm@200 {
  55                         compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
  56                         reg = <0x200 0x38>;
  57                 };
  58
  59                 mpc5200_pic: interrupt-controller@500 {
  60                         // 5200 interrupts are encoded into two levels;
  61                         interrupt-controller;
  62                         #interrupt-cells = <3>;
  63                         compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
  64                         reg = <0x500 0x80>;
  65                 };
  66
  67                 timer@600 {     // General Purpose Timer
  68                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
  69                         reg = <0x600 0x10>;
  70                         interrupts = <1 9 0>;
  71                         fsl,has-wdt;
  72                 };
  73
  74                 timer@610 {     // General Purpose Timer
  75                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
  76                         reg = <0x610 0x10>;
  77                         interrupts = <1 10 0>;
  78                 };
  79
  80                 timer@620 {     // General Purpose Timer
  81                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
  82                         reg = <0x620 0x10>;
  83                         interrupts = <1 11 0>;
  84                 };
  85
  86                 timer@630 {     // General Purpose Timer
  87                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
  88                         reg = <0x630 0x10>;
  89                         interrupts = <1 12 0>;
  90                 };
  91
  92                 timer@640 {     // General Purpose Timer
  93                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
  94                         reg = <0x640 0x10>;
  95                         interrupts = <1 13 0>;
  96                 };
  97
  98                 timer@650 {     // General Purpose Timer
  99                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
 100                         reg = <0x650 0x10>;
 101                         interrupts = <1 14 0>;
 102                 };
 103
 104                 timer@660 {     // General Purpose Timer
 105                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
 106                         reg = <0x660 0x10>;
 107                         interrupts = <1 15 0>;
 108                 };
 109
 110                 timer@670 {     // General Purpose Timer
 111                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
 112                         reg = <0x670 0x10>;
 113                         interrupts = <1 16 0>;
 114                 };
 115
 116                 gpio_simple: gpio@b00 {
 117                         compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
 118                         reg = <0xb00 0x40>;
 119                         interrupts = <1 7 0>;
 120                         gpio-controller;
 121                         #gpio-cells = <2>;
 122                 };
 123
 124                 gpio_wkup: gpio@c00 {
 125                         compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
 126                         reg = <0xc00 0x40>;
 127                         interrupts = <1 8 0 0 3 0>;
 128                         gpio-controller;
 129                         #gpio-cells = <2>;
 130                 };
 131
 132                 spi@f00 {
 133                         compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
 134                         reg = <0xf00 0x20>;
 135                         interrupts = <2 13 0 2 14 0>;
 136                 };
 137
 138                 usb@1000 {
 139                         compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
 140                         reg = <0x1000 0xff>;
 141                         interrupts = <2 6 0>;
 142                 };
 143
 144                 dma-controller@1200 {
 145                         compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
 146                         reg = <0x1200 0x80>;
 147                         interrupts = <3 0 0  3 1 0  3 2 0  3 3 0
 148                                       3 4 0  3 5 0  3 6 0  3 7 0
 149                                       3 8 0  3 9 0  3 10 0  3 11 0
 150                                       3 12 0  3 13 0  3 14 0  3 15 0>;
 151                 };
 152
 153                 xlb@1f00 {
 154                         compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
 155                         reg = <0x1f00 0x100>;
 156                 };
 157
 158                 serial@2600 {           // PSC4
 159                         compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
 160                         reg = <0x2600 0x100>;
 161                         interrupts = <2 11 0>;
 162                 };
 163
 164                 serial@2800 {           // PSC5
 165                         compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
 166                         reg = <0x2800 0x100>;
 167                         interrupts = <2 12 0>;
 168                 };
 169
 170                 ethernet@3000 {
 171                         compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
 172                         reg = <0x3000 0x400>;
 173                         local-mac-address = [ 00 00 00 00 00 00 ];
 174                         interrupts = <2 5 0>;
 175                         phy-handle = <&phy0>;
 176                 };
 177
 178                 mdio@3000 {
 179                         #address-cells = <1>;
 180                         #size-cells = <0>;
 181                         compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
 182                         reg = <0x3000 0x400>;       // fec range, since we need to setup fec interrupts
 183                         interrupts = <2 5 0>;   // these are for "mii command finished", not link changes & co.
 184
 185                         phy0: ethernet-phy@0 {
 186                                 reg = <0>;
 187                         };
 188                 };
 189
 190                 ata@3a00 {
 191                         compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
 192                         reg = <0x3a00 0x100>;
 193                         interrupts = <2 7 0>;
 194                 };
 195
 196                 i2c@3d00 {
 197                         #address-cells = <1>;
 198                         #size-cells = <0>;
 199                         compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
 200                         reg = <0x3d00 0x40>;
 201                         interrupts = <2 15 0>;
 202                         fsl5200-clocking;
 203
 204                         rtc@50 {
 205                                 compatible = "at,24c08";
 206                                 reg = <0x50>;
 207                         };
 208
 209                         rtc@68 {
 210                                 compatible = "dallas,ds1339";
 211                                 reg = <0x68>;
 212                         };
 213                 };
 214
 215                 sram@8000 {
 216                         compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
 217                         reg = <0x8000 0x4000>;
 218                 };
 219         };
 220
 221         lpb {
 222                 compatible = "fsl,mpc5200b-lpb","simple-bus";
 223                 #address-cells = <2>;
 224                 #size-cells = <1>;
 225                 ranges = <0 0 0xff000000 0x1000000>;
 226
 227                 // 16-bit flash device at LocalPlus Bus CS0
 228                 flash@0,0 {
 229                         compatible = "cfi-flash";
 230                         reg = <0 0 0x1000000>;
 231                         bank-width = <2>;
 232                         device-width = <2>;
 233                         #size-cells = <1>;
 234                         #address-cells = <1>;
 235
 236                         partition@0 {
 237                                 label = "kernel";
 238                                 reg = <0x0 0x00200000>;
 239                         };
 240                         partition@200000 {
 241                                 label = "root";
 242                                 reg = <0x00200000 0x00300000>;
 243                         };
 244                         partition@500000 {
 245                                 label = "user";
 246                                 reg = <0x00500000 0x00a00000>;
 247                         };
 248                         partition@f00000 {
 249                                 label = "u-boot";
 250                                 reg = <0x00f00000 0x100000>;
 251                         };
 252                 };
 253         };
 254 };