2 * arch/s390/kernel/entry.S
3 * S390 low-level entry points.
5 * Copyright (C) IBM Corp. 1999,2006
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
12 #include <linux/sys.h>
13 #include <linux/linkage.h>
14 #include <linux/init.h>
15 #include <asm/cache.h>
16 #include <asm/lowcore.h>
17 #include <asm/errno.h>
18 #include <asm/ptrace.h>
19 #include <asm/thread_info.h>
20 #include <asm/asm-offsets.h>
21 #include <asm/unistd.h>
25 * Stack layout for the system_call stack entry.
26 * The first few entries are identical to the user_regs_struct.
28 SP_PTREGS = STACK_FRAME_OVERHEAD
29 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
30 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
31 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
32 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4
33 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
34 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12
35 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
36 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20
37 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
38 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28
39 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
40 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36
41 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
42 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44
43 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
44 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52
45 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
46 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60
47 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
48 SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
49 SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR
50 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
52 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
53 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
54 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
56 _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
57 _TIF_SECCOMP>>8 | _TIF_SYSCALL_TRACEPOINT>>8)
59 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
60 STACK_SIZE = 1 << STACK_SHIFT
62 #define BASED(name) name-system_call(%r13)
64 #ifdef CONFIG_TRACE_IRQFLAGS
67 l %r1,BASED(.Ltrace_irq_on_caller)
73 l %r1,BASED(.Ltrace_irq_off_caller)
77 .macro TRACE_IRQS_CHECK
79 tm SP_PSW(%r15),0x03 # irqs enabled?
81 l %r1,BASED(.Ltrace_irq_on_caller)
84 0: l %r1,BASED(.Ltrace_irq_off_caller)
90 #define TRACE_IRQS_OFF
91 #define TRACE_IRQS_CHECK
95 .macro LOCKDEP_SYS_EXIT
96 tm SP_PSW+1(%r15),0x01 # returning to user ?
98 l %r1,BASED(.Llockdep_sys_exit)
103 #define LOCKDEP_SYS_EXIT
107 * Register usage in interrupt handlers:
108 * R9 - pointer to current task structure
109 * R13 - pointer to literal pool
110 * R14 - return register for function calls
111 * R15 - kernel stack pointer
114 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
115 lm %r10,%r11,\lc_from
124 1: stm %r10,%r11,\lc_sum
127 .macro SAVE_ALL_BASE savearea
128 stm %r12,%r15,\savearea
129 l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
132 .macro SAVE_ALL_SVC psworg,savearea
134 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
137 .macro SAVE_ALL_SYNC psworg,savearea
139 tm \psworg+1,0x01 # test problem state bit
140 bz BASED(2f) # skip stack setup save
141 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
142 #ifdef CONFIG_CHECK_STACK
144 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
145 bz BASED(stack_overflow)
151 .macro SAVE_ALL_ASYNC psworg,savearea
153 tm \psworg+1,0x01 # test problem state bit
154 bnz BASED(1f) # from user -> load async stack
155 clc \psworg+4(4),BASED(.Lcritical_end)
157 clc \psworg+4(4),BASED(.Lcritical_start)
159 l %r14,BASED(.Lcleanup_critical)
161 tm 1(%r12),0x01 # retest problem state after cleanup
163 0: l %r14,__LC_ASYNC_STACK # are we already on the async stack ?
167 1: l %r15,__LC_ASYNC_STACK
168 #ifdef CONFIG_CHECK_STACK
170 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
171 bz BASED(stack_overflow)
177 .macro CREATE_STACK_FRAME psworg,savearea
178 s %r15,BASED(.Lc_spsize) # make room for registers & psw
179 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
180 st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
181 icm %r12,3,__LC_SVC_ILC
182 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
183 st %r12,SP_SVCNR(%r15)
184 mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack
186 st %r12,__SF_BACKCHAIN(%r15) # clear back chain
189 .macro RESTORE_ALL psworg,sync
190 mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore
192 ni \psworg+1,0xfd # clear wait state bit
194 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
196 lpsw \psworg # back to caller
200 * Scheduler resume function, called by switch_to
201 * gpr2 = (task_struct *) prev
202 * gpr3 = (task_struct *) next
210 tm __THREAD_per(%r3),0xe8 # new process is using per ?
211 bz __switch_to_noper-__switch_to_base(%r1) # if not we're fine
212 stctl %c9,%c11,__SF_EMPTY(%r15) # We are using per stuff
213 clc __THREAD_per(12,%r3),__SF_EMPTY(%r15)
214 be __switch_to_noper-__switch_to_base(%r1) # we got away w/o bashing TLB's
215 lctl %c9,%c11,__THREAD_per(%r3) # Nope we didn't
217 l %r4,__THREAD_info(%r2) # get thread_info of prev
218 tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending?
219 bz __switch_to_no_mcck-__switch_to_base(%r1)
220 ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
221 l %r4,__THREAD_info(%r3) # get thread_info of next
222 oi __TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next
224 stm %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
225 st %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
226 l %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
227 lm %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
228 st %r3,__LC_CURRENT # __LC_CURRENT = current task struct
229 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
230 l %r3,__THREAD_info(%r3) # load thread_info from task struct
231 st %r3,__LC_THREAD_INFO
233 st %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
238 * SVC interrupt handler routine. System calls are synchronous events and
239 * are executed with interrupts enabled.
244 stpt __LC_SYNC_ENTER_TIMER
246 SAVE_ALL_BASE __LC_SAVE_AREA
247 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
248 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
249 lh %r7,0x8a # get svc number from lowcore
251 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
253 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
255 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
257 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
258 ltr %r7,%r7 # test for svc 0
259 bnz BASED(sysc_nr_ok) # svc number > 0
260 # svc 0: system call number in %r1
261 cl %r1,BASED(.Lnr_syscalls)
262 bnl BASED(sysc_nr_ok)
263 lr %r7,%r1 # copy svc number to %r7
265 mvc SP_ARGS(4,%r15),SP_R7(%r15)
267 sth %r7,SP_SVCNR(%r15)
268 sll %r7,2 # svc number *4
269 l %r8,BASED(.Lsysc_table)
270 tm __TI_flags+2(%r9),_TIF_SYSCALL
271 l %r8,0(%r7,%r8) # get system call addr.
272 bnz BASED(sysc_tracesys)
273 basr %r14,%r8 # call sys_xxxx
274 st %r2,SP_R2(%r15) # store return value (change R2 on stack)
277 tm __TI_flags+3(%r9),_TIF_WORK_SVC
278 bnz BASED(sysc_work) # there is work to do (signals etc.)
280 #ifdef CONFIG_TRACE_IRQFLAGS
281 la %r1,BASED(sysc_restore_trace_psw_addr)
289 RESTORE_ALL __LC_RETURN_PSW,1
292 #ifdef CONFIG_TRACE_IRQFLAGS
293 sysc_restore_trace_psw_addr:
294 .long sysc_restore_trace_psw
296 .section .data,"aw",@progbits
298 .globl sysc_restore_trace_psw
299 sysc_restore_trace_psw:
300 .long 0, sysc_restore_trace + 0x80000000
305 # recheck if there is more work to do
308 tm __TI_flags+3(%r9),_TIF_WORK_SVC
309 bz BASED(sysc_restore) # there is no work to do
311 # One of the work bits is on. Find out which one.
314 tm SP_PSW+1(%r15),0x01 # returning to user ?
315 bno BASED(sysc_restore)
316 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
317 bo BASED(sysc_mcck_pending)
318 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
319 bo BASED(sysc_reschedule)
320 tm __TI_flags+3(%r9),_TIF_SIGPENDING
321 bnz BASED(sysc_sigpending)
322 tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME
323 bnz BASED(sysc_notify_resume)
324 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
325 bo BASED(sysc_restart)
326 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
327 bo BASED(sysc_singlestep)
328 b BASED(sysc_restore)
332 # _TIF_NEED_RESCHED is set, call schedule
335 l %r1,BASED(.Lschedule)
336 la %r14,BASED(sysc_work_loop)
337 br %r1 # call scheduler
340 # _TIF_MCCK_PENDING is set, call handler
343 l %r1,BASED(.Ls390_handle_mcck)
344 la %r14,BASED(sysc_work_loop)
345 br %r1 # TIF bit will be cleared by handler
348 # _TIF_SIGPENDING is set, call do_signal
351 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
352 la %r2,SP_PTREGS(%r15) # load pt_regs
353 l %r1,BASED(.Ldo_signal)
354 basr %r14,%r1 # call do_signal
355 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
356 bo BASED(sysc_restart)
357 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
358 bo BASED(sysc_singlestep)
359 b BASED(sysc_work_loop)
362 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
365 la %r2,SP_PTREGS(%r15) # load pt_regs
366 l %r1,BASED(.Ldo_notify_resume)
367 la %r14,BASED(sysc_work_loop)
368 br %r1 # call do_notify_resume
372 # _TIF_RESTART_SVC is set, set up registers and restart svc
375 ni __TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
376 l %r7,SP_R2(%r15) # load new svc number
377 mvc SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument
378 lm %r2,%r6,SP_R2(%r15) # load svc arguments
379 b BASED(sysc_do_restart) # restart svc
382 # _TIF_SINGLE_STEP is set, call do_single_step
385 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
386 mvi SP_SVCNR(%r15),0xff # set trap indication to pgm check
387 mvi SP_SVCNR+1(%r15),0xff
388 la %r2,SP_PTREGS(%r15) # address of register-save area
389 l %r1,BASED(.Lhandle_per) # load adr. of per handler
390 la %r14,BASED(sysc_return) # load adr. of system return
391 br %r1 # branch to do_single_step
394 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
395 # and after the system call
398 l %r1,BASED(.Ltrace_entry)
399 la %r2,SP_PTREGS(%r15) # load pt_regs
404 cl %r2,BASED(.Lnr_syscalls)
405 bnl BASED(sysc_tracenogo)
406 l %r8,BASED(.Lsysc_table)
408 sll %r7,2 # svc number *4
411 lm %r3,%r6,SP_R3(%r15)
412 l %r2,SP_ORIG_R2(%r15)
413 basr %r14,%r8 # call sys_xxx
414 st %r2,SP_R2(%r15) # store return value
416 tm __TI_flags+2(%r9),_TIF_SYSCALL
417 bz BASED(sysc_return)
418 l %r1,BASED(.Ltrace_exit)
419 la %r2,SP_PTREGS(%r15) # load pt_regs
420 la %r14,BASED(sysc_return)
424 # a new process exits the kernel with ret_from_fork
428 l %r13,__LC_SVC_NEW_PSW+4
429 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
430 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
432 st %r15,SP_R15(%r15) # store stack pointer for new kthread
433 0: l %r1,BASED(.Lschedtail)
436 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
437 b BASED(sysc_tracenogo)
440 # kernel_execve function needs to deal with pt_regs that is not
445 stm %r12,%r15,48(%r15)
447 l %r13,__LC_SVC_NEW_PSW+4
448 s %r15,BASED(.Lc_spsize)
449 st %r14,__SF_BACKCHAIN(%r15)
450 la %r12,SP_PTREGS(%r15)
451 xc 0(__PT_SIZE,%r12),0(%r12)
452 l %r1,BASED(.Ldo_execve)
457 a %r15,BASED(.Lc_spsize)
458 lm %r12,%r15,48(%r15)
461 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
462 l %r15,__LC_KERNEL_STACK # load ksp
463 s %r15,BASED(.Lc_spsize) # make room for registers & psw
464 l %r9,__LC_THREAD_INFO
465 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
466 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
467 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
468 l %r1,BASED(.Lexecve_tail)
473 * Program check handler routine
476 .globl pgm_check_handler
479 * First we need to check for a special case:
480 * Single stepping an instruction that disables the PER event mask will
481 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
482 * For a single stepped SVC the program check handler gets control after
483 * the SVC new PSW has been loaded. But we want to execute the SVC first and
484 * then handle the PER event. Therefore we update the SVC old PSW to point
485 * to the pgm_check_handler and branch to the SVC handler after we checked
486 * if we have to load the kernel stack register.
487 * For every other possible cause for PER event without the PER mask set
488 * we just ignore the PER event (FIXME: is there anything we have to do
491 stpt __LC_SYNC_ENTER_TIMER
492 SAVE_ALL_BASE __LC_SAVE_AREA
493 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
494 bnz BASED(pgm_per) # got per exception -> special case
495 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
496 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
497 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
498 bz BASED(pgm_no_vtime)
499 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
500 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
501 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
503 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
505 l %r3,__LC_PGM_ILC # load program interruption code
509 l %r7,BASED(.Ljump_table)
511 l %r7,0(%r8,%r7) # load address of handler routine
512 la %r2,SP_PTREGS(%r15) # address of register-save area
513 la %r14,BASED(sysc_return)
514 br %r7 # branch to interrupt-handler
517 # handle per exception
520 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
521 bnz BASED(pgm_per_std) # ok, normal per event from user space
522 # ok its one of the special cases, now we need to find out which one
523 clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW
525 # no interesting special case, ignore PER event
526 lm %r12,%r15,__LC_SAVE_AREA
530 # Normal per exception
533 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
534 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
535 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
536 bz BASED(pgm_no_vtime2)
537 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
538 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
539 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
541 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
544 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
545 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
546 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
547 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
548 tm SP_PSW+1(%r15),0x01 # kernel per event ?
550 l %r3,__LC_PGM_ILC # load program interruption code
552 nr %r8,%r3 # clear per-event-bit and ilc
553 be BASED(sysc_return) # only per or per+check ?
557 # it was a single stepped SVC that is causing all the trouble
560 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
561 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
562 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
563 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
564 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
565 lh %r7,0x8a # get svc number from lowcore
566 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
569 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
570 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
571 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
572 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
574 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
578 # per was called from kernel, must be kprobes
581 mvi SP_SVCNR(%r15),0xff # set trap indication to pgm check
582 mvi SP_SVCNR+1(%r15),0xff
583 la %r2,SP_PTREGS(%r15) # address of register-save area
584 l %r1,BASED(.Lhandle_per) # load adr. of per handler
585 la %r14,BASED(sysc_restore)# load adr. of system return
586 br %r1 # branch to do_single_step
589 * IO interrupt handler routine
592 .globl io_int_handler
595 stpt __LC_ASYNC_ENTER_TIMER
596 SAVE_ALL_BASE __LC_SAVE_AREA+16
597 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
598 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
599 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
600 bz BASED(io_no_vtime)
601 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
602 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
603 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
605 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
607 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ
608 la %r2,SP_PTREGS(%r15) # address of register-save area
609 basr %r14,%r1 # branch to standard irq handler
611 tm __TI_flags+3(%r9),_TIF_WORK_INT
612 bnz BASED(io_work) # there is work to do (signals etc.)
614 #ifdef CONFIG_TRACE_IRQFLAGS
615 la %r1,BASED(io_restore_trace_psw_addr)
623 RESTORE_ALL __LC_RETURN_PSW,0
626 #ifdef CONFIG_TRACE_IRQFLAGS
627 io_restore_trace_psw_addr:
628 .long io_restore_trace_psw
630 .section .data,"aw",@progbits
632 .globl io_restore_trace_psw
633 io_restore_trace_psw:
634 .long 0, io_restore_trace + 0x80000000
639 # switch to kernel stack, then check the TIF bits
642 tm SP_PSW+1(%r15),0x01 # returning to user ?
643 #ifndef CONFIG_PREEMPT
644 bno BASED(io_restore) # no-> skip resched & signal
646 bnz BASED(io_work_user) # no -> check for preemptive scheduling
647 # check for preemptive scheduling
648 icm %r0,15,__TI_precount(%r9)
649 bnz BASED(io_restore) # preemption disabled
651 s %r1,BASED(.Lc_spsize)
652 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
653 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
656 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
657 bno BASED(io_restore)
658 l %r1,BASED(.Lpreempt_schedule_irq)
659 la %r14,BASED(io_resume_loop)
660 br %r1 # call schedule
664 l %r1,__LC_KERNEL_STACK
665 s %r1,BASED(.Lc_spsize)
666 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
667 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
670 # One of the work bits is on. Find out which one.
671 # Checked are: _TIF_SIGPENDING, _TIF_NEED_RESCHED
672 # and _TIF_MCCK_PENDING
675 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
676 bo BASED(io_mcck_pending)
677 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
678 bo BASED(io_reschedule)
679 tm __TI_flags+3(%r9),_TIF_SIGPENDING
680 bnz BASED(io_sigpending)
681 tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME
682 bnz BASED(io_notify_resume)
687 # _TIF_MCCK_PENDING is set, call handler
690 l %r1,BASED(.Ls390_handle_mcck)
691 basr %r14,%r1 # TIF bit will be cleared by handler
692 b BASED(io_work_loop)
695 # _TIF_NEED_RESCHED is set, call schedule
699 l %r1,BASED(.Lschedule)
700 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
701 basr %r14,%r1 # call scheduler
702 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
704 tm __TI_flags+3(%r9),_TIF_WORK_INT
705 bz BASED(io_restore) # there is no work to do
706 b BASED(io_work_loop)
709 # _TIF_SIGPENDING is set, call do_signal
713 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
714 la %r2,SP_PTREGS(%r15) # load pt_regs
715 l %r1,BASED(.Ldo_signal)
716 basr %r14,%r1 # call do_signal
717 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
719 b BASED(io_work_loop)
722 # _TIF_SIGPENDING is set, call do_signal
726 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
727 la %r2,SP_PTREGS(%r15) # load pt_regs
728 l %r1,BASED(.Ldo_notify_resume)
729 basr %r14,%r1 # call do_signal
730 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
732 b BASED(io_work_loop)
735 * External interrupt handler routine
738 .globl ext_int_handler
741 stpt __LC_ASYNC_ENTER_TIMER
742 SAVE_ALL_BASE __LC_SAVE_AREA+16
743 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
744 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
745 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
746 bz BASED(ext_no_vtime)
747 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
748 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
749 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
751 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
753 la %r2,SP_PTREGS(%r15) # address of register-save area
754 lh %r3,__LC_EXT_INT_CODE # get interruption code
755 l %r1,BASED(.Ldo_extint)
762 * Machine check handler routines
765 .globl mcck_int_handler
768 spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer
769 lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs
770 SAVE_ALL_BASE __LC_SAVE_AREA+32
771 la %r12,__LC_MCK_OLD_PSW
772 tm __LC_MCCK_CODE,0x80 # system damage?
773 bo BASED(mcck_int_main) # yes -> rest of mcck code invalid
774 mvc __LC_SAVE_AREA+52(8),__LC_ASYNC_ENTER_TIMER
775 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
776 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
778 la %r14,__LC_SYNC_ENTER_TIMER
779 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
781 la %r14,__LC_ASYNC_ENTER_TIMER
782 0: clc 0(8,%r14),__LC_EXIT_TIMER
784 la %r14,__LC_EXIT_TIMER
785 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
787 la %r14,__LC_LAST_UPDATE_TIMER
789 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
790 1: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
791 bno BASED(mcck_int_main) # no -> skip cleanup critical
792 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
793 bnz BASED(mcck_int_main) # from user -> load async stack
794 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end)
795 bhe BASED(mcck_int_main)
796 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start)
797 bl BASED(mcck_int_main)
798 l %r14,BASED(.Lcleanup_critical)
801 l %r14,__LC_PANIC_STACK # are we already on the panic stack?
805 l %r15,__LC_PANIC_STACK # load panic stack
806 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32
807 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
808 bno BASED(mcck_no_vtime) # no -> skip cleanup critical
809 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
810 bz BASED(mcck_no_vtime)
811 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
812 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
813 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
815 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
816 la %r2,SP_PTREGS(%r15) # load pt_regs
817 l %r1,BASED(.Ls390_mcck)
818 basr %r14,%r1 # call machine check handler
819 tm SP_PSW+1(%r15),0x01 # returning to user ?
820 bno BASED(mcck_return)
821 l %r1,__LC_KERNEL_STACK # switch to kernel stack
822 s %r1,BASED(.Lc_spsize)
823 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
824 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
826 stosm __SF_EMPTY(%r15),0x04 # turn dat on
827 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
828 bno BASED(mcck_return)
830 l %r1,BASED(.Ls390_handle_mcck)
831 basr %r14,%r1 # call machine check handler
834 mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW
835 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
836 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+52
837 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
839 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
841 lpsw __LC_RETURN_MCCK_PSW # back to caller
842 0: lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
843 lpsw __LC_RETURN_MCCK_PSW # back to caller
845 RESTORE_ALL __LC_RETURN_MCCK_PSW,0
848 * Restart interruption handler, kick starter for additional CPUs
852 .globl restart_int_handler
856 spt restart_vtime-restart_base(%r1)
857 stck __LC_LAST_UPDATE_CLOCK
858 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
859 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
860 l %r15,__LC_SAVE_AREA+60 # load ksp
861 lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs
862 lam %a0,%a15,__LC_AREGS_SAVE_AREA
863 lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone
864 l %r1,__LC_THREAD_INFO
865 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1)
866 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
867 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
868 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
870 l %r14,restart_addr-.(%r14)
871 br %r14 # branch to start_secondary
873 .long start_secondary
876 .long 0x7fffffff,0xffffffff
880 * If we do not run with SMP enabled, let the new CPU crash ...
882 .globl restart_int_handler
886 lpsw restart_crash-restart_base(%r1)
889 .long 0x000a0000,0x00000000
893 #ifdef CONFIG_CHECK_STACK
895 * The synchronous or the asynchronous stack overflowed. We are dead.
896 * No need to properly save the registers, we are going to panic anyway.
897 * Setup a pt_regs so that show_trace can provide a good call trace.
900 l %r15,__LC_PANIC_STACK # change to panic stack
901 sl %r15,BASED(.Lc_spsize)
902 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
903 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
904 la %r1,__LC_SAVE_AREA
905 ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ?
907 ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ?
909 la %r1,__LC_SAVE_AREA+16
910 0: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack
911 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain
912 l %r1,BASED(1f) # branch to kernel_stack_overflow
913 la %r2,SP_PTREGS(%r15) # load pt_regs
915 1: .long kernel_stack_overflow
918 cleanup_table_system_call:
919 .long system_call + 0x80000000, sysc_do_svc + 0x80000000
920 cleanup_table_sysc_return:
921 .long sysc_return + 0x80000000, sysc_leave + 0x80000000
922 cleanup_table_sysc_leave:
923 .long sysc_leave + 0x80000000, sysc_done + 0x80000000
924 cleanup_table_sysc_work_loop:
925 .long sysc_work_loop + 0x80000000, sysc_work_done + 0x80000000
926 cleanup_table_io_return:
927 .long io_return + 0x80000000, io_leave + 0x80000000
928 cleanup_table_io_leave:
929 .long io_leave + 0x80000000, io_done + 0x80000000
930 cleanup_table_io_work_loop:
931 .long io_work_loop + 0x80000000, io_work_done + 0x80000000
934 clc 4(4,%r12),BASED(cleanup_table_system_call)
936 clc 4(4,%r12),BASED(cleanup_table_system_call+4)
937 bl BASED(cleanup_system_call)
939 clc 4(4,%r12),BASED(cleanup_table_sysc_return)
941 clc 4(4,%r12),BASED(cleanup_table_sysc_return+4)
942 bl BASED(cleanup_sysc_return)
944 clc 4(4,%r12),BASED(cleanup_table_sysc_leave)
946 clc 4(4,%r12),BASED(cleanup_table_sysc_leave+4)
947 bl BASED(cleanup_sysc_leave)
949 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop)
951 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop+4)
952 bl BASED(cleanup_sysc_return)
954 clc 4(4,%r12),BASED(cleanup_table_io_return)
956 clc 4(4,%r12),BASED(cleanup_table_io_return+4)
957 bl BASED(cleanup_io_return)
959 clc 4(4,%r12),BASED(cleanup_table_io_leave)
961 clc 4(4,%r12),BASED(cleanup_table_io_leave+4)
962 bl BASED(cleanup_io_leave)
964 clc 4(4,%r12),BASED(cleanup_table_io_work_loop)
966 clc 4(4,%r12),BASED(cleanup_table_io_work_loop+4)
967 bl BASED(cleanup_io_return)
972 mvc __LC_RETURN_PSW(8),0(%r12)
973 c %r12,BASED(.Lmck_old_psw)
975 la %r12,__LC_SAVE_AREA+16
977 0: la %r12,__LC_SAVE_AREA+32
979 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4)
981 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
982 0: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8)
983 bhe BASED(cleanup_vtime)
984 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn)
986 mvc __LC_SAVE_AREA(16),0(%r12)
988 st %r12,__LC_SAVE_AREA+48 # argh
989 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
990 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
991 l %r12,__LC_SAVE_AREA+48 # argh
995 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12)
996 bhe BASED(cleanup_stime)
997 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
999 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16)
1000 bh BASED(cleanup_update)
1001 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
1003 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1004 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4)
1005 la %r12,__LC_RETURN_PSW
1007 cleanup_system_call_insn:
1008 .long sysc_saveall + 0x80000000
1009 .long system_call + 0x80000000
1010 .long sysc_vtime + 0x80000000
1011 .long sysc_stime + 0x80000000
1012 .long sysc_update + 0x80000000
1014 cleanup_sysc_return:
1015 mvc __LC_RETURN_PSW(4),0(%r12)
1016 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_return)
1017 la %r12,__LC_RETURN_PSW
1021 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn)
1023 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1024 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn+4)
1026 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
1027 c %r12,BASED(.Lmck_old_psw)
1029 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
1031 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15)
1032 1: lm %r0,%r11,SP_R0(%r15)
1034 2: la %r12,__LC_RETURN_PSW
1036 cleanup_sysc_leave_insn:
1037 .long sysc_done - 4 + 0x80000000
1038 .long sysc_done - 8 + 0x80000000
1041 mvc __LC_RETURN_PSW(4),0(%r12)
1042 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_work_loop)
1043 la %r12,__LC_RETURN_PSW
1047 clc 4(4,%r12),BASED(cleanup_io_leave_insn)
1049 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1050 clc 4(4,%r12),BASED(cleanup_io_leave_insn+4)
1052 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
1053 c %r12,BASED(.Lmck_old_psw)
1055 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
1057 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15)
1058 1: lm %r0,%r11,SP_R0(%r15)
1060 2: la %r12,__LC_RETURN_PSW
1062 cleanup_io_leave_insn:
1063 .long io_done - 4 + 0x80000000
1064 .long io_done - 8 + 0x80000000
1070 .Lc_spsize: .long SP_SIZE
1071 .Lc_overhead: .long STACK_FRAME_OVERHEAD
1072 .Lnr_syscalls: .long NR_syscalls
1073 .L0x018: .short 0x018
1074 .L0x020: .short 0x020
1075 .L0x028: .short 0x028
1076 .L0x030: .short 0x030
1077 .L0x038: .short 0x038
1083 .Ls390_mcck: .long s390_do_machine_check
1085 .long s390_handle_mcck
1086 .Lmck_old_psw: .long __LC_MCK_OLD_PSW
1087 .Ldo_IRQ: .long do_IRQ
1088 .Ldo_extint: .long do_extint
1089 .Ldo_signal: .long do_signal
1091 .long do_notify_resume
1092 .Lhandle_per: .long do_single_step
1093 .Ldo_execve: .long do_execve
1094 .Lexecve_tail: .long execve_tail
1095 .Ljump_table: .long pgm_check_table
1096 .Lschedule: .long schedule
1097 #ifdef CONFIG_PREEMPT
1098 .Lpreempt_schedule_irq:
1099 .long preempt_schedule_irq
1101 .Ltrace_entry: .long do_syscall_trace_enter
1102 .Ltrace_exit: .long do_syscall_trace_exit
1103 .Lschedtail: .long schedule_tail
1104 .Lsysc_table: .long sys_call_table
1105 #ifdef CONFIG_TRACE_IRQFLAGS
1106 .Ltrace_irq_on_caller:
1107 .long trace_hardirqs_on_caller
1108 .Ltrace_irq_off_caller:
1109 .long trace_hardirqs_off_caller
1111 #ifdef CONFIG_LOCKDEP
1113 .long lockdep_sys_exit
1116 .long __critical_start + 0x80000000
1118 .long __critical_end + 0x80000000
1120 .long cleanup_critical
1122 .section .rodata, "a"
1123 #define SYSCALL(esa,esame,emu) .long esa
1124 .globl sys_call_table
1126 #include "syscalls.S"