drivers/net/sfc/falcon_io.h

   1 /****************************************************************************
   2  * Driver for Solarflare Solarstorm network controllers and boards
   3  * Copyright 2005-2006 Fen Systems Ltd.
   4  * Copyright 2006-2008 Solarflare Communications Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 as published
   8  * by the Free Software Foundation, incorporated herein by reference.
   9  */
  10
  11 #ifndef EFX_FALCON_IO_H
  12 #define EFX_FALCON_IO_H
  13
  14 #include <linux/io.h>
  15 #include <linux/spinlock.h>
  16
  17 /**************************************************************************
  18  *
  19  * Falcon hardware access
  20  *
  21  **************************************************************************
  22  *
  23  * Notes on locking strategy:
  24  *
  25  * Most Falcon registers require 16-byte (or 8-byte, for SRAM
  26  * registers) atomic writes which necessitates locking.
  27  * Under normal operation few writes to the Falcon BAR are made and these
  28  * registers (EVQ_RPTR_REG, RX_DESC_UPD_REG and TX_DESC_UPD_REG) are special
  29  * cased to allow 4-byte (hence lockless) accesses.
  30  *
  31  * It *is* safe to write to these 4-byte registers in the middle of an
  32  * access to an 8-byte or 16-byte register.  We therefore use a
  33  * spinlock to protect accesses to the larger registers, but no locks
  34  * for the 4-byte registers.
  35  *
  36  * A write barrier is needed to ensure that DW3 is written after DW0/1/2
  37  * due to the way the 16byte registers are "collected" in the Falcon BIU
  38  *
  39  * We also lock when carrying out reads, to ensure consistency of the
  40  * data (made possible since the BIU reads all 128 bits into a cache).
  41  * Reads are very rare, so this isn't a significant performance
  42  * impact.  (Most data transferred from NIC to host is DMAed directly
  43  * into host memory).
  44  *
  45  * I/O BAR access uses locks for both reads and writes (but is only provided
  46  * for testing purposes).
  47  */
  48
  49 /* Special buffer descriptors (Falcon SRAM) */
  50 #define BUF_TBL_KER_A1 0x18000
  51 #define BUF_TBL_KER_B0 0x800000
  52
  53
  54 #if BITS_PER_LONG == 64
  55 #define FALCON_USE_QWORD_IO 1
  56 #endif
  57
  58 #ifdef FALCON_USE_QWORD_IO
  59 static inline void _falcon_writeq(struct efx_nic *efx, __le64 value,
  60                                   unsigned int reg)
  61 {
  62         __raw_writeq((__force u64)value, efx->membase + reg);
  63 }
  64 static inline __le64 _falcon_readq(struct efx_nic *efx, unsigned int reg)
  65 {
  66         return (__force __le64)__raw_readq(efx->membase + reg);
  67 }
  68 #endif
  69
  70 static inline void _falcon_writel(struct efx_nic *efx, __le32 value,
  71                                   unsigned int reg)
  72 {
  73         __raw_writel((__force u32)value, efx->membase + reg);
  74 }
  75 static inline __le32 _falcon_readl(struct efx_nic *efx, unsigned int reg)
  76 {
  77         return (__force __le32)__raw_readl(efx->membase + reg);
  78 }
  79
  80 /* Writes to a normal 16-byte Falcon register, locking as appropriate. */
  81 static inline void falcon_write(struct efx_nic *efx, efx_oword_t *value,
  82                                 unsigned int reg)
  83 {
  84         unsigned long flags;
  85
  86         EFX_REGDUMP(efx, "writing register %x with " EFX_OWORD_FMT "\n", reg,
  87                     EFX_OWORD_VAL(*value));
  88
  89         spin_lock_irqsave(&efx->biu_lock, flags);
  90 #ifdef FALCON_USE_QWORD_IO
  91         _falcon_writeq(efx, value->u64[0], reg + 0);
  92         wmb();
  93         _falcon_writeq(efx, value->u64[1], reg + 8);
  94 #else
  95         _falcon_writel(efx, value->u32[0], reg + 0);
  96         _falcon_writel(efx, value->u32[1], reg + 4);
  97         _falcon_writel(efx, value->u32[2], reg + 8);
  98         wmb();
  99         _falcon_writel(efx, value->u32[3], reg + 12);
 100 #endif
 101         mmiowb();
 102         spin_unlock_irqrestore(&efx->biu_lock, flags);
 103 }
 104
 105 /* Writes to an 8-byte Falcon SRAM register, locking as appropriate. */
 106 static inline void falcon_write_sram(struct efx_nic *efx, efx_qword_t *value,
 107                                      unsigned int index)
 108 {
 109         unsigned int reg = efx->type->buf_tbl_base + (index * sizeof(*value));
 110         unsigned long flags;
 111
 112         EFX_REGDUMP(efx, "writing SRAM register %x with " EFX_QWORD_FMT "\n",
 113                     reg, EFX_QWORD_VAL(*value));
 114
 115         spin_lock_irqsave(&efx->biu_lock, flags);
 116 #ifdef FALCON_USE_QWORD_IO
 117         _falcon_writeq(efx, value->u64[0], reg + 0);
 118 #else
 119         _falcon_writel(efx, value->u32[0], reg + 0);
 120         wmb();
 121         _falcon_writel(efx, value->u32[1], reg + 4);
 122 #endif
 123         mmiowb();
 124         spin_unlock_irqrestore(&efx->biu_lock, flags);
 125 }
 126
 127 /* Write dword to Falcon register that allows partial writes
 128  *
 129  * Some Falcon registers (EVQ_RPTR_REG, RX_DESC_UPD_REG and
 130  * TX_DESC_UPD_REG) can be written to as a single dword.  This allows
 131  * for lockless writes.
 132  */
 133 static inline void falcon_writel(struct efx_nic *efx, efx_dword_t *value,
 134                                  unsigned int reg)
 135 {
 136         EFX_REGDUMP(efx, "writing partial register %x with "EFX_DWORD_FMT"\n",
 137                     reg, EFX_DWORD_VAL(*value));
 138
 139         /* No lock required */
 140         _falcon_writel(efx, value->u32[0], reg);
 141 }
 142
 143 /* Read from a Falcon register
 144  *
 145  * This reads an entire 16-byte Falcon register in one go, locking as
 146  * appropriate.  It is essential to read the first dword first, as this
 147  * prompts Falcon to load the current value into the shadow register.
 148  */
 149 static inline void falcon_read(struct efx_nic *efx, efx_oword_t *value,
 150                                unsigned int reg)
 151 {
 152         unsigned long flags;
 153
 154         spin_lock_irqsave(&efx->biu_lock, flags);
 155         value->u32[0] = _falcon_readl(efx, reg + 0);
 156         rmb();
 157         value->u32[1] = _falcon_readl(efx, reg + 4);
 158         value->u32[2] = _falcon_readl(efx, reg + 8);
 159         value->u32[3] = _falcon_readl(efx, reg + 12);
 160         spin_unlock_irqrestore(&efx->biu_lock, flags);
 161
 162         EFX_REGDUMP(efx, "read from register %x, got " EFX_OWORD_FMT "\n", reg,
 163                     EFX_OWORD_VAL(*value));
 164 }
 165
 166 /* This reads an 8-byte Falcon SRAM entry in one go. */
 167 static inline void falcon_read_sram(struct efx_nic *efx, efx_qword_t *value,
 168                                     unsigned int index)
 169 {
 170         unsigned int reg = efx->type->buf_tbl_base + (index * sizeof(*value));
 171         unsigned long flags;
 172
 173         spin_lock_irqsave(&efx->biu_lock, flags);
 174 #ifdef FALCON_USE_QWORD_IO
 175         value->u64[0] = _falcon_readq(efx, reg + 0);
 176 #else
 177         value->u32[0] = _falcon_readl(efx, reg + 0);
 178         rmb();
 179         value->u32[1] = _falcon_readl(efx, reg + 4);
 180 #endif
 181         spin_unlock_irqrestore(&efx->biu_lock, flags);
 182
 183         EFX_REGDUMP(efx, "read from SRAM register %x, got "EFX_QWORD_FMT"\n",
 184                     reg, EFX_QWORD_VAL(*value));
 185 }
 186
 187 /* Read dword from Falcon register that allows partial writes (sic) */
 188 static inline void falcon_readl(struct efx_nic *efx, efx_dword_t *value,
 189                                 unsigned int reg)
 190 {
 191         value->u32[0] = _falcon_readl(efx, reg);
 192         EFX_REGDUMP(efx, "read from register %x, got "EFX_DWORD_FMT"\n",
 193                     reg, EFX_DWORD_VAL(*value));
 194 }
 195
 196 /* Write to a register forming part of a table */
 197 static inline void falcon_write_table(struct efx_nic *efx, efx_oword_t *value,
 198                                       unsigned int reg, unsigned int index)
 199 {
 200         falcon_write(efx, value, reg + index * sizeof(efx_oword_t));
 201 }
 202
 203 /* Read to a register forming part of a table */
 204 static inline void falcon_read_table(struct efx_nic *efx, efx_oword_t *value,
 205                                      unsigned int reg, unsigned int index)
 206 {
 207         falcon_read(efx, value, reg + index * sizeof(efx_oword_t));
 208 }
 209
 210 /* Write to a dword register forming part of a table */
 211 static inline void falcon_writel_table(struct efx_nic *efx, efx_dword_t *value,
 212                                        unsigned int reg, unsigned int index)
 213 {
 214         falcon_writel(efx, value, reg + index * sizeof(efx_oword_t));
 215 }
 216
 217 /* Page-mapped register block size */
 218 #define FALCON_PAGE_BLOCK_SIZE 0x2000
 219
 220 /* Calculate offset to page-mapped register block */
 221 #define FALCON_PAGED_REG(page, reg) \
 222         ((page) * FALCON_PAGE_BLOCK_SIZE + (reg))
 223
 224 /* As for falcon_write(), but for a page-mapped register. */
 225 static inline void falcon_write_page(struct efx_nic *efx, efx_oword_t *value,
 226                                      unsigned int reg, unsigned int page)
 227 {
 228         falcon_write(efx, value, FALCON_PAGED_REG(page, reg));
 229 }
 230
 231 /* As for falcon_writel(), but for a page-mapped register. */
 232 static inline void falcon_writel_page(struct efx_nic *efx, efx_dword_t *value,
 233                                       unsigned int reg, unsigned int page)
 234 {
 235         falcon_writel(efx, value, FALCON_PAGED_REG(page, reg));
 236 }
 237
 238 /* Write dword to Falcon page-mapped register with an extra lock.
 239  *
 240  * As for falcon_writel_page(), but for a register that suffers from
 241  * SFC bug 3181.  If writing to page 0, take out a lock so the BIU
 242  * collector cannot be confused.
 243  */
 244 static inline void falcon_writel_page_locked(struct efx_nic *efx,
 245                                              efx_dword_t *value,
 246                                              unsigned int reg,
 247                                              unsigned int page)
 248 {
 249         unsigned long flags = 0;
 250
 251         if (page == 0)
 252                 spin_lock_irqsave(&efx->biu_lock, flags);
 253         falcon_writel(efx, value, FALCON_PAGED_REG(page, reg));
 254         if (page == 0)
 255                 spin_unlock_irqrestore(&efx->biu_lock, flags);
 256 }
 257
 258 #endif /* EFX_FALCON_IO_H */