[ARM] pxa: update defconfig for Verdex Pro
[linux-2.6/verdex.git] / drivers / net / wireless / p54 / p54spi.c
blobafd26bf06649a06690bf7e29a67592c00151a5b9
1 /*
2 * Copyright (C) 2008 Christian Lamparter <chunkeey@web.de>
3 * Copyright 2008 Johannes Berg <johannes@sipsolutions.net>
5 * This driver is a port from stlc45xx:
6 * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
23 #include <linux/module.h>
24 #include <linux/platform_device.h>
25 #include <linux/interrupt.h>
26 #include <linux/firmware.h>
27 #include <linux/delay.h>
28 #include <linux/irq.h>
29 #include <linux/spi/spi.h>
30 #include <linux/etherdevice.h>
31 #include <linux/gpio.h>
33 #include "p54spi.h"
34 #include "p54spi_eeprom.h"
35 #include "p54.h"
37 #include "lmac.h"
39 MODULE_FIRMWARE("3826.arm");
40 MODULE_ALIAS("stlc45xx");
43 * gpios should be handled in board files and provided via platform data,
44 * but because it's currently impossible for p54spi to have a header file
45 * in include/linux, let's use module paramaters for now
48 static int p54spi_gpio_power = 97;
49 module_param(p54spi_gpio_power, int, 0444);
50 MODULE_PARM_DESC(p54spi_gpio_power, "gpio number for power line");
52 static int p54spi_gpio_irq = 87;
53 module_param(p54spi_gpio_irq, int, 0444);
54 MODULE_PARM_DESC(p54spi_gpio_irq, "gpio number for irq line");
56 static void p54spi_spi_read(struct p54s_priv *priv, u8 address,
57 void *buf, size_t len)
59 struct spi_transfer t[2];
60 struct spi_message m;
61 __le16 addr;
63 /* We first push the address */
64 addr = cpu_to_le16(address << 8 | SPI_ADRS_READ_BIT_15);
66 spi_message_init(&m);
67 memset(t, 0, sizeof(t));
69 t[0].tx_buf = &addr;
70 t[0].len = sizeof(addr);
71 spi_message_add_tail(&t[0], &m);
73 t[1].rx_buf = buf;
74 t[1].len = len;
75 spi_message_add_tail(&t[1], &m);
77 spi_sync(priv->spi, &m);
81 static void p54spi_spi_write(struct p54s_priv *priv, u8 address,
82 const void *buf, size_t len)
84 struct spi_transfer t[3];
85 struct spi_message m;
86 __le16 addr;
88 /* We first push the address */
89 addr = cpu_to_le16(address << 8);
91 spi_message_init(&m);
92 memset(t, 0, sizeof(t));
94 t[0].tx_buf = &addr;
95 t[0].len = sizeof(addr);
96 spi_message_add_tail(&t[0], &m);
98 t[1].tx_buf = buf;
99 t[1].len = len & ~1;
100 spi_message_add_tail(&t[1], &m);
102 if (len % 2) {
103 __le16 last_word;
104 last_word = cpu_to_le16(((u8 *)buf)[len - 1]);
106 t[2].tx_buf = &last_word;
107 t[2].len = sizeof(last_word);
108 spi_message_add_tail(&t[2], &m);
111 spi_sync(priv->spi, &m);
114 static u32 p54spi_read32(struct p54s_priv *priv, u8 addr)
116 __le32 val;
118 p54spi_spi_read(priv, addr, &val, sizeof(val));
120 return le32_to_cpu(val);
123 static inline void p54spi_write16(struct p54s_priv *priv, u8 addr, __le16 val)
125 p54spi_spi_write(priv, addr, &val, sizeof(val));
128 static inline void p54spi_write32(struct p54s_priv *priv, u8 addr, __le32 val)
130 p54spi_spi_write(priv, addr, &val, sizeof(val));
133 static int p54spi_wait_bit(struct p54s_priv *priv, u16 reg, u32 bits)
135 int i;
137 for (i = 0; i < 2000; i++) {
138 u32 buffer = p54spi_read32(priv, reg);
139 if ((buffer & bits) == bits)
140 return 1;
142 return 0;
145 static int p54spi_spi_write_dma(struct p54s_priv *priv, __le32 base,
146 const void *buf, size_t len)
148 if (!p54spi_wait_bit(priv, SPI_ADRS_DMA_WRITE_CTRL, HOST_ALLOWED)) {
149 dev_err(&priv->spi->dev, "spi_write_dma not allowed "
150 "to DMA write.\n");
151 return -EAGAIN;
154 p54spi_write16(priv, SPI_ADRS_DMA_WRITE_CTRL,
155 cpu_to_le16(SPI_DMA_WRITE_CTRL_ENABLE));
157 p54spi_write16(priv, SPI_ADRS_DMA_WRITE_LEN, cpu_to_le16(len));
158 p54spi_write32(priv, SPI_ADRS_DMA_WRITE_BASE, base);
159 p54spi_spi_write(priv, SPI_ADRS_DMA_DATA, buf, len);
160 return 0;
163 static int p54spi_request_firmware(struct ieee80211_hw *dev)
165 struct p54s_priv *priv = dev->priv;
166 int ret;
168 /* FIXME: should driver use it's own struct device? */
169 ret = request_firmware(&priv->firmware, "3826.arm", &priv->spi->dev);
171 if (ret < 0) {
172 dev_err(&priv->spi->dev, "request_firmware() failed: %d", ret);
173 return ret;
176 ret = p54_parse_firmware(dev, priv->firmware);
177 if (ret) {
178 release_firmware(priv->firmware);
179 return ret;
182 return 0;
185 static int p54spi_request_eeprom(struct ieee80211_hw *dev)
187 struct p54s_priv *priv = dev->priv;
188 const struct firmware *eeprom;
189 int ret;
192 * allow users to customize their eeprom.
195 ret = request_firmware(&eeprom, "3826.eeprom", &priv->spi->dev);
196 if (ret < 0) {
197 dev_info(&priv->spi->dev, "loading default eeprom...\n");
198 ret = p54_parse_eeprom(dev, (void *) p54spi_eeprom,
199 sizeof(p54spi_eeprom));
200 } else {
201 dev_info(&priv->spi->dev, "loading user eeprom...\n");
202 ret = p54_parse_eeprom(dev, (void *) eeprom->data,
203 (int)eeprom->size);
204 release_firmware(eeprom);
206 return ret;
209 static int p54spi_upload_firmware(struct ieee80211_hw *dev)
211 struct p54s_priv *priv = dev->priv;
212 unsigned long fw_len, _fw_len;
213 unsigned int offset = 0;
214 int err = 0;
215 u8 *fw;
217 fw_len = priv->firmware->size;
218 fw = kmemdup(priv->firmware->data, fw_len, GFP_KERNEL);
219 if (!fw)
220 return -ENOMEM;
222 /* stop the device */
223 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
224 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
225 SPI_CTRL_STAT_START_HALTED));
227 msleep(TARGET_BOOT_SLEEP);
229 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
230 SPI_CTRL_STAT_HOST_OVERRIDE |
231 SPI_CTRL_STAT_START_HALTED));
233 msleep(TARGET_BOOT_SLEEP);
235 while (fw_len > 0) {
236 _fw_len = min_t(long, fw_len, SPI_MAX_PACKET_SIZE);
238 err = p54spi_spi_write_dma(priv, cpu_to_le32(
239 ISL38XX_DEV_FIRMWARE_ADDR + offset),
240 (fw + offset), _fw_len);
241 if (err < 0)
242 goto out;
244 fw_len -= _fw_len;
245 offset += _fw_len;
248 BUG_ON(fw_len != 0);
250 /* enable host interrupts */
251 p54spi_write32(priv, SPI_ADRS_HOST_INT_EN,
252 cpu_to_le32(SPI_HOST_INTS_DEFAULT));
254 /* boot the device */
255 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
256 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
257 SPI_CTRL_STAT_RAM_BOOT));
259 msleep(TARGET_BOOT_SLEEP);
261 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
262 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_RAM_BOOT));
263 msleep(TARGET_BOOT_SLEEP);
265 out:
266 kfree(fw);
267 return err;
270 static void p54spi_power_off(struct p54s_priv *priv)
272 disable_irq(gpio_to_irq(p54spi_gpio_irq));
273 gpio_set_value(p54spi_gpio_power, 0);
276 static void p54spi_power_on(struct p54s_priv *priv)
278 gpio_set_value(p54spi_gpio_power, 1);
279 enable_irq(gpio_to_irq(p54spi_gpio_irq));
282 * need to wait a while before device can be accessed, the lenght
283 * is just a guess
285 msleep(10);
288 static inline void p54spi_int_ack(struct p54s_priv *priv, u32 val)
290 p54spi_write32(priv, SPI_ADRS_HOST_INT_ACK, cpu_to_le32(val));
293 static int p54spi_wakeup(struct p54s_priv *priv)
295 /* wake the chip */
296 p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
297 cpu_to_le32(SPI_TARGET_INT_WAKEUP));
299 /* And wait for the READY interrupt */
300 if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS,
301 SPI_HOST_INT_READY)) {
302 dev_err(&priv->spi->dev, "INT_READY timeout\n");
303 return -EBUSY;
306 p54spi_int_ack(priv, SPI_HOST_INT_READY);
307 return 0;
310 static inline void p54spi_sleep(struct p54s_priv *priv)
312 p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
313 cpu_to_le32(SPI_TARGET_INT_SLEEP));
316 static void p54spi_int_ready(struct p54s_priv *priv)
318 p54spi_write32(priv, SPI_ADRS_HOST_INT_EN, cpu_to_le32(
319 SPI_HOST_INT_UPDATE | SPI_HOST_INT_SW_UPDATE));
321 switch (priv->fw_state) {
322 case FW_STATE_BOOTING:
323 priv->fw_state = FW_STATE_READY;
324 complete(&priv->fw_comp);
325 break;
326 case FW_STATE_RESETTING:
327 priv->fw_state = FW_STATE_READY;
328 /* TODO: reinitialize state */
329 break;
330 default:
331 break;
335 static int p54spi_rx(struct p54s_priv *priv)
337 struct sk_buff *skb;
338 u16 len;
339 u16 rx_head[2];
340 #define READAHEAD_SZ (sizeof(rx_head)-sizeof(u16))
342 if (p54spi_wakeup(priv) < 0)
343 return -EBUSY;
345 /* Read data size and first data word in one SPI transaction
346 * This is workaround for firmware/DMA bug,
347 * when first data word gets lost under high load.
349 p54spi_spi_read(priv, SPI_ADRS_DMA_DATA, rx_head, sizeof(rx_head));
350 len = rx_head[0];
352 if (len == 0) {
353 p54spi_sleep(priv);
354 dev_err(&priv->spi->dev, "rx request of zero bytes\n");
355 return 0;
358 /* Firmware may insert up to 4 padding bytes after the lmac header,
359 * but it does not amend the size of SPI data transfer.
360 * Such packets has correct data size in header, thus referencing
361 * past the end of allocated skb. Reserve extra 4 bytes for this case */
362 skb = dev_alloc_skb(len + 4);
363 if (!skb) {
364 p54spi_sleep(priv);
365 dev_err(&priv->spi->dev, "could not alloc skb");
366 return -ENOMEM;
369 if (len <= READAHEAD_SZ) {
370 memcpy(skb_put(skb, len), rx_head + 1, len);
371 } else {
372 memcpy(skb_put(skb, READAHEAD_SZ), rx_head + 1, READAHEAD_SZ);
373 p54spi_spi_read(priv, SPI_ADRS_DMA_DATA,
374 skb_put(skb, len - READAHEAD_SZ),
375 len - READAHEAD_SZ);
377 p54spi_sleep(priv);
378 /* Put additional bytes to compensate for the possible
379 * alignment-caused truncation */
380 skb_put(skb, 4);
382 if (p54_rx(priv->hw, skb) == 0)
383 dev_kfree_skb(skb);
385 return 0;
389 static irqreturn_t p54spi_interrupt(int irq, void *config)
391 struct spi_device *spi = config;
392 struct p54s_priv *priv = dev_get_drvdata(&spi->dev);
394 ieee80211_queue_work(priv->hw, &priv->work);
396 return IRQ_HANDLED;
399 static int p54spi_tx_frame(struct p54s_priv *priv, struct sk_buff *skb)
401 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
402 int ret = 0;
404 if (p54spi_wakeup(priv) < 0)
405 return -EBUSY;
407 ret = p54spi_spi_write_dma(priv, hdr->req_id, skb->data, skb->len);
408 if (ret < 0)
409 goto out;
411 if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS,
412 SPI_HOST_INT_WR_READY)) {
413 dev_err(&priv->spi->dev, "WR_READY timeout\n");
414 ret = -EAGAIN;
415 goto out;
418 p54spi_int_ack(priv, SPI_HOST_INT_WR_READY);
420 if (FREE_AFTER_TX(skb))
421 p54_free_skb(priv->hw, skb);
422 out:
423 p54spi_sleep(priv);
424 return ret;
427 static int p54spi_wq_tx(struct p54s_priv *priv)
429 struct p54s_tx_info *entry;
430 struct sk_buff *skb;
431 struct ieee80211_tx_info *info;
432 struct p54_tx_info *minfo;
433 struct p54s_tx_info *dinfo;
434 unsigned long flags;
435 int ret = 0;
437 spin_lock_irqsave(&priv->tx_lock, flags);
439 while (!list_empty(&priv->tx_pending)) {
440 entry = list_entry(priv->tx_pending.next,
441 struct p54s_tx_info, tx_list);
443 list_del_init(&entry->tx_list);
445 spin_unlock_irqrestore(&priv->tx_lock, flags);
447 dinfo = container_of((void *) entry, struct p54s_tx_info,
448 tx_list);
449 minfo = container_of((void *) dinfo, struct p54_tx_info,
450 data);
451 info = container_of((void *) minfo, struct ieee80211_tx_info,
452 rate_driver_data);
453 skb = container_of((void *) info, struct sk_buff, cb);
455 ret = p54spi_tx_frame(priv, skb);
457 if (ret < 0) {
458 p54_free_skb(priv->hw, skb);
459 return ret;
462 spin_lock_irqsave(&priv->tx_lock, flags);
464 spin_unlock_irqrestore(&priv->tx_lock, flags);
465 return ret;
468 static void p54spi_op_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
470 struct p54s_priv *priv = dev->priv;
471 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
472 struct p54_tx_info *mi = (struct p54_tx_info *) info->rate_driver_data;
473 struct p54s_tx_info *di = (struct p54s_tx_info *) mi->data;
474 unsigned long flags;
476 BUILD_BUG_ON(sizeof(*di) > sizeof((mi->data)));
478 spin_lock_irqsave(&priv->tx_lock, flags);
479 list_add_tail(&di->tx_list, &priv->tx_pending);
480 spin_unlock_irqrestore(&priv->tx_lock, flags);
482 ieee80211_queue_work(priv->hw, &priv->work);
485 static void p54spi_work(struct work_struct *work)
487 struct p54s_priv *priv = container_of(work, struct p54s_priv, work);
488 u32 ints;
489 int ret;
491 mutex_lock(&priv->mutex);
493 if (priv->fw_state == FW_STATE_OFF)
494 goto out;
496 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
498 if (ints & SPI_HOST_INT_READY) {
499 p54spi_int_ready(priv);
500 p54spi_int_ack(priv, SPI_HOST_INT_READY);
503 if (priv->fw_state != FW_STATE_READY)
504 goto out;
506 if (ints & SPI_HOST_INT_UPDATE) {
507 p54spi_int_ack(priv, SPI_HOST_INT_UPDATE);
508 ret = p54spi_rx(priv);
509 if (ret < 0)
510 goto out;
512 if (ints & SPI_HOST_INT_SW_UPDATE) {
513 p54spi_int_ack(priv, SPI_HOST_INT_SW_UPDATE);
514 ret = p54spi_rx(priv);
515 if (ret < 0)
516 goto out;
519 ret = p54spi_wq_tx(priv);
520 out:
521 mutex_unlock(&priv->mutex);
524 static int p54spi_op_start(struct ieee80211_hw *dev)
526 struct p54s_priv *priv = dev->priv;
527 unsigned long timeout;
528 int ret = 0;
530 if (mutex_lock_interruptible(&priv->mutex)) {
531 ret = -EINTR;
532 goto out;
535 priv->fw_state = FW_STATE_BOOTING;
537 p54spi_power_on(priv);
539 ret = p54spi_upload_firmware(dev);
540 if (ret < 0) {
541 p54spi_power_off(priv);
542 goto out_unlock;
545 mutex_unlock(&priv->mutex);
547 timeout = msecs_to_jiffies(2000);
548 timeout = wait_for_completion_interruptible_timeout(&priv->fw_comp,
549 timeout);
550 if (!timeout) {
551 dev_err(&priv->spi->dev, "firmware boot failed");
552 p54spi_power_off(priv);
553 ret = -1;
554 goto out;
557 if (mutex_lock_interruptible(&priv->mutex)) {
558 ret = -EINTR;
559 p54spi_power_off(priv);
560 goto out;
563 WARN_ON(priv->fw_state != FW_STATE_READY);
565 out_unlock:
566 mutex_unlock(&priv->mutex);
568 out:
569 return ret;
572 static void p54spi_op_stop(struct ieee80211_hw *dev)
574 struct p54s_priv *priv = dev->priv;
575 unsigned long flags;
577 if (mutex_lock_interruptible(&priv->mutex)) {
578 /* FIXME: how to handle this error? */
579 return;
582 WARN_ON(priv->fw_state != FW_STATE_READY);
584 cancel_work_sync(&priv->work);
586 p54spi_power_off(priv);
587 spin_lock_irqsave(&priv->tx_lock, flags);
588 INIT_LIST_HEAD(&priv->tx_pending);
589 spin_unlock_irqrestore(&priv->tx_lock, flags);
591 priv->fw_state = FW_STATE_OFF;
592 mutex_unlock(&priv->mutex);
595 static int __devinit p54spi_probe(struct spi_device *spi)
597 struct p54s_priv *priv = NULL;
598 struct ieee80211_hw *hw;
599 int ret = -EINVAL;
601 hw = p54_init_common(sizeof(*priv));
602 if (!hw) {
603 dev_err(&spi->dev, "could not alloc ieee80211_hw");
604 return -ENOMEM;
607 priv = hw->priv;
608 priv->hw = hw;
609 dev_set_drvdata(&spi->dev, priv);
610 priv->spi = spi;
612 spi->bits_per_word = 16;
613 spi->max_speed_hz = 24000000;
615 ret = spi_setup(spi);
616 if (ret < 0) {
617 dev_err(&priv->spi->dev, "spi_setup failed");
618 goto err_free_common;
621 ret = gpio_request(p54spi_gpio_power, "p54spi power");
622 if (ret < 0) {
623 dev_err(&priv->spi->dev, "power GPIO request failed: %d", ret);
624 goto err_free_common;
627 ret = gpio_request(p54spi_gpio_irq, "p54spi irq");
628 if (ret < 0) {
629 dev_err(&priv->spi->dev, "irq GPIO request failed: %d", ret);
630 goto err_free_common;
633 gpio_direction_output(p54spi_gpio_power, 0);
634 gpio_direction_input(p54spi_gpio_irq);
636 ret = request_irq(gpio_to_irq(p54spi_gpio_irq),
637 p54spi_interrupt, IRQF_DISABLED, "p54spi",
638 priv->spi);
639 if (ret < 0) {
640 dev_err(&priv->spi->dev, "request_irq() failed");
641 goto err_free_common;
644 set_irq_type(gpio_to_irq(p54spi_gpio_irq),
645 IRQ_TYPE_EDGE_RISING);
647 disable_irq(gpio_to_irq(p54spi_gpio_irq));
649 INIT_WORK(&priv->work, p54spi_work);
650 init_completion(&priv->fw_comp);
651 INIT_LIST_HEAD(&priv->tx_pending);
652 mutex_init(&priv->mutex);
653 SET_IEEE80211_DEV(hw, &spi->dev);
654 priv->common.open = p54spi_op_start;
655 priv->common.stop = p54spi_op_stop;
656 priv->common.tx = p54spi_op_tx;
658 ret = p54spi_request_firmware(hw);
659 if (ret < 0)
660 goto err_free_common;
662 ret = p54spi_request_eeprom(hw);
663 if (ret)
664 goto err_free_common;
666 ret = p54_register_common(hw, &priv->spi->dev);
667 if (ret)
668 goto err_free_common;
670 return 0;
672 err_free_common:
673 p54_free_common(priv->hw);
674 return ret;
677 static int __devexit p54spi_remove(struct spi_device *spi)
679 struct p54s_priv *priv = dev_get_drvdata(&spi->dev);
681 p54_unregister_common(priv->hw);
683 free_irq(gpio_to_irq(p54spi_gpio_irq), spi);
685 gpio_free(p54spi_gpio_power);
686 gpio_free(p54spi_gpio_irq);
687 release_firmware(priv->firmware);
689 mutex_destroy(&priv->mutex);
691 p54_free_common(priv->hw);
693 return 0;
697 static struct spi_driver p54spi_driver = {
698 .driver = {
699 /* use cx3110x name because board-n800.c uses that for the
700 * SPI port */
701 .name = "cx3110x",
702 .bus = &spi_bus_type,
703 .owner = THIS_MODULE,
706 .probe = p54spi_probe,
707 .remove = __devexit_p(p54spi_remove),
710 static int __init p54spi_init(void)
712 int ret;
714 ret = spi_register_driver(&p54spi_driver);
715 if (ret < 0) {
716 printk(KERN_ERR "failed to register SPI driver: %d", ret);
717 goto out;
720 out:
721 return ret;
724 static void __exit p54spi_exit(void)
726 spi_unregister_driver(&p54spi_driver);
729 module_init(p54spi_init);
730 module_exit(p54spi_exit);
732 MODULE_LICENSE("GPL");
733 MODULE_AUTHOR("Christian Lamparter <chunkeey@web.de>");
734 MODULE_ALIAS("spi:cx3110x");